On 03/14/2011 02:37 PM, Jorge Fernandez Monteagudo wrote: >> -----Mensaje original----- >> De: Wolfgang Grandegger [mailto:w...@grandegger.com] >> Enviado el: Monday, March 14, 2011 1:06 PM >> Para: Jorge Fernandez Monteagudo >> CC: socketcan-users@lists.berlios.de >> Asunto: Re: [Socketcan-users] Setting the clock, ocr and cdr values >> >> On 03/14/2011 11:42 AM, Jorge Fernandez Monteagudo wrote: >>> Hi, >>> >>> I'm trying to implement my can infrastructure with socketcan. I would >> like to know where to find >>> information about the values from sja1000_priv struct, the >> can.clock.freq, ocr and cdr. >> >> Not sure what you are looking for. The meaning of theses values is >> described in the SJA1000 datasheet. >> > > Well, I'm trying to setup the sja1000 chip using the socketcan architecture. > In my old code I had the registers CDR, BTR0, BTR1, OCR, CMR and IER > loaded with some values in order to set the pelican mode with 1Mbps > and let the chip ready to serve interruptions. Now I'm trying to replicate > this in a modified version of the plx_pci.c but I've seen that the only > register used are from the sja1000_priv struct.
You need to provide proper cdr, ocr and the CAN clock sources frequency. See also: http://lxr.linux.no/#linux+v2.6.37.3/drivers/net/can/sja1000/sja1000.c#L242 The rest is handled by the SJA1000 driver. >>> I'm following the plx_pci.c code but in my driver I setup these >> register in a different way. >>> First, I set the CDR <- 0xC0, then I set the clock using the BTR0 and >> BTR1 registers to set the 1Mbps >>> baudrate, BTR0 <- 0x01, BTR1 <- 0x10 and finally the OCR register is >> initialized with OCR <- 0x1A. >> >> The input clock frequency, cdr and ocr must be defined by the SJA1000 >> driver, e.g.: >> >> http://lxr.linux.no/#linux+v2.6.37.3/drivers/net/can/sja1000/plx_pci.c# >> L526 >> >> Some drivers allow to set these values via module parameter. So, >> depending on the driver appropriate for your CAN hardware, you need to >> adjust them. The bit-timing have to be defined via netlink interface as >> described here: >> >> http://lxr.linux.no/#linux+v2.6.37.3/Documentation/networking/can.txt#L >> 635 >> > > Thanks for the info, now I get an error in dmesg: "bit-timing not yet defined" > then I suppose I'll need to follow this last link. Yes, you need to set the bit-timing before you can start the device. > >> What CAN hardware are you using? >> > > It's a SJA1000 can controller embedded inside a FPGA implementing a PCI bus > controller, then I need to set up the CAN address window before accessing the > CAN and I'm following the plx_pci.c code. OK, now I remember. Wolfgang. _______________________________________________ Socketcan-users mailing list Socketcan-users@lists.berlios.de https://lists.berlios.de/mailman/listinfo/socketcan-users
