* Aragon Gouveia <[email protected]> [2012-05-04 19:21:53]: > Hi, > > I was wondering if anyone is working on a watchdog driver for the > net6501? Preferably FreeBSD, but any of the BSDs would be good to know > about. > > The only useful watchdog info I've found is this: > > http://lists.soekris.com/pipermail/soekris-tech/2011-October/017752.html
I just posted a patch to [email protected] that adds support for the watchdog timer to OpenBSD. I successfully made my net6501 reset after breaking into ddb to force the watchdog to trigger. I'd appreciate some other OpenBSD/net6501 users giving it a test. Matt --- /dev/null Wed May 23 21:01:50 2012 +++ sys/dev/pci/e600pcib.c Wed May 23 21:00:44 2012 @@ -0,0 +1,220 @@ +/* $OpenBSD$ */ + +/* + * Copyright (c) 2012 Matt Dainty <[email protected]> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN + * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * Intel Atom E600 series LPC bridge also containing watchdog + */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/device.h> + +#include <machine/bus.h> + +#include <dev/pci/pcireg.h> +#include <dev/pci/pcivar.h> +#include <dev/pci/pcidevs.h> + +#define E600_LPC_SMBA 0x40 /* SMBus Base Address */ +#define E600_LPC_GBA 0x44 /* GPIO Base Address */ +#define E600_LPC_WDTBA 0x84 /* WDT Base Address */ + +#define E600_WDT_SIZE 64 /* I/O region size */ +#define E600_WDT_PV1 0x00 /* Preload Value 1 Register */ +#define E600_WDT_PV2 0x04 /* Preload Value 2 Register */ +#define E600_WDT_RR0 0x0c /* Reload Register 0 */ +#define E600_WDT_RR1 0x0d /* Reload Register 1 */ +#define E600_WDT_RR1_RELOAD (1 << 0) /* WDT Reload Flag */ +#define E600_WDT_RR1_TIMEOUT (1 << 1) /* WDT Timeout Flag */ +#define E600_WDT_WDTCR 0x10 /* WDT Configuration Register */ +#define E600_WDT_WDTCR_TIMEOUT (1 << 5) /* WDT Timeout Output Enable */ +#define E600_WDT_WDTCR_ENABLE (1 << 4) /* WDT Reset Enable */ +#define E600_WDT_WDTCR_RESET (1 << 3) /* WDT Reset Select */ +#define E600_WDT_WDTCR_PRE (1 << 2) /* WDT Prescalar Select */ +#define E600_WDT_DCR 0x14 /* Down Counter Register */ +#define E600_WDT_WDTLR 0x18 /* WDT Lock Register */ +#define E600_WDT_WDTLR_LOCK (1 << 0) /* Watchdog Timer Lock */ +#define E600_WDT_WDTLR_ENABLE (1 << 1) /* Watchdog Timer Enable */ +#define E600_WDT_WDTLR_TIMEOUT (1 << 2) /* WDT Timeout Configuration */ + +struct e600pcib_softc { + struct device sc_dev; + + /* Watchdog interface */ + bus_space_tag_t sc_wdt_iot; + bus_space_handle_t sc_wdt_ioh; + + int sc_wdt_period; +}; + +struct cfdriver e600pcib_cd = { + NULL, "e600pcib", DV_DULL +}; + +int e600pcib_match(struct device *, void *, void *); +void e600pcib_attach(struct device *, struct device *, void *); + +int e600pcib_wdt_cb(void *, int); + +struct cfattach e600pcib_ca = { + sizeof(struct e600pcib_softc), e600pcib_match, e600pcib_attach +}; + +/* from arch/<*>/pci/pcib.c */ +void pcibattach(struct device *parent, struct device *self, void *aux); + +const struct pci_matchid e600pcib_devices[] = { + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_LPC } +}; + +#ifndef SMALL_KERNEL +static __inline void +e600pcib_wdt_unlock(struct e600pcib_softc *sc) +{ + /* Register unlocking sequence */ + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x80); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x86); +} +#endif /* !SMALL_KERNEL */ + +int +e600pcib_match(struct device *parent, void *match, void *aux) +{ + if (pci_matchbyid((struct pci_attach_args *)aux, e600pcib_devices, + sizeof(e600pcib_devices) / sizeof(e600pcib_devices[0]))) + return (2); + + return (0); +} + +void +e600pcib_attach(struct device *parent, struct device *self, void *aux) +{ +#ifndef SMALL_KERNEL + struct e600pcib_softc *sc = (struct e600pcib_softc *)self; + struct pci_attach_args *pa = aux; + u_int32_t reg, wdtbase; + + /* Map Watchdog I/O space */ + reg = pci_conf_read(pa->pa_pc, pa->pa_tag, E600_LPC_WDTBA); + wdtbase = reg & 0xffff; + sc->sc_wdt_iot = pa->pa_iot; + if (reg & (1 << 31) && wdtbase) { + if (PCI_MAPREG_IO_ADDR(wdtbase) == 0 || + bus_space_map(sc->sc_wdt_iot, PCI_MAPREG_IO_ADDR(wdtbase), + E600_WDT_SIZE, 0, &sc->sc_wdt_ioh)) { + printf(": can't map watchdog I/O space"); + goto corepcib; + } + printf(": watchdog", wdtbase); + + /* Check for reboot on timeout */ + reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_RR1); + if (reg & E600_WDT_RR1_TIMEOUT) { + printf(", reboot on timeout"); + + /* Clear timeout bit */ + e600pcib_wdt_unlock(sc); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_RR1, E600_WDT_RR1_TIMEOUT); + } + + /* Check it's not locked already */ + reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_WDTLR); + if (reg & E600_WDT_WDTLR_LOCK) { + printf(", locked"); + goto corepcib; + } + + /* Disable watchdog */ + e600pcib_wdt_unlock(sc); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_WDTLR, 0); + sc->sc_wdt_period = 0; + + /* Register new watchdog */ + wdog_register(sc, e600pcib_wdt_cb); + } + +corepcib: +#endif /* !SMALL_KERNEL */ + /* Provide core pcib(4) functionality */ + pcibattach(parent, self, aux); +} + +#ifndef SMALL_KERNEL +int +e600pcib_wdt_cb(void *arg, int period) +{ + struct e600pcib_softc *sc = arg; + u_int32_t preload; + + if (period == 0) { + if (sc->sc_wdt_period != 0) { + /* Disable watchdog, with a reload before for safety */ + e600pcib_wdt_unlock(sc); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_RR1, E600_WDT_RR1_RELOAD); + e600pcib_wdt_unlock(sc); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_WDTLR, 0); + } + } else { + /* 600 seconds is the maximum supported timeout value */ + if (period > 600) + period = 600; + if (sc->sc_wdt_period != period) { + /* Set new timeout */ + preload = (period * 33000000) >> 15; + preload--; + + /* Set watchdog to perform a cold reset toggling the + * GPIO pin and the timer set to 1ms-10m resolution + */ + e600pcib_wdt_unlock(sc); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_WDTCR, E600_WDT_WDTCR_ENABLE); + e600pcib_wdt_unlock(sc); + bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_PV1, 0); + e600pcib_wdt_unlock(sc); + bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_PV2, preload); + e600pcib_wdt_unlock(sc); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_RR1, E600_WDT_RR1_RELOAD); + } + if (sc->sc_wdt_period == 0) { + /* Enable watchdog */ + e600pcib_wdt_unlock(sc); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_WDTLR, E600_WDT_WDTLR_ENABLE); + } else { + /* Reset timer */ + e600pcib_wdt_unlock(sc); + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, + E600_WDT_RR1, E600_WDT_RR1_RELOAD); + } + } + sc->sc_wdt_period = period; + + return (period); +} +#endif /* !SMALL_KERNEL */ --- /dev/null Wed May 23 21:02:08 2012 +++ share/man/man4/man4.i386/e600pcib.4 Wed May 23 20:37:44 2012 @@ -0,0 +1,55 @@ +.\" $OpenBSD$ +.\" +.\" Copyright (c) 2012 Matt Dainty <[email protected]> +.\" +.\" Permission to use, copy, modify, and distribute this software for any +.\" purpose with or without fee is hereby granted, provided that the above +.\" copyright notice and this permission notice appear in all copies. +.\" +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +.\" +.Dd $Mdocdate$ +.Dt E600PCIB 4 i386 +.Os +.Sh NAME +.Nm e600pcib +.Nd Intel Atom E600 series LPC bridge and watchdog +.Sh SYNOPSIS +.Cd "e600pcib* at pci?" +.Cd "isa* at e600pcib?" +.Sh DESCRIPTION +The +.Nm +driver provides support for the Intel Atom E600 series LPC bridge and +provides the standard +.Xr watchdog 4 +interface to the watchdog timer and may be used with +.Xr watchdogd 8 . +The watchdog timer can be configured via +.Xr sysctl 8 . +.Pp +Once the watchdog timer resets the CPU, the driver reports it on the +next boot displaying the ``reboot on timeout'' message in the dmesg. +.Sh SEE ALSO +.Xr intro 4 , +.Xr isa 4 , +.Xr pci 4 , +.Xr watchdog 4 +.Xr sysctl 8 +.Xr watchdogd 8 +.Sh HISTORY +The +.Nm +driver first appeared in +.Ox 5.2 . +.Sh AUTHORS +The +.Nm +driver was written by +.An Matt Dainty Aq [email protected] . --- /dev/null Wed May 23 21:02:17 2012 +++ share/man/man4/man4.amd64/e600pcib.4 Wed May 23 20:53:39 2012 @@ -0,0 +1,55 @@ +.\" $OpenBSD$ +.\" +.\" Copyright (c) 2012 Matt Dainty <[email protected]> +.\" +.\" Permission to use, copy, modify, and distribute this software for any +.\" purpose with or without fee is hereby granted, provided that the above +.\" copyright notice and this permission notice appear in all copies. +.\" +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +.\" +.Dd $Mdocdate$ +.Dt E600PCIB 4 amd64 +.Os +.Sh NAME +.Nm e600pcib +.Nd Intel Atom E600 series LPC bridge and watchdog +.Sh SYNOPSIS +.Cd "e600pcib* at pci?" +.Cd "isa* at e600pcib?" +.Sh DESCRIPTION +The +.Nm +driver provides support for the Intel Atom E600 series LPC bridge and +provides the standard +.Xr watchdog 4 +interface to the watchdog timer and may be used with +.Xr watchdogd 8 . +The watchdog timer can be configured via +.Xr sysctl 8 . +.Pp +Once the watchdog timer resets the CPU, the driver reports it on the +next boot displaying the ``reboot on timeout'' message in the dmesg. +.Sh SEE ALSO +.Xr intro 4 , +.Xr isa 4 , +.Xr pci 4 , +.Xr watchdog 4 +.Xr sysctl 8 +.Xr watchdogd 8 +.Sh HISTORY +The +.Nm +driver first appeared in +.Ox 5.2 . +.Sh AUTHORS +The +.Nm +driver was written by +.An Matt Dainty Aq [email protected] . --- share/man/man4/man4.i386/Makefile.orig Wed May 23 21:03:38 2012 +++ share/man/man4/man4.i386/Makefile Wed May 23 21:04:33 2012 @@ -2,9 +2,9 @@ # from: @(#)Makefile 5.1 (Berkeley) 2/12/91 # Id: Makefile,v 1.4 1995/12/14 05:41:38 deraadt Exp $ -MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 elansc.4 \ - esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 gus.4 ie.4 \ - ichpcib.4 intro.4 ioapic.4 \ +MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 e600pcib.4 \ + elansc.4 esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 \ + gus.4 ie.4 ichpcib.4 intro.4 ioapic.4 \ joy.4 le.4 lms.4 mem.4 mms.4 mpbios.4 mtrr.4 npx.4 nvram.4 \ pas.4 pcibios.4 pctr.4 piixpcib.4 sb.4 \ sea.4 uha.4 wds.4 wdt.4 wss.4 --- share/man/man4/man4.amd64/Makefile.orig Wed May 23 21:04:42 2012 +++ share/man/man4/man4.amd64/Makefile Wed May 23 21:05:12 2012 @@ -1,7 +1,7 @@ # $OpenBSD: Makefile,v 1.14 2011/03/18 12:40:29 deraadt Exp $ -MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 intro.4 ioapic.4 \ - mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4 +MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 e600pcib.4 intro.4 \ + ioapic.4 mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4 MLINKS+= mem.4 kmem.4 MANSUBDIR=amd64 --- sys/arch/i386/conf/files.i386.orig Wed May 23 18:18:01 2012 +++ sys/arch/i386/conf/files.i386 Wed May 23 18:20:09 2012 @@ -147,7 +147,7 @@ # PCI-ISA bridge chipsets device pcib: isabus attach pcib at pci -file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib +file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib | e600pcib # Intel ICHx/ICHx-M LPC bridges device ichpcib: isabus @@ -168,6 +168,11 @@ device amdpcib: isabus attach amdpcib at pci file dev/pci/amdpcib.c amdpcib + +# Intel Atom E600 LPC bridge +device e600pcib: isabus +attach e600pcib at pci +file dev/pci/e600pcib.c e600pcib device hme: ether, ifnet, mii, ifmedia file dev/ic/hme.c hme --- sys/arch/i386/conf/GENERIC.orig Wed May 23 18:17:57 2012 +++ sys/arch/i386/conf/GENERIC Wed May 23 18:19:26 2012 @@ -72,6 +72,7 @@ isa0 at mainbus0 isa0 at pcib? isa0 at amdpcib? +isa0 at e600pcib? isa0 at ichpcib? isa0 at piixpcib? isa0 at gscpcib? @@ -85,6 +86,7 @@ pci* at pchb? pcib* at pci? # PCI-ISA bridge amdpcib* at pci? # AMD 8111 LPC bridge +e600pcib* at pci? # Intel Atom E600 LPC bridge ichpcib* at pci? # Intel ICHx/ICHx-M LPC bridges piixpcib* at pci? # Intel PIIX4 PCI-ISA bridge gscpcib* at pci? # NS Geode SC1100 PCI-ISA bridge --- sys/arch/amd64/conf/files.amd64.orig Wed May 23 14:16:11 2012 +++ sys/arch/amd64/conf/files.amd64 Wed May 23 14:17:00 2012 @@ -147,12 +147,17 @@ # PCI-ISA bridges device pcib: isabus attach pcib at pci -file arch/amd64/pci/pcib.c pcib | amdpcib +file arch/amd64/pci/pcib.c pcib | amdpcib | e600pcib # AMD 8111 LPC bridge device amdpcib: isabus attach amdpcib at pci file dev/pci/amdpcib.c amdpcib + +# Intel Atom E600 LPC bridge +device e600pcib: isabus +attach e600pcib at pci +file dev/pci/e600pcib.c e600pcib device aapic attach aapic at pci --- sys/arch/amd64/conf/GENERIC.orig Wed May 23 12:29:16 2012 +++ sys/arch/amd64/conf/GENERIC Wed May 23 14:17:18 2012 @@ -34,6 +34,7 @@ isa0 at mainbus0 isa0 at pcib? isa0 at amdpcib? +isa0 at e600pcib? pci* at mainbus0 acpi0 at bios0 @@ -73,6 +74,7 @@ pci* at pchb? pcib* at pci? # PCI-ISA bridge amdpcib* at pci? # AMD 8111 LPC bridge +e600pcib* at pci? # Intel Atom E600 LPC bridge kate* at pci? # AMD K8 temperature sensor km* at pci? # AMD K10 temperature sensor amas* at pci? disable # AMD memory configuration _______________________________________________ Soekris-tech mailing list [email protected] http://lists.soekris.com/mailman/listinfo/soekris-tech
