There is a AppNote at the silabs website according phase noise performance for the various output stage options. No wonder, ECL would be best.
Hm, of more interest is the question how good the phase noise should be for a system view? Especially I would be interested in suggested design values for PSK transmission. I tried Google for it but never found an answer. All is, that XTALs are really clean, even LCs, but PLLs and RC oscillator deliver more poor performance. This is a very simple view, as one must think of carrier shifted performance. It of course also depends on oscillator construction. Most times the 74xx4060 is suggested as a bad candidate but I think that device is much better than what others think about it - but (others) probably never tested it. What do you think? - Henry Weddig, Henning-Christof schrieb: > Hello, > > I have read over a long time in the various groups about the SI570. I > can offer to measure the phase noise of the devides using a Agilent > Signal source analyser E5052A available at my QRL, if someone sends me > his board containing the SI 570. > > 73 > > Henning Weddig > DK5LV > > drmail377 schrieb: >> >> Have a look in the files area for KF4BQ > Si570 Testing > Si570 Phase >> Noise Testing Rev1.pdf. This is the best information I could find. >> Someone really needs to run a proper phase-noise plot on these >> oscillators. Unfortunately, I don't have the test equipment to do so. >> >> 73's David WB4ONA >> >> --- In [email protected] <mailto:softrock40%40yahoogroups.com>, >> Bill Dumke <[EMAIL PROTECTED]> wrote: >> > >> > Does anyone know where I could get the phase noise versus offset >> > frequency plots for the CMOS version versus the LVDS version? >> > >> > Bill WA9PWR >> > >> >> > > ------------------------------------ > > Yahoo! Groups Links > > > > -- www.ehydra.dyndns.info
