Module Name: src
Committed By: martin
Date: Wed May 29 15:43:27 UTC 2019
Modified Files:
src/sys/arch/x86/include [netbsd-8]: specialreg.h
src/sys/arch/x86/x86 [netbsd-8]: procfs_machdep.c
Log Message:
Pullup the following, requested by msaitoh in ticket #1270:
sys/arch/x86/include/specialreg.h 1.143, 1.145 via patch
sys/arch/x86/x86/procfs_machdep.c 1.30
Add TSX_FORCE_ABORT related definitions.
Add cpuid7 edx bit 10 "MD_CLEAR".
To generate a diff of this commit:
cvs rdiff -u -r1.98.2.12 -r1.98.2.13 src/sys/arch/x86/include/specialreg.h
cvs rdiff -u -r1.15.2.8 -r1.15.2.9 src/sys/arch/x86/x86/procfs_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.98.2.12 src/sys/arch/x86/include/specialreg.h:1.98.2.13
--- src/sys/arch/x86/include/specialreg.h:1.98.2.12 Tue May 14 17:12:19 2019
+++ src/sys/arch/x86/include/specialreg.h Wed May 29 15:43:26 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.98.2.12 2019/05/14 17:12:19 martin Exp $ */
+/* $NetBSD: specialreg.h,v 1.98.2.13 2019/05/29 15:43:26 martin Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -427,6 +427,7 @@
#define CPUID_SEF_AVX512_4VNNIW __BIT(2)
#define CPUID_SEF_AVX512_4FMAPS __BIT(3)
#define CPUID_SEF_MD_CLEAR __BIT(10)
+#define CPUID_SEF_TSX_FORCE_ABORT __BIT(13) /* MSR_TSX_FORCE_ABORT bit 0 */
#define CPUID_SEF_IBRS __BIT(26) /* IBRS / IBPB Speculation Control */
#define CPUID_SEF_STIBP __BIT(27) /* STIBP Speculation Control */
#define CPUID_SEF_L1D_FLUSH __BIT(28) /* IA32_FLUSH_CMD MSR */
@@ -436,7 +437,9 @@
#define CPUID_SEF_FLAGS2 "\20" \
"\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \
- "\33" "IBRS" "\34" "STIBP" \
+ "\13" "MD_CLEAR" \
+ "\16" "TSX_FORCE_ABORT" \
+ "\33" "IBRS" "\34" "STIBP" \
"\35" "L1D_FLUSH" "\36" "ARCH_CAP" "\37CORE_CAP" "\40" "SSBD"
/*
@@ -747,8 +750,9 @@
#define IA32_ARCH_SKIP_L1DFL_VMENTRY 0x08
#define IA32_ARCH_SSB_NO 0x10
#define IA32_ARCH_MDS_NO 0x20
-#define MSR_IA32_FLUSH_CMD 0x10b
+#define MSR_IA32_FLUSH_CMD 0x10b
#define IA32_FLUSH_CMD_L1D_FLUSH 0x01
+#define MSR_TSX_FORCE_ABORT 0x10f
#define MSR_BBL_CR_ADDR 0x116 /* PII+ only */
#define MSR_BBL_CR_DECC 0x118 /* PII+ only */
#define MSR_BBL_CR_CTL 0x119 /* PII+ only */
Index: src/sys/arch/x86/x86/procfs_machdep.c
diff -u src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.8 src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.9
--- src/sys/arch/x86/x86/procfs_machdep.c:1.15.2.8 Thu Mar 7 17:01:18 2019
+++ src/sys/arch/x86/x86/procfs_machdep.c Wed May 29 15:43:26 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: procfs_machdep.c,v 1.15.2.8 2019/03/07 17:01:18 martin Exp $ */
+/* $NetBSD: procfs_machdep.c,v 1.15.2.9 2019/05/29 15:43:26 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -42,7 +42,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.8 2019/03/07 17:01:18 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: procfs_machdep.c,v 1.15.2.9 2019/05/29 15:43:26 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -188,7 +188,7 @@ static const char * const x86_features[]
{ /* (18) Intel 0x00000007 edx */
NULL, NULL, "avx512_4vnniw", "avx512_4fmaps", NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, "md_clear", NULL, NULL, NULL, NULL, NULL,
NULL, NULL, "pconfig", NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
"flush_l1d", "arch_capabilities", NULL, "ssbd"},
