Module Name: src
Committed By: skrll
Date: Wed Jul 17 08:39:03 UTC 2019
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S
src/sys/arch/powerpc/include/ibm4xx: pmap.h
Log Message:
Spell endianness correctly in comments
To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/powerpc/include/ibm4xx/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.38 src/sys/arch/aarch64/aarch64/locore.S:1.39
--- src/sys/arch/aarch64/aarch64/locore.S:1.38 Mon Jul 15 11:46:53 2019
+++ src/sys/arch/aarch64/aarch64/locore.S Wed Jul 17 08:39:03 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.38 2019/07/15 11:46:53 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.39 2019/07/17 08:39:03 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -38,7 +38,7 @@
#include <aarch64/hypervisor.h>
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.38 2019/07/15 11:46:53 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.39 2019/07/17 08:39:03 skrll Exp $")
/*#define DEBUG_LOCORE /* debug print */
@@ -976,7 +976,7 @@ tcr_setting:
sctlr_ee:
- .quad (SCTLR_EE | SCTLR_EOE) /* Endiannes of Exception and EL0 */
+ .quad (SCTLR_EE | SCTLR_EOE) /* Endianness of Exception and EL0 */
sctlr_set:
.quad ( \
SCTLR_LSMAOE | /* Load/Store Multiple Atomicity and Ordering */ \
Index: src/sys/arch/powerpc/include/ibm4xx/pmap.h
diff -u src/sys/arch/powerpc/include/ibm4xx/pmap.h:1.18 src/sys/arch/powerpc/include/ibm4xx/pmap.h:1.19
--- src/sys/arch/powerpc/include/ibm4xx/pmap.h:1.18 Thu Apr 19 21:50:07 2018
+++ src/sys/arch/powerpc/include/ibm4xx/pmap.h Wed Jul 17 08:39:03 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.18 2018/04/19 21:50:07 christos Exp $ */
+/* $NetBSD: pmap.h,v 1.19 2019/07/17 08:39:03 skrll Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@@ -82,7 +82,7 @@
#define KERNEL_PID 1 /* TLB PID to use for kernel translation */
/*
- * A TTE is a 16KB or greater TLB entry w/size and endiannes bits
+ * A TTE is a 16KB or greater TLB entry w/size and endianness bits
* stuffed in the (unused) low bits of the PA.
*/
#define TTE_PA_MASK 0xffffc000
