Module Name: src
Committed By: martin
Date: Thu Aug 1 14:14:30 UTC 2019
Modified Files:
src/sys/dev/pci/ixgbe [netbsd-8]: ixgbe.c ixgbe_common.c ixgbe_type.h
ixv.c
Log Message:
Pull up the following revisions, requested by msaitoh in ticket #1313:
sys/dev/pci/ixgbe/ixgbe_type.h 1.41
sys/dev/pci/ixgbe/ixgbe.c 1.194,1.197-1.199
via patch
sys/dev/pci/ixgbe/ixgbe_common.c 1.24
sys/dev/pci/ixgbe/ixv.c 1.121,1.124-1.125
- Avoid undefined behavior of interrupt vector setting.
- Avoid undefined behavior of TX/RX queue statistics calculation.
- Avoid undefined behavior of X550EM's PHY accesses.
- Avoid undefined behavior of Flow Control Transmit Timer setting.
- Don't call {ixgbe,ixv}_stop() twice while detaching.
To generate a diff of this commit:
cvs rdiff -u -r1.88.2.30 -r1.88.2.31 src/sys/dev/pci/ixgbe/ixgbe.c
cvs rdiff -u -r1.13.2.5 -r1.13.2.6 src/sys/dev/pci/ixgbe/ixgbe_common.c
cvs rdiff -u -r1.22.2.9 -r1.22.2.10 src/sys/dev/pci/ixgbe/ixgbe_type.h
cvs rdiff -u -r1.56.2.22 -r1.56.2.23 src/sys/dev/pci/ixgbe/ixv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/ixgbe/ixgbe.c
diff -u src/sys/dev/pci/ixgbe/ixgbe.c:1.88.2.30 src/sys/dev/pci/ixgbe/ixgbe.c:1.88.2.31
--- src/sys/dev/pci/ixgbe/ixgbe.c:1.88.2.30 Mon Jul 22 17:53:35 2019
+++ src/sys/dev/pci/ixgbe/ixgbe.c Thu Aug 1 14:14:30 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.88.2.30 2019/07/22 17:53:35 martin Exp $ */
+/* $NetBSD: ixgbe.c,v 1.88.2.31 2019/08/01 14:14:30 martin Exp $ */
/******************************************************************************
@@ -608,7 +608,7 @@ ixgbe_initialize_receive_units(struct ad
/* Set RQSMR (Receive Queue Statistic Mapping) register */
reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum));
- reg &= ~(0x000000ff << (regshift * 8));
+ reg &= ~(0x000000ffUL << (regshift * 8));
reg |= i << (regshift * 8);
IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg);
@@ -697,7 +697,7 @@ ixgbe_initialize_transmit_units(struct a
else
tqsmreg = IXGBE_TQSM(regnum);
reg = IXGBE_READ_REG(hw, tqsmreg);
- reg &= ~(0x000000ff << (regshift * 8));
+ reg &= ~(0x000000ffUL << (regshift * 8));
reg |= i << (regshift * 8);
IXGBE_WRITE_REG(hw, tqsmreg, reg);
@@ -2572,7 +2572,7 @@ ixgbe_disable_queue_internal(struct adap
{
struct ixgbe_hw *hw = &adapter->hw;
struct ix_queue *que = &adapter->queues[vector];
- u64 queue = (u64)(1ULL << vector);
+ u64 queue = 1ULL << vector;
u32 mask;
mutex_enter(&que->dc_mtx);
@@ -3555,8 +3555,13 @@ ixgbe_detach(device_t dev, int flags)
return (EBUSY);
}
- /* Stop the interface. Callouts are stopped in it. */
- ixgbe_ifstop(adapter->ifp, 1);
+ /*
+ * Stop the interface. ixgbe_setup_low_power_mode() calls ixgbe_stop(),
+ * so it's not required to call ixgbe_stop() directly.
+ */
+ IXGBE_CORE_LOCK(adapter);
+ ixgbe_setup_low_power_mode(adapter);
+ IXGBE_CORE_UNLOCK(adapter);
#if NVLAN > 0
/* Make sure VLANs are not using driver */
if (!VLAN_ATTACHED(&adapter->osdep.ec))
@@ -3572,10 +3577,6 @@ ixgbe_detach(device_t dev, int flags)
pmf_device_deregister(dev);
ether_ifdetach(adapter->ifp);
- /* Stop the adapter */
- IXGBE_CORE_LOCK(adapter);
- ixgbe_setup_low_power_mode(adapter);
- IXGBE_CORE_UNLOCK(adapter);
ixgbe_free_softint(adapter);
@@ -4174,8 +4175,8 @@ ixgbe_set_ivar(struct adapter *adapter,
entry += (type * 64);
index = (entry >> 2) & 0x1F;
ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
- ivar &= ~(0xFF << (8 * (entry & 0x3)));
- ivar |= (vector << (8 * (entry & 0x3)));
+ ivar &= ~(0xffUL << (8 * (entry & 0x3)));
+ ivar |= ((u32)vector << (8 * (entry & 0x3)));
IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
break;
case ixgbe_mac_82599EB:
@@ -4186,14 +4187,14 @@ ixgbe_set_ivar(struct adapter *adapter,
if (type == -1) { /* MISC IVAR */
index = (entry & 1) * 8;
ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
- ivar &= ~(0xFF << index);
- ivar |= (vector << index);
+ ivar &= ~(0xffUL << index);
+ ivar |= ((u32)vector << index);
IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);
} else { /* RX/TX IVARS */
index = (16 * (entry & 1)) + (8 * type);
ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));
- ivar &= ~(0xFF << index);
- ivar |= (vector << index);
+ ivar &= ~(0xffUL << index);
+ ivar |= ((u32)vector << index);
IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
}
break;
Index: src/sys/dev/pci/ixgbe/ixgbe_common.c
diff -u src/sys/dev/pci/ixgbe/ixgbe_common.c:1.13.2.5 src/sys/dev/pci/ixgbe/ixgbe_common.c:1.13.2.6
--- src/sys/dev/pci/ixgbe/ixgbe_common.c:1.13.2.5 Mon Jul 22 17:53:35 2019
+++ src/sys/dev/pci/ixgbe/ixgbe_common.c Thu Aug 1 14:14:30 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe_common.c,v 1.13.2.5 2019/07/22 17:53:35 martin Exp $ */
+/* $NetBSD: ixgbe_common.c,v 1.13.2.6 2019/08/01 14:14:30 martin Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@@ -2950,7 +2950,7 @@ s32 ixgbe_fc_enable_generic(struct ixgbe
}
/* Configure pause time (2 TCs per register) */
- reg = hw->fc.pause_time * 0x00010001;
+ reg = (u32)hw->fc.pause_time * 0x00010001;
for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++)
IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);
Index: src/sys/dev/pci/ixgbe/ixgbe_type.h
diff -u src/sys/dev/pci/ixgbe/ixgbe_type.h:1.22.2.9 src/sys/dev/pci/ixgbe/ixgbe_type.h:1.22.2.10
--- src/sys/dev/pci/ixgbe/ixgbe_type.h:1.22.2.9 Mon Jul 22 17:53:35 2019
+++ src/sys/dev/pci/ixgbe/ixgbe_type.h Thu Aug 1 14:14:30 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe_type.h,v 1.22.2.9 2019/07/22 17:53:35 martin Exp $ */
+/* $NetBSD: ixgbe_type.h,v 1.22.2.10 2019/08/01 14:14:30 martin Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@@ -4457,7 +4457,7 @@ struct ixgbe_bypass_eeprom {
#define IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KR (1 << 26)
#define IXGBE_KRM_LINK_S1_MAC_AN_COMPLETE (1 << 28)
#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE (1 << 29)
-#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART (1 << 31)
+#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART (1UL << 31)
#define IXGBE_KRM_AN_CNTL_1_SYM_PAUSE (1 << 28)
#define IXGBE_KRM_AN_CNTL_1_ASM_PAUSE (1 << 29)
@@ -4487,7 +4487,7 @@ struct ixgbe_bypass_eeprom {
#define IXGBE_KRM_TX_COEFF_CTRL_1_CMINUS1_OVRRD_EN (1 << 1)
#define IXGBE_KRM_TX_COEFF_CTRL_1_CPLUS1_OVRRD_EN (1 << 2)
#define IXGBE_KRM_TX_COEFF_CTRL_1_CZERO_EN (1 << 3)
-#define IXGBE_KRM_TX_COEFF_CTRL_1_OVRRD_EN (1 << 31)
+#define IXGBE_KRM_TX_COEFF_CTRL_1_OVRRD_EN (1UL << 31)
#define IXGBE_SB_IOSF_INDIRECT_CTRL 0x00011144
#define IXGBE_SB_IOSF_INDIRECT_DATA 0x00011148
@@ -4503,7 +4503,7 @@ struct ixgbe_bypass_eeprom {
#define IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT 28
#define IXGBE_SB_IOSF_CTRL_TARGET_SELECT_MASK 0x7
#define IXGBE_SB_IOSF_CTRL_BUSY_SHIFT 31
-#define IXGBE_SB_IOSF_CTRL_BUSY (1 << IXGBE_SB_IOSF_CTRL_BUSY_SHIFT)
+#define IXGBE_SB_IOSF_CTRL_BUSY (1UL << IXGBE_SB_IOSF_CTRL_BUSY_SHIFT)
#define IXGBE_SB_IOSF_TARGET_KR_PHY 0
#define IXGBE_NW_MNG_IF_SEL 0x00011178
Index: src/sys/dev/pci/ixgbe/ixv.c
diff -u src/sys/dev/pci/ixgbe/ixv.c:1.56.2.22 src/sys/dev/pci/ixgbe/ixv.c:1.56.2.23
--- src/sys/dev/pci/ixgbe/ixv.c:1.56.2.22 Mon Jul 22 17:53:35 2019
+++ src/sys/dev/pci/ixgbe/ixv.c Thu Aug 1 14:14:30 2019
@@ -1,4 +1,4 @@
-/*$NetBSD: ixv.c,v 1.56.2.22 2019/07/22 17:53:35 martin Exp $*/
+/*$NetBSD: ixv.c,v 1.56.2.23 2019/08/01 14:14:30 martin Exp $*/
/******************************************************************************
@@ -606,10 +606,6 @@ ixv_detach(device_t dev, int flags)
}
#endif
- IXGBE_CORE_LOCK(adapter);
- ixv_stop(adapter);
- IXGBE_CORE_UNLOCK(adapter);
-
for (int i = 0; i < adapter->num_queues; i++, que++, txr++) {
if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
softint_disestablish(txr->txr_si);
@@ -846,7 +842,7 @@ ixv_enable_queue(struct adapter *adapter
{
struct ixgbe_hw *hw = &adapter->hw;
struct ix_queue *que = &adapter->queues[vector];
- u32 queue = 1 << vector;
+ u32 queue = 1UL << vector;
u32 mask;
mutex_enter(&que->dc_mtx);
@@ -867,7 +863,7 @@ ixv_disable_queue(struct adapter *adapte
{
struct ixgbe_hw *hw = &adapter->hw;
struct ix_queue *que = &adapter->queues[vector];
- u64 queue = (u64)(1 << vector);
+ u32 queue = 1UL << vector;
u32 mask;
mutex_enter(&que->dc_mtx);
@@ -2146,8 +2142,8 @@ ixv_set_ivar(struct adapter *adapter, u8
} else { /* RX/TX IVARS */
index = (16 * (entry & 1)) + (8 * type);
ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(entry >> 1));
- ivar &= ~(0xFF << index);
- ivar |= (vector << index);
+ ivar &= ~(0xffUL << index);
+ ivar |= ((u32)vector << index);
IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(entry >> 1), ivar);
}
} /* ixv_set_ivar */
