Module Name: src Committed By: martin Date: Thu Aug 15 09:49:49 UTC 2019
Modified Files: src/sys/arch/arm/amlogic [netbsd-9]: meson8b_clkc.c meson8b_pinctrl.c meson_platform.c src/sys/arch/arm/cortex [netbsd-9]: a9tmr_var.h a9wdt.c files.cortex src/sys/arch/arm/dts [netbsd-9]: meson8b-odroidc1.dts meson8b.dtsi src/sys/arch/arm/fdt [netbsd-9]: files.fdt src/sys/arch/evbarm/conf [netbsd-9]: BCM5301X BCM56340 CUBOX-I DUOVERO GENERIC HUMMINGBOARD NITROGEN6X PANDABOARD PARALLELLA ZEDBOARD Added Files: src/sys/arch/arm/cortex [netbsd-9]: a9ptmr.c a9ptmr_var.h src/sys/arch/arm/fdt [netbsd-9]: a9ptmr_fdt.c a9wdt_fdt.c Log Message: Pull up following revision(s) (requested by skrll in ticket #55): sys/arch/arm/cortex/a9wdt.c: revision 1.10 sys/arch/evbarm/conf/HUMMINGBOARD: revision 1.9 sys/arch/evbarm/conf/GENERIC: revision 1.50 sys/arch/evbarm/conf/NITROGEN6X: revision 1.24 sys/arch/arm/cortex/a9tmr_var.h: revision 1.7 sys/arch/arm/fdt/files.fdt: revision 1.29 sys/arch/arm/amlogic/meson_platform.c: revision 1.12 sys/arch/arm/amlogic/meson8b_pinctrl.c: revision 1.2 sys/arch/arm/amlogic/meson_platform.c: revision 1.13 sys/arch/evbarm/conf/BCM5301X: revision 1.34 sys/arch/arm/dts/meson8b.dtsi: revision 1.6 sys/arch/arm/fdt/a9ptmr_fdt.c: revision 1.1 sys/arch/arm/dts/meson8b.dtsi: revision 1.7 sys/arch/arm/cortex/a9ptmr_var.h: revision 1.1 sys/arch/evbarm/conf/PANDABOARD: revision 1.30 sys/arch/evbarm/conf/DUOVERO: revision 1.14 sys/arch/arm/cortex/a9ptmr.c: revision 1.1 sys/arch/arm/cortex/a9ptmr.c: revision 1.2 sys/arch/arm/fdt/a9wdt_fdt.c: revision 1.1 sys/arch/evbarm/conf/BCM56340: revision 1.19 sys/arch/evbarm/conf/CUBOX-I: revision 1.23 sys/arch/arm/amlogic/meson8b_clkc.c: revision 1.4 sys/arch/evbarm/conf/PARALLELLA: revision 1.7 sys/arch/arm/cortex/files.cortex: revision 1.12 sys/arch/arm/dts/meson8b-odroidc1.dts: revision 1.4 sys/arch/arm/cortex/a9wdt.c: revision 1.9 sys/arch/evbarm/conf/ZEDBOARD: revision 1.6 spaces to tab - Add a driver for the A5/A9 Private timer. While here FDTise the Watchdog driver. - Update for recent a9wdt changes - Trailing whitespace - Updates to get Odroid-C1 in better shape since the last DTS import - Various fixes / changes - don't use prescaler - improve AB_DEBUG output - fix a9ptmr_delay to work with a decrementing counter! Thanks to jmcneill@ for proving I'm an idiot - Add eth_rxd3 and eth_rxd2 pinctrl groups - Catch up to recent mainline dts changes To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.3.6.1 src/sys/arch/arm/amlogic/meson8b_clkc.c cvs rdiff -u -r1.1 -r1.1.8.1 src/sys/arch/arm/amlogic/meson8b_pinctrl.c cvs rdiff -u -r1.11 -r1.11.4.1 src/sys/arch/arm/amlogic/meson_platform.c cvs rdiff -u -r0 -r1.2.2.2 src/sys/arch/arm/cortex/a9ptmr.c cvs rdiff -u -r0 -r1.1.2.2 src/sys/arch/arm/cortex/a9ptmr_var.h cvs rdiff -u -r1.6 -r1.6.6.1 src/sys/arch/arm/cortex/a9tmr_var.h cvs rdiff -u -r1.8 -r1.8.2.1 src/sys/arch/arm/cortex/a9wdt.c cvs rdiff -u -r1.11 -r1.11.4.1 src/sys/arch/arm/cortex/files.cortex cvs rdiff -u -r1.3 -r1.3.8.1 src/sys/arch/arm/dts/meson8b-odroidc1.dts cvs rdiff -u -r1.5 -r1.5.8.1 src/sys/arch/arm/dts/meson8b.dtsi cvs rdiff -u -r0 -r1.1.2.2 src/sys/arch/arm/fdt/a9ptmr_fdt.c \ src/sys/arch/arm/fdt/a9wdt_fdt.c cvs rdiff -u -r1.28 -r1.28.4.1 src/sys/arch/arm/fdt/files.fdt cvs rdiff -u -r1.33 -r1.33.4.1 src/sys/arch/evbarm/conf/BCM5301X cvs rdiff -u -r1.18 -r1.18.4.1 src/sys/arch/evbarm/conf/BCM56340 cvs rdiff -u -r1.22 -r1.22.2.1 src/sys/arch/evbarm/conf/CUBOX-I cvs rdiff -u -r1.13 -r1.13.2.1 src/sys/arch/evbarm/conf/DUOVERO cvs rdiff -u -r1.48 -r1.48.2.1 src/sys/arch/evbarm/conf/GENERIC cvs rdiff -u -r1.8 -r1.8.2.1 src/sys/arch/evbarm/conf/HUMMINGBOARD cvs rdiff -u -r1.23 -r1.23.2.1 src/sys/arch/evbarm/conf/NITROGEN6X cvs rdiff -u -r1.29 -r1.29.2.1 src/sys/arch/evbarm/conf/PANDABOARD cvs rdiff -u -r1.6 -r1.6.4.1 src/sys/arch/evbarm/conf/PARALLELLA cvs rdiff -u -r1.5 -r1.5.4.1 src/sys/arch/evbarm/conf/ZEDBOARD Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/arm/amlogic/meson8b_clkc.c diff -u src/sys/arch/arm/amlogic/meson8b_clkc.c:1.3 src/sys/arch/arm/amlogic/meson8b_clkc.c:1.3.6.1 --- src/sys/arch/arm/amlogic/meson8b_clkc.c:1.3 Mon Feb 25 19:30:17 2019 +++ src/sys/arch/arm/amlogic/meson8b_clkc.c Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: meson8b_clkc.c,v 1.3 2019/02/25 19:30:17 jmcneill Exp $ */ +/* $NetBSD: meson8b_clkc.c,v 1.3.6.1 2019/08/15 09:49:49 martin Exp $ */ /*- * Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca> @@ -28,7 +28,7 @@ #include <sys/cdefs.h> -__KERNEL_RCSID(1, "$NetBSD: meson8b_clkc.c,v 1.3 2019/02/25 19:30:17 jmcneill Exp $"); +__KERNEL_RCSID(1, "$NetBSD: meson8b_clkc.c,v 1.3.6.1 2019/08/15 09:49:49 martin Exp $"); #include <sys/param.h> #include <sys/bus.h> @@ -74,6 +74,7 @@ static int meson8b_clkc_match(device_t, static void meson8b_clkc_attach(device_t, device_t, void *); static const char * const compatible[] = { + "amlogic,meson8-clkc", "amlogic,meson8b-clkc", NULL }; @@ -333,18 +334,12 @@ meson8b_clkc_attach(device_t parent, dev { struct meson_clk_softc * const sc = device_private(self); struct fdt_attach_args * const faa = aux; - bus_addr_t addr; - bus_size_t size; sc->sc_dev = self; sc->sc_phandle = faa->faa_phandle; - sc->sc_bst = faa->faa_bst; - if (fdtbus_get_reg(sc->sc_phandle, MESON8B_CLKC_REG_INDEX, &addr, &size) != 0) { - aprint_error(": couldn't get registers\n"); - return; - } - if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { - aprint_error(": couldn't map registers\n"); + sc->sc_syscon = fdtbus_syscon_lookup(OF_parent(sc->sc_phandle)); + if (sc->sc_syscon == NULL) { + aprint_error(": couldn't get syscon registers\n"); return; } Index: src/sys/arch/arm/amlogic/meson8b_pinctrl.c diff -u src/sys/arch/arm/amlogic/meson8b_pinctrl.c:1.1 src/sys/arch/arm/amlogic/meson8b_pinctrl.c:1.1.8.1 --- src/sys/arch/arm/amlogic/meson8b_pinctrl.c:1.1 Sat Jan 19 20:56:03 2019 +++ src/sys/arch/arm/amlogic/meson8b_pinctrl.c Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: meson8b_pinctrl.c,v 1.1 2019/01/19 20:56:03 jmcneill Exp $ */ +/* $NetBSD: meson8b_pinctrl.c,v 1.1.8.1 2019/08/15 09:49:49 martin Exp $ */ /*- * Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca> @@ -27,7 +27,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: meson8b_pinctrl.c,v 1.1 2019/01/19 20:56:03 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: meson8b_pinctrl.c,v 1.1.8.1 2019/08/15 09:49:49 martin Exp $"); #include <sys/param.h> @@ -481,6 +481,8 @@ static const struct meson_pinctrl_group { "eth_ref_clk", REG6, 8, { DIF_3_N }, 1 }, { "eth_mdc", REG6, 9, { DIF_4_P }, 1 }, { "eth_mdio_en", REG6, 10, { DIF_4_N }, 1 }, + { "eth_rxd3", REG7, 22, { DIF_2_P }, 1 }, + { "eth_rxd2", REG7, 23, { DIF_2_N }, 1 }, }; static const struct meson_pinctrl_group meson8b_aobus_groups[] = { Index: src/sys/arch/arm/amlogic/meson_platform.c diff -u src/sys/arch/arm/amlogic/meson_platform.c:1.11 src/sys/arch/arm/amlogic/meson_platform.c:1.11.4.1 --- src/sys/arch/arm/amlogic/meson_platform.c:1.11 Sun Apr 21 15:57:33 2019 +++ src/sys/arch/arm/amlogic/meson_platform.c Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: meson_platform.c,v 1.11 2019/04/21 15:57:33 jmcneill Exp $ */ +/* $NetBSD: meson_platform.c,v 1.11.4.1 2019/08/15 09:49:49 martin Exp $ */ /*- * Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca> @@ -33,7 +33,7 @@ #include "arml2cc.h" #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: meson_platform.c,v 1.11 2019/04/21 15:57:33 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: meson_platform.c,v 1.11.4.1 2019/08/15 09:49:49 martin Exp $"); #include <sys/param.h> #include <sys/bus.h> @@ -256,7 +256,7 @@ meson8b_platform_device_register(device_ strcat(boot_args, rootarg); } } - + meson_platform_device_register(self, aux); } #endif @@ -447,7 +447,7 @@ static const struct arm_platform meson8b .ap_init_attach_args = meson_platform_init_attach_args, .ap_device_register = meson8b_platform_device_register, .ap_reset = meson8b_platform_reset, - .ap_delay = a9tmr_delay, + .ap_delay = a9ptmr_delay, .ap_uart_freq = meson_platform_uart_freq, .ap_mpstart = meson8b_mpstart, }; Index: src/sys/arch/arm/cortex/a9tmr_var.h diff -u src/sys/arch/arm/cortex/a9tmr_var.h:1.6 src/sys/arch/arm/cortex/a9tmr_var.h:1.6.6.1 --- src/sys/arch/arm/cortex/a9tmr_var.h:1.6 Wed Jun 20 05:01:39 2018 +++ src/sys/arch/arm/cortex/a9tmr_var.h Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: a9tmr_var.h,v 1.6 2018/06/20 05:01:39 hkenken Exp $ */ +/* $NetBSD: a9tmr_var.h,v 1.6.6.1 2019/08/15 09:49:49 martin Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. * All rights reserved. @@ -54,6 +54,9 @@ void a9tmr_cpu_initclocks(void); int a9tmr_intr(void *); void a9tmr_update_freq(uint32_t); void a9tmr_delay(unsigned int n); + +int a9ptmr_intr(void *); +void a9ptmr_delay(unsigned int n); #endif #endif /* _ARM_CORTEX_A9TMR_VAR_ */ Index: src/sys/arch/arm/cortex/a9wdt.c diff -u src/sys/arch/arm/cortex/a9wdt.c:1.8 src/sys/arch/arm/cortex/a9wdt.c:1.8.2.1 --- src/sys/arch/arm/cortex/a9wdt.c:1.8 Tue Jul 30 06:57:02 2019 +++ src/sys/arch/arm/cortex/a9wdt.c Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: a9wdt.c,v 1.8 2019/07/30 06:57:02 skrll Exp $ */ +/* $NetBSD: a9wdt.c,v 1.8.2.1 2019/08/15 09:49:49 martin Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: a9wdt.c,v 1.8 2019/07/30 06:57:02 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: a9wdt.c,v 1.8.2.1 2019/08/15 09:49:49 martin Exp $"); #include <sys/param.h> #include <sys/bus.h> @@ -67,7 +67,7 @@ struct a9wdt_softc { #define A9WDT_PERIOD_DEFAULT 12 #endif -CFATTACH_DECL_NEW(a9wdt, sizeof(struct a9wdt_softc), +CFATTACH_DECL_NEW(arma9wdt, sizeof(struct a9wdt_softc), a9wdt_match, a9wdt_attach, NULL, NULL); static bool attached; @@ -183,7 +183,7 @@ a9wdt_setmode(struct sysmon_wdog *smw) static void a9wdt_attach(device_t parent, device_t self, void *aux) { - struct a9wdt_softc * const sc = device_private(self); + struct a9wdt_softc * const sc = device_private(self); struct mpcore_attach_args * const mpcaa = aux; prop_dictionary_t dict = device_properties(self); const char *cpu_type; @@ -192,7 +192,7 @@ a9wdt_attach(device_t parent, device_t s sc->sc_memt = mpcaa->mpcaa_memt; bus_space_subregion(sc->sc_memt, mpcaa->mpcaa_memh, - TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh); + mpcaa->mpcaa_off1, TMR_WDOG_SIZE, &sc->sc_wdog_memh); /* * This runs at the ARM PERIPHCLOCK which should be 1/2 of the Index: src/sys/arch/arm/cortex/files.cortex diff -u src/sys/arch/arm/cortex/files.cortex:1.11 src/sys/arch/arm/cortex/files.cortex:1.11.4.1 --- src/sys/arch/arm/cortex/files.cortex:1.11 Mon Nov 12 12:56:05 2018 +++ src/sys/arch/arm/cortex/files.cortex Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -# $NetBSD: files.cortex,v 1.11 2018/11/12 12:56:05 jmcneill Exp $ +# $NetBSD: files.cortex,v 1.11.4.1 2019/08/15 09:49:49 martin Exp $ defflag opt_cpu_in_cksum.h NEON_IN_CKSUM @@ -37,7 +37,12 @@ device arma9tmr attach arma9tmr at mpcorebus file arch/arm/cortex/a9tmr.c arma9tmr +# A9 MPcore Private Timer +device arma9ptmr +attach arma9ptmr at mpcorebus +file arch/arm/cortex/a9ptmr.c arma9ptmr + # A9 MPcore Watchdog Timer -device a9wdt: sysmon_wdog -attach a9wdt at mpcorebus -file arch/arm/cortex/a9wdt.c a9wdt +device arma9wdt: sysmon_wdog +attach arma9wdt at mpcorebus +file arch/arm/cortex/a9wdt.c arma9wdt Index: src/sys/arch/arm/dts/meson8b-odroidc1.dts diff -u src/sys/arch/arm/dts/meson8b-odroidc1.dts:1.3 src/sys/arch/arm/dts/meson8b-odroidc1.dts:1.3.8.1 --- src/sys/arch/arm/dts/meson8b-odroidc1.dts:1.3 Sun Jan 20 00:44:01 2019 +++ src/sys/arch/arm/dts/meson8b-odroidc1.dts Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: meson8b-odroidc1.dts,v 1.3 2019/01/20 00:44:01 jmcneill Exp $ */ +/* $NetBSD: meson8b-odroidc1.dts,v 1.3.8.1 2019/08/15 09:49:49 martin Exp $ */ /*- * Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca> @@ -52,3 +52,13 @@ disable-wp; }; }; + +ðmac { + /delete-property/ snps,reset-gpio; + /delete-property/ snps,reset-active-low; + /delete-property/ snps,reset-delays-us; +}; + +&cpu0 { + /delete-property/ cpu-supply; +}; Index: src/sys/arch/arm/dts/meson8b.dtsi diff -u src/sys/arch/arm/dts/meson8b.dtsi:1.5 src/sys/arch/arm/dts/meson8b.dtsi:1.5.8.1 --- src/sys/arch/arm/dts/meson8b.dtsi:1.5 Sun Jan 20 17:57:29 2019 +++ src/sys/arch/arm/dts/meson8b.dtsi Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: meson8b.dtsi,v 1.5 2019/01/20 17:57:29 jmcneill Exp $ */ +/* $NetBSD: meson8b.dtsi,v 1.5.8.1 2019/08/15 09:49:49 martin Exp $ */ /*- * Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca> @@ -26,16 +26,7 @@ * SUCH DAMAGE. */ -#define CLKID_PERIPH 126 - / { - timer@c4300200 { - compatible = "arm,cortex-a5-global-timer"; - reg = <0xc4300200 0x20>; - interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; - clocks = <&clkc CLKID_PERIPH>; - }; - genfb: fb@c8006000 { compatible = "amlogic,meson8b-fb"; reg = <0xc8006000 0x400>, /* DMC */ @@ -43,84 +34,6 @@ <0xd0100000 0x100000>; /* VPU */ status = "disabled"; }; - - cpu_opp_table: opp-table { - compatible = "operating-points-v2"; - opp-shared; - - opp-96000000 { - opp-hz = /bits/ 64 <96000000>; - opp-microvolt = <860000>; - }; - opp-192000000 { - opp-hz = /bits/ 64 <192000000>; - opp-microvolt = <860000>; - }; - opp-312000000 { - opp-hz = /bits/ 64 <312000000>; - opp-microvolt = <860000>; - }; - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <860000>; - }; - opp-504000000 { - opp-hz = /bits/ 64 <504000000>; - opp-microvolt = <860000>; - }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <860000>; - }; - opp-720000000 { - opp-hz = /bits/ 64 <720000000>; - opp-microvolt = <860000>; - }; - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <900000>; - }; - opp-1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <1140000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1140000>; - }; - opp-1320000000 { - opp-hz = /bits/ 64 <1320000000>; - opp-microvolt = <1140000>; - }; - opp-1488000000 { - opp-hz = /bits/ 64 <1488000000>; - opp-microvolt = <1140000>; - }; - opp-1536000000 { - opp-hz = /bits/ 64 <1536000000>; - opp-microvolt = <1140000>; - }; - }; -}; - -&cpu0 { - operating-points-v2 = <&cpu_opp_table>; - clocks = <&clkc CLKID_CPUCLK>; -}; - -&cpu1 { - operating-points-v2 = <&cpu_opp_table>; - clocks = <&clkc CLKID_CPUCLK>; -}; - -&cpu2 { - operating-points-v2 = <&cpu_opp_table>; - clocks = <&clkc CLKID_CPUCLK>; -}; - -&cpu3 { - operating-points-v2 = <&cpu_opp_table>; - clocks = <&clkc CLKID_CPUCLK>; }; &pinctrl_cbus { Index: src/sys/arch/arm/fdt/files.fdt diff -u src/sys/arch/arm/fdt/files.fdt:1.28 src/sys/arch/arm/fdt/files.fdt:1.28.4.1 --- src/sys/arch/arm/fdt/files.fdt:1.28 Wed Dec 5 21:43:33 2018 +++ src/sys/arch/arm/fdt/files.fdt Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -# $NetBSD: files.fdt,v 1.28 2018/12/05 21:43:33 jmcneill Exp $ +# $NetBSD: files.fdt,v 1.28.4.1 2019/08/15 09:49:49 martin Exp $ include "dev/pckbport/files.pckbport" @@ -17,6 +17,14 @@ device a9tmr: mpcorebus attach a9tmr at fdt with a9tmr_fdt file arch/arm/fdt/a9tmr_fdt.c a9tmr_fdt +device a9ptmr: mpcorebus +attach a9ptmr at fdt with a9ptmr_fdt +file arch/arm/fdt/a9ptmr_fdt.c a9ptmr_fdt + +device a9wdt: mpcorebus +attach a9wdt at fdt with a9wdt_fdt +file arch/arm/fdt/a9wdt_fdt.c a9wdt_fdt + device gtmr: mpcorebus attach gtmr at fdt with gtmr_fdt file arch/arm/fdt/gtmr_fdt.c gtmr_fdt Index: src/sys/arch/evbarm/conf/BCM5301X diff -u src/sys/arch/evbarm/conf/BCM5301X:1.33 src/sys/arch/evbarm/conf/BCM5301X:1.33.4.1 --- src/sys/arch/evbarm/conf/BCM5301X:1.33 Tue Oct 23 19:58:52 2018 +++ src/sys/arch/evbarm/conf/BCM5301X Thu Aug 15 09:49:49 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: BCM5301X,v 1.33 2018/10/23 19:58:52 jdolecek Exp $ +# $NetBSD: BCM5301X,v 1.33.4.1 2019/08/15 09:49:49 martin Exp $ # # BCM5301X -- Broadcom BCM5301X Eval Board Kernel # @@ -170,7 +170,7 @@ armperiph0 at mainbus? # A9 On-Chip Per armgic0 at armperiph? # ARM Generic Interrupt Controller arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC arma9tmr0 at armperiph? # A9 Global Timer -a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer +arma9wdt0 at armperiph? flags 1 # A9 Watchdog Timer # ChipCommonA Peripherals bcmcca0 at mainbus? # ChipCommonA Index: src/sys/arch/evbarm/conf/BCM56340 diff -u src/sys/arch/evbarm/conf/BCM56340:1.18 src/sys/arch/evbarm/conf/BCM56340:1.18.4.1 --- src/sys/arch/evbarm/conf/BCM56340:1.18 Tue Oct 23 19:58:52 2018 +++ src/sys/arch/evbarm/conf/BCM56340 Thu Aug 15 09:49:49 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: BCM56340,v 1.18 2018/10/23 19:58:52 jdolecek Exp $ +# $NetBSD: BCM56340,v 1.18.4.1 2019/08/15 09:49:49 martin Exp $ # # BCM5301X -- Broadcom BCM5301X Eval Board Kernel # @@ -170,7 +170,7 @@ armperiph0 at mainbus? # A9 On-Chip Per armgic0 at armperiph? # ARM Generic Interrupt Controller arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC arma9tmr0 at armperiph? # A9 Global Timer -a9wdt0 at armperiph? flags 1 # A9 Watchdog Timer +arma9wdt0 at armperiph? flags 1 # A9 Watchdog Timer # ChipCommonA Peripherals bcmcca0 at mainbus? # ChipCommonA Index: src/sys/arch/evbarm/conf/CUBOX-I diff -u src/sys/arch/evbarm/conf/CUBOX-I:1.22 src/sys/arch/evbarm/conf/CUBOX-I:1.22.2.1 --- src/sys/arch/evbarm/conf/CUBOX-I:1.22 Mon Jul 29 11:11:19 2019 +++ src/sys/arch/evbarm/conf/CUBOX-I Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -# $NetBSD: CUBOX-I,v 1.22 2019/07/29 11:11:19 martin Exp $ +# $NetBSD: CUBOX-I,v 1.22.2.1 2019/08/15 09:49:49 martin Exp $ # # CuBox-i # - http://www.solid-run.com/products/cubox-i-mini-computer/ @@ -192,7 +192,7 @@ armperiph0 at mainbus? # A9 On-Chip Per armgic0 at armperiph? # ARM Generic Interrupt Controller arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC arma9tmr0 at armperiph? # A9 Global Timer -#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer +#arma9wdt0 at armperiph? flags 0 # A9 Watchdog Timer axi0 at mainbus? Index: src/sys/arch/evbarm/conf/DUOVERO diff -u src/sys/arch/evbarm/conf/DUOVERO:1.13 src/sys/arch/evbarm/conf/DUOVERO:1.13.2.1 --- src/sys/arch/evbarm/conf/DUOVERO:1.13 Fri Apr 26 22:46:03 2019 +++ src/sys/arch/evbarm/conf/DUOVERO Thu Aug 15 09:49:49 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: DUOVERO,v 1.13 2019/04/26 22:46:03 sevan Exp $ +# $NetBSD: DUOVERO,v 1.13.2.1 2019/08/15 09:49:49 martin Exp $ # # DUOOVERO -- Gumstix. Inc. DuoVero COMS platforms kernel # @@ -154,7 +154,7 @@ armperiph0 at mainbus? arml2cc0 at armperiph? # L2 Cache Controller armgic0 at armperiph? # Interrupt Controller arma9tmr0 at armperiph? # Global Timer -a9wdt0 at armperiph? # Watchdog +arma9wdt0 at armperiph? # Watchdog # L3 Interconnect L3i0 at mainbus? Index: src/sys/arch/evbarm/conf/GENERIC diff -u src/sys/arch/evbarm/conf/GENERIC:1.48 src/sys/arch/evbarm/conf/GENERIC:1.48.2.1 --- src/sys/arch/evbarm/conf/GENERIC:1.48 Thu Jul 25 20:27:45 2019 +++ src/sys/arch/evbarm/conf/GENERIC Thu Aug 15 09:49:49 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: GENERIC,v 1.48 2019/07/25 20:27:45 skrll Exp $ +# $NetBSD: GENERIC,v 1.48.2.1 2019/08/15 09:49:49 martin Exp $ # # GENERIC ARM (aarch32) kernel # @@ -298,6 +298,8 @@ syscon* at fdt? pass 1 # Generic Syste #zynqslcr* at fdt? pass 1 # Zynq 7000 system Controller # Timer +a9ptmr* at fdt? pass 2 # ARM Cortex A5/A9 Private Timer +arma9ptmr* at a9ptmr? a9tmr* at fdt? pass 2 # ARM Cortex A5/A9 Timer arma9tmr* at a9tmr? gtmr* at fdt? pass 1 # ARM Generic Timer Index: src/sys/arch/evbarm/conf/HUMMINGBOARD diff -u src/sys/arch/evbarm/conf/HUMMINGBOARD:1.8 src/sys/arch/evbarm/conf/HUMMINGBOARD:1.8.2.1 --- src/sys/arch/evbarm/conf/HUMMINGBOARD:1.8 Wed Jul 24 12:33:18 2019 +++ src/sys/arch/evbarm/conf/HUMMINGBOARD Thu Aug 15 09:49:49 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: HUMMINGBOARD,v 1.8 2019/07/24 12:33:18 hkenken Exp $ +# $NetBSD: HUMMINGBOARD,v 1.8.2.1 2019/08/15 09:49:49 martin Exp $ # # Hummingboard -- Freescale i.MX6 Eval Board Kernel # @@ -58,7 +58,7 @@ armperiph0 at mainbus? # A9 On-Chip Per armgic0 at armperiph? # ARM Generic Interrupt Controller arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC arma9tmr0 at armperiph? # A9 Global Timer -#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer +#arma9wdt0 at armperiph? flags 0 # A9 Watchdog Timer axi0 at mainbus? Index: src/sys/arch/evbarm/conf/NITROGEN6X diff -u src/sys/arch/evbarm/conf/NITROGEN6X:1.23 src/sys/arch/evbarm/conf/NITROGEN6X:1.23.2.1 --- src/sys/arch/evbarm/conf/NITROGEN6X:1.23 Wed Jul 24 12:33:18 2019 +++ src/sys/arch/evbarm/conf/NITROGEN6X Thu Aug 15 09:49:49 2019 @@ -1,4 +1,4 @@ -# $NetBSD: NITROGEN6X,v 1.23 2019/07/24 12:33:18 hkenken Exp $ +# $NetBSD: NITROGEN6X,v 1.23.2.1 2019/08/15 09:49:49 martin Exp $ # # Nitrogen6X # - http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/ @@ -45,7 +45,7 @@ armperiph0 at mainbus? # A9 On-Chip Per armgic0 at armperiph? # ARM Generic Interrupt Controller arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC arma9tmr0 at armperiph? # A9 Global Timer -#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer +#arma9wdt0 at armperiph? flags 0 # A9 Watchdog Timer axi0 at mainbus? Index: src/sys/arch/evbarm/conf/PANDABOARD diff -u src/sys/arch/evbarm/conf/PANDABOARD:1.29 src/sys/arch/evbarm/conf/PANDABOARD:1.29.2.1 --- src/sys/arch/evbarm/conf/PANDABOARD:1.29 Sat May 18 08:49:23 2019 +++ src/sys/arch/evbarm/conf/PANDABOARD Thu Aug 15 09:49:49 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: PANDABOARD,v 1.29 2019/05/18 08:49:23 skrll Exp $ +# $NetBSD: PANDABOARD,v 1.29.2.1 2019/08/15 09:49:49 martin Exp $ # # PANDABOARD -- TI OMAP 4430 Eval Board Kernel # @@ -156,7 +156,7 @@ armperiph0 at mainbus? arml2cc0 at armperiph? # L2 Cache Controller armgic0 at armperiph? # Interrupt Controller arma9tmr0 at armperiph? # Global Timer -a9wdt0 at armperiph? # Watchdog +arma9wdt0 at armperiph? # Watchdog # Specify the memory size in megabytes. #options MEMSIZE=512 Index: src/sys/arch/evbarm/conf/PARALLELLA diff -u src/sys/arch/evbarm/conf/PARALLELLA:1.6 src/sys/arch/evbarm/conf/PARALLELLA:1.6.4.1 --- src/sys/arch/evbarm/conf/PARALLELLA:1.6 Wed Feb 6 11:58:30 2019 +++ src/sys/arch/evbarm/conf/PARALLELLA Thu Aug 15 09:49:49 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: PARALLELLA,v 1.6 2019/02/06 11:58:30 rin Exp $ +# $NetBSD: PARALLELLA,v 1.6.4.1 2019/08/15 09:49:49 martin Exp $ # # Parallella -- Xilinx Zynq Eval Board Kernel # @@ -61,7 +61,7 @@ armperiph0 at mainbus? # A9 On-Chip Per armgic0 at armperiph? # ARM Generic Interrupt Controller arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC arma9tmr0 at armperiph? # A9 Global Timer -#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer +#arma9wdt0 at armperiph? flags 0 # A9 Watchdog Timer axi0 at mainbus? Index: src/sys/arch/evbarm/conf/ZEDBOARD diff -u src/sys/arch/evbarm/conf/ZEDBOARD:1.5 src/sys/arch/evbarm/conf/ZEDBOARD:1.5.4.1 --- src/sys/arch/evbarm/conf/ZEDBOARD:1.5 Wed Feb 6 11:58:31 2019 +++ src/sys/arch/evbarm/conf/ZEDBOARD Thu Aug 15 09:49:49 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: ZEDBOARD,v 1.5 2019/02/06 11:58:31 rin Exp $ +# $NetBSD: ZEDBOARD,v 1.5.4.1 2019/08/15 09:49:49 martin Exp $ # # ZedBoard -- Xilinx Zynq Eval Board Kernel # @@ -58,7 +58,7 @@ armperiph0 at mainbus? # A9 On-Chip Per armgic0 at armperiph? # ARM Generic Interrupt Controller arml2cc0 at armperiph? flags 0 # ARM PL310 L2CC arma9tmr0 at armperiph? # A9 Global Timer -#a9wdt0 at armperiph? flags 0 # A9 Watchdog Timer +#arma9wdt0 at armperiph? flags 0 # A9 Watchdog Timer axi0 at mainbus? Added files: Index: src/sys/arch/arm/cortex/a9ptmr.c diff -u /dev/null src/sys/arch/arm/cortex/a9ptmr.c:1.2.2.2 --- /dev/null Thu Aug 15 09:49:50 2019 +++ src/sys/arch/arm/cortex/a9ptmr.c Thu Aug 15 09:49:49 2019 @@ -0,0 +1,267 @@ +/* $NetBSD: a9ptmr.c,v 1.2.2.2 2019/08/15 09:49:49 martin Exp $ */ + +/*- + * Copyright (c) 2019 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Nick Hudson + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__KERNEL_RCSID(0, "$NetBSD: a9ptmr.c,v 1.2.2.2 2019/08/15 09:49:49 martin Exp $"); + +#include <sys/param.h> +#include <sys/bus.h> +#include <sys/cpu.h> +#include <sys/device.h> +#include <sys/kernel.h> + +#include <prop/proplib.h> + +#include <arm/cortex/a9tmr_reg.h> +#include <arm/cortex/a9ptmr_var.h> + +#include <arm/cortex/mpcore_var.h> + +static struct a9ptmr_softc *a9ptmr_sc; + +static int a9ptmr_match(device_t, cfdata_t, void *); +static void a9ptmr_attach(device_t, device_t, void *); + +struct a9ptmr_softc { + device_t sc_dev; + bus_space_tag_t sc_memt; + bus_space_handle_t sc_memh; + + uint32_t sc_ctl; + uint32_t sc_freq; + uint32_t sc_load; + + uint32_t sc_prescaler; +}; + + +CFATTACH_DECL_NEW(arma9ptmr, sizeof(struct a9ptmr_softc), + a9ptmr_match, a9ptmr_attach, NULL, NULL); + +static bool attached; + +static inline uint32_t +a9ptmr_read(struct a9ptmr_softc *sc, bus_size_t o) +{ + return bus_space_read_4(sc->sc_memt, sc->sc_memh, o); +} + +static inline void +a9ptmr_write(struct a9ptmr_softc *sc, bus_size_t o, uint32_t v) +{ + bus_space_write_4(sc->sc_memt, sc->sc_memh, o, v); +} + +/* ARGSUSED */ +static int +a9ptmr_match(device_t parent, cfdata_t cf, void *aux) +{ + struct mpcore_attach_args * const mpcaa = aux; + + if (attached) + return 0; + + if (!CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid) && + !CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) + return 0; + + if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) + return 0; + +#if 0 + /* + * This isn't present on UP A9s (since CBAR isn't present). + */ + uint32_t mpidr = armreg_mpidr_read(); + if (mpidr == 0 || (mpidr & MPIDR_U)) + return 0; +#endif + + return 1; +} + + +static void +a9ptmr_attach(device_t parent, device_t self, void *aux) +{ + struct a9ptmr_softc * const sc = device_private(self); + struct mpcore_attach_args * const mpcaa = aux; + prop_dictionary_t dict = device_properties(self); + char freqbuf[sizeof("XXX SHz")]; + const char *cpu_type; + + + sc->sc_dev = self; + sc->sc_memt = mpcaa->mpcaa_memt; + + bus_space_subregion(sc->sc_memt, mpcaa->mpcaa_memh, + mpcaa->mpcaa_off1, TMR_PRIVATE_SIZE, &sc->sc_memh); + + /* + * This runs at the ARM PERIPHCLOCK. + * The MD code should have setup our frequency for us. + */ + if (!prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq)) { + dict = device_properties(parent); + prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); + } + + humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); + + a9ptmr_sc = sc; + sc->sc_dev = self; + sc->sc_memt = mpcaa->mpcaa_memt; + sc->sc_memh = mpcaa->mpcaa_memh; + + sc->sc_ctl = a9ptmr_read(sc, TMR_CTL); + + sc->sc_prescaler = 1; +#if 0 + /* + * Let's hope the timer frequency isn't prime. + */ + for (size_t div = 256; div >= 2; div--) { + if (sc->sc_freq % div == 0) { + sc->sc_prescaler = div; + break; + } + } + sc->sc_freq /= sc->sc_prescaler; +#endif + + aprint_debug(": freq %d prescaler %d", sc->sc_freq, + sc->sc_prescaler); + sc->sc_ctl = TMR_CTL_INT_ENABLE | TMR_CTL_AUTO_RELOAD | TMR_CTL_ENABLE; + sc->sc_ctl |= __SHIFTIN(sc->sc_prescaler - 1, TMR_CTL_PRESCALER); + + sc->sc_load = (sc->sc_freq / hz) - 1; + + aprint_debug(": load %d ", sc->sc_load); + + a9ptmr_init_cpu_clock(curcpu()); + + aprint_naive("\n"); + if (CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) { + cpu_type = "A5"; + } else { + cpu_type = "A9"; + } + aprint_normal(": %s Private Timer (%s)\n", cpu_type, freqbuf); + + attached = true; +} + + + +void +a9ptmr_delay(unsigned int n) +{ + struct a9ptmr_softc * const sc = a9ptmr_sc; + + KASSERT(sc != NULL); + + uint32_t freq = sc->sc_freq ? sc->sc_freq : + curcpu()->ci_data.cpu_cc_freq / 2; + KASSERT(freq != 0); + + const uint64_t counts_per_usec = freq / 1000000; + uint32_t delta, usecs, last, curr; + + KASSERT(sc != NULL); + + last = a9ptmr_read(sc, TMR_CTR); + + delta = usecs = 0; + while (n > usecs) { + curr = a9ptmr_read(sc, TMR_CTR); + + /* Check to see if the timer has reloaded. */ + if (curr > last) + delta += (sc->sc_load - curr) + last; + else + delta += last - curr; + + last = curr; + + if (delta >= counts_per_usec) { + usecs += delta / counts_per_usec; + delta %= counts_per_usec; + } + } +} + + +void +a9ptmr_cpu_initclocks(void) +{ + struct a9ptmr_softc * const sc __diagused = a9ptmr_sc; + + KASSERT(sc->sc_dev != NULL); + KASSERT(sc->sc_freq != 0); + +} + +void +a9ptmr_init_cpu_clock(struct cpu_info *ci) +{ + struct a9ptmr_softc * const sc = a9ptmr_sc; + + /* Disable Private timer and acknowledge any event */ + a9ptmr_write(sc, TMR_CTL, 0); + a9ptmr_write(sc, TMR_INT, TMR_INT_EVENT); + + /* + * Provide the auto load value for the decrementing counter and + * start it. + */ + a9ptmr_write(sc, TMR_LOAD, sc->sc_load); + a9ptmr_write(sc, TMR_CTL, sc->sc_ctl); + +} + + + +/* + * a9ptmr_intr: + * + * Handle the hardclock interrupt. + */ +int +a9ptmr_intr(void *arg) +{ + struct clockframe * const cf = arg; + struct a9ptmr_softc * const sc = a9ptmr_sc; + + a9ptmr_write(sc, TMR_INT, TMR_INT_EVENT); + hardclock(cf); + + return 1; +} Index: src/sys/arch/arm/cortex/a9ptmr_var.h diff -u /dev/null src/sys/arch/arm/cortex/a9ptmr_var.h:1.1.2.2 --- /dev/null Thu Aug 15 09:49:50 2019 +++ src/sys/arch/arm/cortex/a9ptmr_var.h Thu Aug 15 09:49:49 2019 @@ -0,0 +1,45 @@ +/* $NetBSD: a9ptmr_var.h,v 1.1.2.2 2019/08/15 09:49:49 martin Exp $ */ +/*- + * Copyright (c) 2012 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _ARM_CORTEX_A9PTMR_VAR_ +#define _ARM_CORTEX_A9PTMR_VAR_ + +#ifdef _KERNEL + +void a9ptmr_cpu_initclocks(void); + +struct cpu_info; +void a9ptmr_init_cpu_clock(struct cpu_info *); + +int a9ptmr_intr(void *); +void a9ptmr_delay(unsigned int n); +#endif + +#endif /* _ARM_CORTEX_A9PTMR_VAR_ */ Index: src/sys/arch/arm/fdt/a9ptmr_fdt.c diff -u /dev/null src/sys/arch/arm/fdt/a9ptmr_fdt.c:1.1.2.2 --- /dev/null Thu Aug 15 09:49:50 2019 +++ src/sys/arch/arm/fdt/a9ptmr_fdt.c Thu Aug 15 09:49:49 2019 @@ -0,0 +1,141 @@ +/* $NetBSD: a9ptmr_fdt.c,v 1.1.2.2 2019/08/15 09:49:49 martin Exp $ */ + +/*- + * Copyright (c) 2019 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Nick Hudson + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__KERNEL_RCSID(0, "$NetBSD: a9ptmr_fdt.c,v 1.1.2.2 2019/08/15 09:49:49 martin Exp $"); + +#include <sys/param.h> +#include <sys/bus.h> + +#include <sys/device.h> +#include <sys/intr.h> + +#include <arm/cortex/mpcore_var.h> +#include <arm/cortex/a9ptmr_var.h> + +#include <dev/fdt/fdtvar.h> +#include <arm/fdt/arm_fdtvar.h> + +static int a9ptmr_fdt_match(device_t, cfdata_t, void *); +static void a9ptmr_fdt_attach(device_t, device_t, void *); + +static void a9ptmr_fdt_cpu_hatch(void *, struct cpu_info *); + +struct a9ptmr_fdt_softc { + device_t sc_dev; + struct clk *sc_clk; +}; + +CFATTACH_DECL_NEW(a9ptmr_fdt, sizeof(struct a9ptmr_fdt_softc), + a9ptmr_fdt_match, a9ptmr_fdt_attach, NULL, NULL); + +static int +a9ptmr_fdt_match(device_t parent, cfdata_t cf, void *aux) +{ + const char * const compatible[] = { + "arm,cortex-a9-twd-timer", + "arm,cortex-a5-twd-timer", + NULL + }; + struct fdt_attach_args * const faa = aux; + + return of_compatible(faa->faa_phandle, compatible) >= 0; +} + +static void +a9ptmr_fdt_attach(device_t parent, device_t self, void *aux) +{ + struct a9ptmr_fdt_softc * const sc = device_private(self); + struct fdt_attach_args * const faa = aux; + const int phandle = faa->faa_phandle; + bus_space_handle_t bsh; + + sc->sc_dev = self; + sc->sc_clk = fdtbus_clock_get_index(phandle, 0); + if (sc->sc_clk == NULL) { + aprint_error(": couldn't get clock\n"); + return; + } + if (clk_enable(sc->sc_clk) != 0) { + aprint_error(": couldn't enable clock\n"); + return; + } + + uint32_t rate = clk_get_rate(sc->sc_clk); + prop_dictionary_t dict = device_properties(self); + prop_dictionary_set_uint32(dict, "frequency", rate); + + char intrstr[128]; + if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { + aprint_error(": failed to decode interrupt\n"); + return; + } + + aprint_naive("\n"); + aprint_normal("\n"); + + void *ih = fdtbus_intr_establish(phandle, 0, IPL_CLOCK, + FDT_INTR_MPSAFE, a9ptmr_intr, NULL); + if (ih == NULL) { + aprint_error_dev(self, "couldn't install interrupt handler\n"); + return; + } + aprint_normal_dev(self, "interrupting on %s\n", intrstr); + + bus_addr_t addr; + bus_size_t size; + if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { + aprint_error(": couldn't get registers\n"); + return; + } + if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) { + aprint_error(": couldn't map registers\n"); + return; + } + + struct mpcore_attach_args mpcaa = { + .mpcaa_name = "arma9ptmr", + .mpcaa_memt = faa->faa_bst, + .mpcaa_memh = bsh, + .mpcaa_irq = -1, + }; + + config_found(self, &mpcaa, NULL); + + arm_fdt_cpu_hatch_register(self, a9ptmr_fdt_cpu_hatch); + arm_fdt_timer_register(a9ptmr_cpu_initclocks); +} + +static void +a9ptmr_fdt_cpu_hatch(void *priv, struct cpu_info *ci) +{ + a9ptmr_init_cpu_clock(ci); +} Index: src/sys/arch/arm/fdt/a9wdt_fdt.c diff -u /dev/null src/sys/arch/arm/fdt/a9wdt_fdt.c:1.1.2.2 --- /dev/null Thu Aug 15 09:49:50 2019 +++ src/sys/arch/arm/fdt/a9wdt_fdt.c Thu Aug 15 09:49:49 2019 @@ -0,0 +1,122 @@ +/* $NetBSD: a9wdt_fdt.c,v 1.1.2.2 2019/08/15 09:49:49 martin Exp $ */ + +/*- + * Copyright (c) 2019 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Nick Hudson + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__KERNEL_RCSID(0, "$NetBSD: a9wdt_fdt.c,v 1.1.2.2 2019/08/15 09:49:49 martin Exp $"); + +#if 0 +#include <sys/param.h> +#include <sys/bus.h> +#include <sys/device.h> +#include <sys/intr.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/kmem.h> + +#include <arm/cortex/a9tmr_intr.h> +#include <arm/cortex/mpcore_var.h> +#include <arm/cortex/a9tmr_var.h> +#endif + + +#include <sys/param.h> +#include <sys/bus.h> + +#include <arm/cortex/mpcore_var.h> + + +#include <dev/fdt/fdtvar.h> +#include <arm/fdt/arm_fdtvar.h> + +static int a9wdt_fdt_match(device_t, cfdata_t, void *); +static void a9wdt_fdt_attach(device_t, device_t, void *); + +struct a9wdt_fdt_softc { + device_t sc_dev; + struct clk *sc_clk; +}; + +CFATTACH_DECL_NEW(a9wdt_fdt, sizeof(struct a9wdt_fdt_softc), + a9wdt_fdt_match, a9wdt_fdt_attach, NULL, NULL); + +static int +a9wdt_fdt_match(device_t parent, cfdata_t cf, void *aux) +{ + const char * const compatible[] = { + "arm,cortex-a9-twd-wdt", + "arm,cortex-a5-twd-wdt", + NULL + }; + struct fdt_attach_args * const faa = aux; + + return of_compatible(faa->faa_phandle, compatible) >= 0; +} + +static void +a9wdt_fdt_attach(device_t parent, device_t self, void *aux) +{ + struct a9wdt_fdt_softc * const sc = device_private(self); + struct fdt_attach_args * const faa = aux; + const int phandle = faa->faa_phandle; + bus_space_handle_t bsh; + + sc->sc_dev = self; + + char intrstr[128]; + if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { + aprint_error(": failed to decode interrupt\n"); + return; + } + + aprint_naive("\n"); + aprint_normal("\n"); + + bus_addr_t addr; + bus_size_t size; + if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { + aprint_error(": couldn't get registers\n"); + return; + } + if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) { + aprint_error(": couldn't map registers\n"); + return; + } + + struct mpcore_attach_args mpcaa = { + .mpcaa_name = "a9wdt", + .mpcaa_memt = faa->faa_bst, + .mpcaa_memh = bsh, + .mpcaa_irq = -1, + }; + + config_found(self, &mpcaa, NULL); +} +