Module Name:    src
Committed By:   msaitoh
Date:           Sat Aug 17 15:50:05 UTC 2019

Modified Files:
        src/sys/external/bsd/drm2/dist/drm/radeon: r600d.h radeon_r600.c
            radeon_uvd_v1_0.c

Log Message:
 Use unsigned to avoid undefined behavior. Found by kUBSan.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/external/bsd/drm2/dist/drm/radeon/r600d.h \
    src/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c
cvs rdiff -u -r1.1 -r1.2 \
    src/sys/external/bsd/drm2/dist/drm/radeon/radeon_r600.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/external/bsd/drm2/dist/drm/radeon/r600d.h
diff -u src/sys/external/bsd/drm2/dist/drm/radeon/r600d.h:1.2 src/sys/external/bsd/drm2/dist/drm/radeon/r600d.h:1.3
--- src/sys/external/bsd/drm2/dist/drm/radeon/r600d.h:1.2	Mon Aug 27 04:58:36 2018
+++ src/sys/external/bsd/drm2/dist/drm/radeon/r600d.h	Sat Aug 17 15:50:05 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: r600d.h,v 1.2 2018/08/27 04:58:36 riastradh Exp $	*/
+/*	$NetBSD: r600d.h,v 1.3 2019/08/17 15:50:05 msaitoh Exp $	*/
 
 /*
  * Copyright 2009 Advanced Micro Devices, Inc.
@@ -198,7 +198,7 @@
 #define		RB_BUFSZ(x)					((x) << 0)
 #define		RB_BLKSZ(x)					((x) << 8)
 #define		RB_NO_UPDATE					(1 << 27)
-#define		RB_RPTR_WR_ENA					(1 << 31)
+#define		RB_RPTR_WR_ENA					(1U << 31)
 #define		BUF_SWAP_32BIT					(2 << 16)
 #define	CP_RB_RPTR					0x8700
 #define	CP_RB_RPTR_ADDR					0xC10C
@@ -292,7 +292,7 @@
 #       define GRBM_READ_TIMEOUT(x)                     ((x) << 0)
 #define	GRBM_STATUS					0x8010
 #define		CMDFIFO_AVAIL_MASK				0x0000001F
-#define		GUI_ACTIVE					(1<<31)
+#define		GUI_ACTIVE					(1U<<31)
 #define	GRBM_STATUS2					0x8014
 #define	GRBM_SOFT_RESET					0x8020
 #define		SOFT_RESET_CP					(1<<0)
@@ -665,7 +665,7 @@
 #       define IH_WPTR_WRITEBACK_ENABLE                   (1 << 8)
 #       define IH_WPTR_WRITEBACK_TIMER(x)                 ((x) << 9) /* log2 */
 #       define IH_WPTR_OVERFLOW_ENABLE                    (1 << 16)
-#       define IH_WPTR_OVERFLOW_CLEAR                     (1 << 31)
+#       define IH_WPTR_OVERFLOW_CLEAR                     (1U << 31)
 #define IH_RB_BASE                                        0x3e04
 #define IH_RB_RPTR                                        0x3e08
 #define IH_RB_WPTR                                        0x3e0c
@@ -720,7 +720,7 @@
 #       define TIME_STAMP_INT_ENABLE                      (1 << 26)
 #       define IB2_INT_ENABLE                             (1 << 29)
 #       define IB1_INT_ENABLE                             (1 << 30)
-#       define RB_INT_ENABLE                              (1 << 31)
+#       define RB_INT_ENABLE                              (1U << 31)
 #define CP_INT_STATUS                                     0xc128
 #       define SCRATCH_INT_STAT                           (1 << 25)
 #       define TIME_STAMP_INT_STAT                        (1 << 26)
@@ -935,7 +935,7 @@
 #       define JACK_DETECTION_ENABLE      (1 << 4)
 #       define UNSOLICITED_RESPONSE_ENABLE (1 << 8)
 #       define CODEC_HOT_PLUG_ENABLE      (1 << 12)
-#       define AUDIO_ENABLED              (1 << 31)
+#       define AUDIO_ENABLED              (1U << 31)
 /* DCE3 adds */
 #       define PIN0_JACK_DETECTION_ENABLE (1 << 4)
 #       define PIN1_JACK_DETECTION_ENABLE (1 << 5)
Index: src/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c
diff -u src/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c:1.2 src/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c:1.3
--- src/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c:1.2	Fri Aug  9 06:27:21 2019
+++ src/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c	Sat Aug 17 15:50:05 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: radeon_uvd_v1_0.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $	*/
+/*	$NetBSD: radeon_uvd_v1_0.c,v 1.3 2019/08/17 15:50:05 msaitoh Exp $	*/
 
 /*
  * Copyright 2013 Advanced Micro Devices, Inc.
@@ -25,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v1_0.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v1_0.c,v 1.3 2019/08/17 15:50:05 msaitoh Exp $");
 
 #include <linux/firmware.h>
 #include <drm/drmP.h>
@@ -144,7 +144,7 @@ int uvd_v1_0_resume(struct radeon_device
 
 	/* bits 32-39 */
 	addr = (rdev->uvd.gpu_addr >> 32) & 0xFF;
-	WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));
+	WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1U << 31));
 
 	WREG32(UVD_FW_START, *((uint32_t*)rdev->uvd.cpu_addr));
 

Index: src/sys/external/bsd/drm2/dist/drm/radeon/radeon_r600.c
diff -u src/sys/external/bsd/drm2/dist/drm/radeon/radeon_r600.c:1.1 src/sys/external/bsd/drm2/dist/drm/radeon/radeon_r600.c:1.2
--- src/sys/external/bsd/drm2/dist/drm/radeon/radeon_r600.c:1.1	Mon Aug 27 14:38:20 2018
+++ src/sys/external/bsd/drm2/dist/drm/radeon/radeon_r600.c	Sat Aug 17 15:50:05 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: radeon_r600.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $	*/
+/*	$NetBSD: radeon_r600.c,v 1.2 2019/08/17 15:50:05 msaitoh Exp $	*/
 
 /*
  * Copyright 2008 Advanced Micro Devices, Inc.
@@ -28,7 +28,7 @@
  *          Jerome Glisse
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_r600.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_r600.c,v 1.2 2019/08/17 15:50:05 msaitoh Exp $");
 
 #include <linux/bitops.h>
 #include <linux/slab.h>
@@ -2224,13 +2224,13 @@ static void r600_gpu_init(struct radeon_
 	sq_config &= ~(PS_PRIO(3) |
 		       VS_PRIO(3) |
 		       GS_PRIO(3) |
-		       ES_PRIO(3));
+		       ES_PRIO(3U));
 	sq_config |= (DX9_CONSTS |
 		      VC_ENABLE |
 		      PS_PRIO(0) |
 		      VS_PRIO(1) |
 		      GS_PRIO(2) |
-		      ES_PRIO(3));
+		      ES_PRIO(3U));
 
 	if ((rdev->family) == CHIP_R600) {
 		sq_gpr_resource_mgmt_1 = (NUM_PS_GPRS(124) |
@@ -2319,15 +2319,15 @@ static void r600_gpu_init(struct radeon_
 	WREG32(PA_SC_AA_SAMPLE_LOCS_4S, (S0_X(0xe) | S0_Y(0xe) |
 					 S1_X(0x2) | S1_Y(0x2) |
 					 S2_X(0xa) | S2_Y(0x6) |
-					 S3_X(0x6) | S3_Y(0xa)));
+					 S3_X(0x6) | S3_Y(0xaU)));
 	WREG32(PA_SC_AA_SAMPLE_LOCS_8S_WD0, (S0_X(0xe) | S0_Y(0xb) |
 					     S1_X(0x4) | S1_Y(0xc) |
 					     S2_X(0x1) | S2_Y(0x6) |
-					     S3_X(0xa) | S3_Y(0xe)));
+					     S3_X(0xa) | S3_Y(0xeU)));
 	WREG32(PA_SC_AA_SAMPLE_LOCS_8S_WD1, (S4_X(0x6) | S4_Y(0x1) |
 					     S5_X(0x0) | S5_Y(0x0) |
 					     S6_X(0xb) | S6_Y(0x4) |
-					     S7_X(0x7) | S7_Y(0x8)));
+					     S7_X(0x7) | S7_Y(0x8U)));
 
 	WREG32(VGT_STRMOUT_EN, 0);
 	tmp = rdev->config.r600.max_pipes * 16;

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