Module Name: src Committed By: bouyer Date: Thu Sep 5 16:15:57 UTC 2019
Modified Files: src/sys/arch/evbarm/conf: GENERIC Added Files: src/sys/arch/arm/dts: sun7i-a20-olinuxino-lime2-emmc-spi.dts Log Message: Add spiflash support in GENERIC Add a dts enabling spi0 and attaching the SPI flash for newer lime2-emmc boards. To generate a diff of this commit: cvs rdiff -u -r0 -r1.1 \ src/sys/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc-spi.dts cvs rdiff -u -r1.51 -r1.52 src/sys/arch/evbarm/conf/GENERIC Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/evbarm/conf/GENERIC diff -u src/sys/arch/evbarm/conf/GENERIC:1.51 src/sys/arch/evbarm/conf/GENERIC:1.52 --- src/sys/arch/evbarm/conf/GENERIC:1.51 Wed Aug 14 15:08:53 2019 +++ src/sys/arch/evbarm/conf/GENERIC Thu Sep 5 16:15:57 2019 @@ -1,5 +1,5 @@ # -# $NetBSD: GENERIC,v 1.51 2019/08/14 15:08:53 skrll Exp $ +# $NetBSD: GENERIC,v 1.52 2019/09/05 16:15:57 bouyer Exp $ # # GENERIC ARM (aarch32) kernel # @@ -96,6 +96,7 @@ makeoptions DTS=" sun7i-a20-olimex-som204-evb-emmc.dts sun7i-a20-olimex-som204-evb.dts sun7i-a20-olinuxino-lime.dts + sun7i-a20-olinuxino-lime2-emmc-spi.dts sun7i-a20-olinuxino-lime2-emmc.dts sun7i-a20-olinuxino-lime2.dts sun7i-a20-olinuxino-micro-emmc.dts @@ -643,6 +644,10 @@ ss* at scsibus? target ? lun ? # SCSI ses* at scsibus? target ? lun ? # SCSI SES/SAF-TE devices uk* at scsibus? target ? lun ? # unknown SCSI +# SPI NOR flash support +m25p* at spi? +spiflash* at spiflashbus? + include "dev/usb/usbdevices.config" midi* at midibus? Added files: Index: src/sys/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc-spi.dts diff -u /dev/null src/sys/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc-spi.dts:1.1 --- /dev/null Thu Sep 5 16:15:57 2019 +++ src/sys/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc-spi.dts Thu Sep 5 16:15:57 2019 @@ -0,0 +1,24 @@ +#include "sun7i-a20-olinuxino-lime2-emmc.dts" + +&pio { + spi0_pc_pins: spi0-pc-pins { + pins = "PC0", "PC1", "PC2"; + function = "spi0"; + }; + + spi0_cs0_pc_pin: spi0-cs0-pc-pin { + pins = "PC23"; + function = "spi0"; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pc_pins>, <&spi0_cs0_pc_pin>; + status = "okay"; + spiflash { + compatible = "jedec,spi-nor"; + reg = <0>; + status = "okay"; + }; +};