Module Name: src Committed By: skrll Date: Wed Nov 3 07:53:56 UTC 2021
Modified Files:
src/sys/arch/evbmips/mipssim: virtio_mainbus.c
Log Message:
Catch up with member renaming
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbmips/mipssim/virtio_mainbus.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
