Module Name:    src
Committed By:   skrll
Date:           Fri Nov 12 06:44:46 UTC 2021

Modified Files:
        src/sys/arch/aarch64/aarch64: cpu.c
        src/sys/arch/arm/include: cputypes.h

Log Message:
Print a big warning about trying to run on early ThunderX parts


To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/include/cputypes.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.67 src/sys/arch/aarch64/aarch64/cpu.c:1.68
--- src/sys/arch/aarch64/aarch64/cpu.c:1.67	Sun Oct 31 16:23:47 2021
+++ src/sys/arch/aarch64/aarch64/cpu.c	Fri Nov 12 06:44:46 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.67 2021/10/31 16:23:47 skrll Exp $ */
+/* $NetBSD: cpu.c,v 1.68 2021/11/12 06:44:46 skrll Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.67 2021/10/31 16:23:47 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.68 2021/11/12 06:44:46 skrll Exp $");
 
 #include "locators.h"
 #include "opt_arm_debug.h"
@@ -147,7 +147,7 @@ cpu_attach(device_t dv, cpuid_t id)
 
 	ci->ci_kfpu_spl = -1;
 
-	arm_cpu_do_topology(ci);
+	arm_cpu_do_topology(ci);	// XXXNH move this after mi_cpu_attach
 	cpu_identify(dv, ci);
 
 	cpu_setup_sysctl(dv, ci);
@@ -243,14 +243,22 @@ cpu_identify(device_t self, struct cpu_i
 	const char *m;
 
 	identify_aarch64_model(ci->ci_id.ac_midr, model, sizeof(model));
+
+	aprint_naive("\n");
+	aprint_normal(": %s, id 0x%lx\n", model, ci->ci_cpuid);
+	aprint_normal_dev(ci->ci_dev, "package %u, core %u, smt %u\n",
+	    ci->ci_package_id, ci->ci_core_id, ci->ci_smt_id);
+
 	if (ci->ci_index == 0) {
 		m = cpu_getmodel();
 		if (m == NULL || *m == 0)
 			cpu_setmodel("%s", model);
-	}
 
-	aprint_naive("\n");
-	aprint_normal(": %s, id 0x%lx\n", model, ci->ci_cpuid);
+		if (CPU_ID_ERRATA_CAVIUM_THUNDERX_1_1_P(ci->ci_id.ac_midr))
+			aprint_normal("WARNING: ThunderX Pass 1.1 detected.\n"
+			    "This has known hardware bugs that may cause the "
+			    "incorrect operation of atomic operations.\n");
+	}
 }
 
 static void

Index: src/sys/arch/arm/include/cputypes.h
diff -u src/sys/arch/arm/include/cputypes.h:1.14 src/sys/arch/arm/include/cputypes.h:1.15
--- src/sys/arch/arm/include/cputypes.h:1.14	Mon Aug 30 22:57:33 2021
+++ src/sys/arch/arm/include/cputypes.h	Fri Nov 12 06:44:46 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: cputypes.h,v 1.14 2021/08/30 22:57:33 jmcneill Exp $	*/
+/*	$NetBSD: cputypes.h,v 1.15 2021/11/12 06:44:46 skrll Exp $	*/
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -208,6 +208,22 @@
 #define CPU_ID_THUNDERX83XXRX	0x43000a30
 #define CPU_ID_THUNDERX2RX	0x43000af0
 
+/*
+ * Chip-specific errata. This defines are intended to be
+ * booleans used within if statements. When an appropriate
+ * kernel option is disabled, these defines must be defined
+ * as 0 to allow the compiler to remove a dead code thus
+ * produce better optimized kernel image.
+ */
+/*
+ * Vendor:	Cavium
+ * Chip:	ThunderX
+ * Revision(s):	Pass 1.0, Pass 1.1
+ */
+#define	CPU_ID_ERRATA_CAVIUM_THUNDERX_1_1_P(n)		\
+    (((n) & 0xfff0ffff) == CPU_ID_THUNDERXP1d0 ||	\
+     ((n) & 0xfff0ffff) == CPU_ID_THUNDERXP1d1)
+
 #define CPU_ID_APPLE_M1_ICESTORM	0x61000220
 #define CPU_ID_APPLE_M1_FIRESTORM	0x61000230
 

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