Module Name:    src
Committed By:   riastradh
Date:           Sun Dec 19 11:35:07 UTC 2021

Modified Files:
        src/sys/external/bsd/drm2/amdgpu: files.amdgpu
        src/sys/external/bsd/drm2/dist/drm/amd/amdgpu: amdgpu.h amdgpu_device.c
            amdgpu_df_v3_6.c
        src/sys/external/bsd/drm2/dist/drm/amd/display/dc: os_types.h
        src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs:
            amdgpu_dcn_calcs.c
        src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21:
            amdgpu_dcn21_hubp.c amdgpu_dcn21_resource.c

Log Message:
amdgpu: Take a short pass over amdgpu.


To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/external/bsd/drm2/amdgpu/files.amdgpu
cvs rdiff -u -r1.5 -r1.6 \
    src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h
cvs rdiff -u -r1.7 -r1.8 \
    src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c
cvs rdiff -u -r1.2 -r1.3 \
    src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_df_v3_6.c
cvs rdiff -u -r1.2 -r1.3 \
    src/sys/external/bsd/drm2/dist/drm/amd/display/dc/os_types.h
cvs rdiff -u -r1.2 -r1.3 \
    src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c
cvs rdiff -u -r1.2 -r1.3 \
    src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_hubp.c 
\
    
src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_resource.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/external/bsd/drm2/amdgpu/files.amdgpu
diff -u src/sys/external/bsd/drm2/amdgpu/files.amdgpu:1.17 src/sys/external/bsd/drm2/amdgpu/files.amdgpu:1.18
--- src/sys/external/bsd/drm2/amdgpu/files.amdgpu:1.17	Sun Dec 19 11:24:37 2021
+++ src/sys/external/bsd/drm2/amdgpu/files.amdgpu	Sun Dec 19 11:35:06 2021
@@ -1,4 +1,4 @@
-#	$NetBSD: files.amdgpu,v 1.17 2021/12/19 11:24:37 riastradh Exp $
+#	$NetBSD: files.amdgpu,v 1.18 2021/12/19 11:35:06 riastradh Exp $
 
 version	20180827
 
@@ -48,6 +48,14 @@ makeoptions	amdgpu	"CWARNFLAGS.amdgpu_ar
 # overflow in arithmetic, which is the opposite of helpful.  &@!#*
 makeoptions	amdgpu	"CWARNFLAGS.amdgpu_bo_list.c"+="-Wno-type-limits"
 
+ifdef amd64
+makeoptions	amdgpu	"COPTS.amdgpu_dcn20_resource.c"+="-mhard-float -msse -msse2"
+makeoptions	amdgpu	"COPTS.amdgpu_dcn21_resource.c"+="-mhard-float -msse -msse2"
+makeoptions	amdgpu	"COPTS.amdgpu_dcn_calc_auto.c"+="-mhard-float -msse -msse2"
+makeoptions	amdgpu	"COPTS.amdgpu_dcn_calc_math.c"+="-mhard-float -msse -msse2"
+makeoptions	amdgpu	"COPTS.amdgpu_dcn_calcs.c"+="-mhard-float -msse -msse2"
+endif
+
 # Local additions.
 file	external/bsd/drm2/amdgpu/amdgpu_module.c	amdgpu
 file	external/bsd/drm2/amdgpu/amdgpu_pci.c		amdgpu

Index: src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h
diff -u src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h:1.5 src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h:1.6
--- src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h:1.5	Sat Dec 18 23:44:58 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h	Sun Dec 19 11:35:06 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: amdgpu.h,v 1.5 2021/12/18 23:44:58 riastradh Exp $	*/
+/*	$NetBSD: amdgpu.h,v 1.6 2021/12/19 11:35:06 riastradh Exp $	*/
 
 /*
  * Copyright 2008 Advanced Micro Devices, Inc.
@@ -1264,6 +1264,9 @@ void amdgpu_unregister_gpu_instance(stru
 
 #include "amdgpu_object.h"
 
+#ifdef __NetBSD__	       /* XXX amdgpu sysfs */
+#define	AMDGPU_PMU_ATTR(_name, _object) CTASSERT(1)
+#else
 /* used by df_v3_6.c and amdgpu_pmu.c */
 #define AMDGPU_PMU_ATTR(_name, _object)					\
 static ssize_t								\
@@ -1276,6 +1279,7 @@ _name##_show(struct device *dev,					\
 }									\
 									\
 static struct device_attribute pmu_attr_##_name = __ATTR_RO(_name)
+#endif
 
 #endif
 

Index: src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c:1.7 src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c:1.8
--- src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c:1.7	Sat Dec 18 23:44:58 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c	Sun Dec 19 11:35:07 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: amdgpu_device.c,v 1.7 2021/12/18 23:44:58 riastradh Exp $	*/
+/*	$NetBSD: amdgpu_device.c,v 1.8 2021/12/19 11:35:07 riastradh Exp $	*/
 
 /*
  * Copyright 2008 Advanced Micro Devices, Inc.
@@ -28,7 +28,7 @@
  *          Jerome Glisse
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_device.c,v 1.7 2021/12/18 23:44:58 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_device.c,v 1.8 2021/12/19 11:35:07 riastradh Exp $");
 
 #include <linux/power_supply.h>
 #include <linux/kthread.h>
@@ -119,6 +119,8 @@ const char *amdgpu_asic_name[] = {
 	"LAST",
 };
 
+#ifndef __NetBSD__		/* XXX amdgpu sysfs */
+
 /**
  * DOC: pcie_replay_count
  *
@@ -141,6 +143,8 @@ static ssize_t amdgpu_device_get_pcie_re
 static DEVICE_ATTR(pcie_replay_count, S_IRUGO,
 		amdgpu_device_get_pcie_replay_count, NULL);
 
+#endif	/* __NetBSD__ */
+
 static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev);
 
 /**
@@ -266,7 +270,12 @@ uint32_t amdgpu_mm_rreg(struct amdgpu_de
  */
 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset) {
 	if (offset < adev->rmmio_size)
+#ifdef __NetBSD__
+		return bus_space_read_1(adev->rmmiot, adev->rmmioh,
+		    adev->rmmio_base + offset);
+#else
 		return (readb(adev->rmmio + offset));
+#endif
 	BUG();
 }
 
@@ -287,7 +296,12 @@ uint8_t amdgpu_mm_rreg8(struct amdgpu_de
  */
 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value) {
 	if (offset < adev->rmmio_size)
+#ifdef __NetBSD__
+		bus_space_write_1(adev->rmmiot, adev->rmmioh,
+		    adev->rmmio_base + offset, value);
+#else
 		writeb(value, adev->rmmio + offset);
+#endif
 	else
 		BUG();
 }
@@ -467,7 +481,12 @@ void amdgpu_mm_wdoorbell(struct amdgpu_d
 u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
 {
 	if (index < adev->doorbell.num_doorbells) {
+#ifdef __NetBSD__
+		return bus_space_read_8(adev->doorbell.bst, adev->doorbell.bsh,
+		    4*index);
+#else
 		return atomic64_read((atomic64_t *)(adev->doorbell.ptr + index));
+#endif
 	} else {
 		DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
 		return 0;
@@ -487,7 +506,12 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_
 void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
 {
 	if (index < adev->doorbell.num_doorbells) {
+#ifdef __NetBSD__
+		bus_space_write_8(adev->doorbell.bst, adev->doorbell.bsh,
+		    4*index, v);
+#else
 		atomic64_set((atomic64_t *)(adev->doorbell.ptr + index), v);
+#endif
 	} else {
 		DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
 	}
@@ -3252,11 +3276,13 @@ fence_driver_init:
 	queue_delayed_work(system_wq, &adev->delayed_init_work,
 			   msecs_to_jiffies(AMDGPU_RESUME_MS));
 
+#ifndef __NetBSD__		/* XXX amdgpu sysfs */
 	r = device_create_file(adev->dev, &dev_attr_pcie_replay_count);
 	if (r) {
 		dev_err(adev->dev, "Could not create pcie_replay_count");
 		return r;
 	}
+#endif
 
 	if (IS_ENABLED(CONFIG_PERF_EVENTS))
 		r = amdgpu_pmu_init(adev);

Index: src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_df_v3_6.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_df_v3_6.c:1.2 src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_df_v3_6.c:1.3
--- src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_df_v3_6.c:1.2	Sat Dec 18 23:44:58 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_df_v3_6.c	Sun Dec 19 11:35:07 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: amdgpu_df_v3_6.c,v 1.2 2021/12/18 23:44:58 riastradh Exp $	*/
+/*	$NetBSD: amdgpu_df_v3_6.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $	*/
 
 /*
  * Copyright 2018 Advanced Micro Devices, Inc.
@@ -23,7 +23,7 @@
  *
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_df_v3_6.c,v 1.2 2021/12/18 23:44:58 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_df_v3_6.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $");
 
 #include "amdgpu.h"
 #include "df_v3_6.h"
@@ -38,6 +38,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_df_v3
 static u32 df_v3_6_channel_number[] = {1, 2, 0, 4, 0, 8, 0,
 				       16, 32, 0, 0, 0, 2, 4, 8};
 
+#ifndef __NetBSD__		/* XXX amdgpu sysfs */
+
 /* init df format attrs */
 AMDGPU_PMU_ATTR(event,		"config:0-7");
 AMDGPU_PMU_ATTR(instance,	"config:8-15");
@@ -101,6 +103,8 @@ const struct attribute_group *df_v3_6_at
 		NULL
 };
 
+#endif	/* __NetBSD__ */
+
 static uint64_t df_v3_6_get_fica(struct amdgpu_device *adev,
 				 uint32_t ficaa_val)
 {
@@ -246,6 +250,8 @@ static int df_v3_6_perfmon_arm_with_retr
 	return countdown > 0 ? 0 : -ETIME;
 }
 
+#ifndef __NetBSD__		/* XXX amdgpu sysfs */
+
 /* get the number of df counters available */
 static ssize_t df_v3_6_get_df_cntr_avail(struct device *dev,
 		struct device_attribute *attr,
@@ -270,6 +276,8 @@ static ssize_t df_v3_6_get_df_cntr_avail
 /* device attr for available perfmon counters */
 static DEVICE_ATTR(df_cntr_avail, S_IRUGO, df_v3_6_get_df_cntr_avail, NULL);
 
+#endif	/* __NetBSD__ */
+
 static void df_v3_6_query_hashes(struct amdgpu_device *adev)
 {
 	u32 tmp;
@@ -301,9 +309,13 @@ static void df_v3_6_sw_init(struct amdgp
 {
 	int i, ret;
 
+#ifdef __NetBSD__		/* XXX amdgpu sysfs */
+	__USE(ret);
+#else
 	ret = device_create_file(adev->dev, &dev_attr_df_cntr_avail);
 	if (ret)
 		DRM_ERROR("failed to create file for available df counters\n");
+#endif
 
 	for (i = 0; i < AMDGPU_MAX_DF_PERFMONS; i++)
 		adev->df_perfmon_config_assign_mask[i] = 0;
@@ -314,7 +326,9 @@ static void df_v3_6_sw_init(struct amdgp
 static void df_v3_6_sw_fini(struct amdgpu_device *adev)
 {
 
+#ifndef __NetBSD__		/* XXX amdgpu sysfs */
 	device_remove_file(adev->dev, &dev_attr_df_cntr_avail);
+#endif
 
 }
 
@@ -485,7 +499,7 @@ static int df_v3_6_pmc_get_ctrl_settings
 	*lo_val = (unitmask << 8) | (instance_10 << 6) | eventsel | (1 << 22);
 	*hi_val = (instance_76 << 29) | instance_5432;
 
-	DRM_DEBUG_DRIVER("config=%llx addr=%08x:%08x val=%08x:%08x",
+	DRM_DEBUG_DRIVER("config=%"PRIx64" addr=%08x:%08x val=%08x:%08x",
 		config, *lo_base_addr, *hi_base_addr, *lo_val, *hi_val);
 
 	return 0;

Index: src/sys/external/bsd/drm2/dist/drm/amd/display/dc/os_types.h
diff -u src/sys/external/bsd/drm2/dist/drm/amd/display/dc/os_types.h:1.2 src/sys/external/bsd/drm2/dist/drm/amd/display/dc/os_types.h:1.3
--- src/sys/external/bsd/drm2/dist/drm/amd/display/dc/os_types.h:1.2	Sat Dec 18 23:45:00 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/display/dc/os_types.h	Sun Dec 19 11:35:07 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: os_types.h,v 1.2 2021/12/18 23:45:00 riastradh Exp $	*/
+/*	$NetBSD: os_types.h,v 1.3 2021/12/19 11:35:07 riastradh Exp $	*/
 
 /*
  * Copyright 2012-16 Advanced Micro Devices, Inc.
@@ -54,9 +54,15 @@
 
 #if defined(CONFIG_DRM_AMD_DC_DCN)
 #if defined(CONFIG_X86)
+#ifdef __NetBSD__
+#include <x86/fpu.h>
+#define	DC_FP_START()	fpu_kern_enter()
+#define	DC_FP_END()	fpu_kern_leave()
+#else
 #include <asm/fpu/api.h>
 #define DC_FP_START() kernel_fpu_begin()
 #define DC_FP_END() kernel_fpu_end()
+#endif
 #elif defined(CONFIG_PPC64)
 #include <asm/switch_to.h>
 #include <asm/cputable.h>

Index: src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c:1.2 src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c:1.3
--- src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c:1.2	Sat Dec 18 23:45:01 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c	Sun Dec 19 11:35:07 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: amdgpu_dcn_calcs.c,v 1.2 2021/12/18 23:45:01 riastradh Exp $	*/
+/*	$NetBSD: amdgpu_dcn_calcs.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $	*/
 
 /*
  * Copyright 2017 Advanced Micro Devices, Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn_calcs.c,v 1.2 2021/12/18 23:45:01 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn_calcs.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $");
 
 #include "dm_services.h"
 #include "dc.h"
@@ -446,7 +446,7 @@ static void dcn_bw_calc_rq_dlg_ttu(
 		struct pipe_ctx *pipe,
 		int in_idx)
 {
-	struct display_mode_lib *dml = (struct display_mode_lib *)(&dc->dml);
+	struct display_mode_lib *dml = (struct display_mode_lib *)__UNCONST(&dc->dml);
 	struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &pipe->dlg_regs;
 	struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &pipe->ttu_regs;
 	struct _vcs_dpi_display_rq_regs_st *rq_regs = &pipe->rq_regs;

Index: src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_hubp.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_hubp.c:1.2 src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_hubp.c:1.3
--- src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_hubp.c:1.2	Sat Dec 18 23:45:03 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_hubp.c	Sun Dec 19 11:35:07 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: amdgpu_dcn21_hubp.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $	*/
+/*	$NetBSD: amdgpu_dcn21_hubp.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $	*/
 
 /*
 * Copyright 2018 Advanced Micro Devices, Inc.
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn21_hubp.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn21_hubp.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $");
 
 #include "dcn10/dcn10_hubp.h"
 #include "dcn21_hubp.h"
@@ -330,7 +330,7 @@ void hubp21_set_vm_system_aperture_setti
 {
 	struct dcn21_hubp *hubp21 = TO_DCN21_HUBP(hubp);
 
-	PHYSICAL_ADDRESS_LOC mc_vm_apt_default;
+	PHYSICAL_ADDRESS_LOC mc_vm_apt_default __unused;
 	PHYSICAL_ADDRESS_LOC mc_vm_apt_low;
 	PHYSICAL_ADDRESS_LOC mc_vm_apt_high;
 
Index: src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_resource.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_resource.c:1.2 src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_resource.c:1.3
--- src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_resource.c:1.2	Sat Dec 18 23:45:03 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/amdgpu_dcn21_resource.c	Sun Dec 19 11:35:07 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: amdgpu_dcn21_resource.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $	*/
+/*	$NetBSD: amdgpu_dcn21_resource.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $	*/
 
 /*
 * Copyright 2018 Advanced Micro Devices, Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn21_resource.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn21_resource.c,v 1.3 2021/12/19 11:35:07 riastradh Exp $");
 
 #include <linux/slab.h>
 
@@ -943,10 +943,12 @@ static void dcn21_resource_destruct(stru
 		}
 	}
 
+#ifndef __NetBSD__		/* XXX amdgpu audio */
 	for (i = 0; i < pool->base.audio_count; i++) {
 		if (pool->base.audios[i])
 			dce_aud_destroy(&pool->base.audios[i]);
 	}
+#endif
 
 	for (i = 0; i < pool->base.clk_src_count; i++) {
 		if (pool->base.clock_sources[i] != NULL) {
@@ -1430,12 +1432,14 @@ static void dcn21_pp_smu_destroy(struct 
 	}
 }
 
+#ifndef __NetBSD__		/* XXX amdgpu audio */
 static struct audio *dcn21_create_audio(
 		struct dc_context *ctx, unsigned int inst)
 {
 	return dce_audio_create(ctx, inst,
 			&audio_regs[inst], &audio_shift, &audio_mask);
 }
+#endif
 
 static struct dc_cap_funcs cap_funcs = {
 	.get_dcc_compression_cap = dcn20_get_dcc_compression_cap
@@ -1487,7 +1491,9 @@ static struct dce_hwseq *dcn21_hwseq_cre
 
 static const struct resource_create_funcs res_create_funcs = {
 	.read_dce_straps = read_dce_straps,
+#ifndef __NetBSD__		/* XXX amdgpu audio */
 	.create_audio = dcn21_create_audio,
+#endif
 	.create_stream_encoder = dcn21_stream_encoder_create,
 	.create_hwseq = dcn21_hwseq_create,
 };

Reply via email to