Module Name: xsrc
Committed By: macallan
Date: Fri Dec 24 05:22:54 UTC 2021
Modified Files:
xsrc/external/mit/xf86-video-suncg14/dist/src: cg14.h cg14_accel.c
cg14_render.c
Log Message:
make ALU instructions use the same format as load/store instructions
same binary generated
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 \
xsrc/external/mit/xf86-video-suncg14/dist/src/cg14.h
cvs rdiff -u -r1.27 -r1.28 \
xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_accel.c
cvs rdiff -u -r1.14 -r1.15 \
xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_render.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: xsrc/external/mit/xf86-video-suncg14/dist/src/cg14.h
diff -u xsrc/external/mit/xf86-video-suncg14/dist/src/cg14.h:1.15 xsrc/external/mit/xf86-video-suncg14/dist/src/cg14.h:1.16
--- xsrc/external/mit/xf86-video-suncg14/dist/src/cg14.h:1.15 Fri Dec 24 04:41:40 2021
+++ xsrc/external/mit/xf86-video-suncg14/dist/src/cg14.h Fri Dec 24 05:22:54 2021
@@ -135,7 +135,7 @@ write_sx_io(Cg14Ptr p, int reg, uint32_t
p->queuecount++;
}
-#define sxi(inst) write_sx_reg(p, SX_INSTRUCTIONS, (inst))
+#define sxi(inst, a, b, d, cnt) write_sx_reg(p, SX_INSTRUCTIONS, inst((a), (b), (d), (cnt)))
#define sxm(inst, addr, reg, count) write_sx_io(p, (addr) & ~7, inst((reg), (count), (addr) & 7))
Bool CG14SetupCursor(ScreenPtr);
Index: xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_accel.c
diff -u xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_accel.c:1.27 xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_accel.c:1.28
--- xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_accel.c:1.27 Fri Dec 24 04:41:40 2021
+++ xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_accel.c Fri Dec 24 05:22:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cg14_accel.c,v 1.27 2021/12/24 04:41:40 macallan Exp $ */
+/* $NetBSD: cg14_accel.c,v 1.28 2021/12/24 05:22:54 macallan Exp $ */
/*
* Copyright (c) 2013 Michael Lorenz
* All rights reserved.
@@ -231,10 +231,10 @@ CG14Copy32(PixmapPtr pDstPixmap,
sxm(SX_LD, s, 10, num - 1);
sxm(SX_LD, d, 42, num - 1);
if (num > 16) {
- sxi(SX_ROP(10, 42, 74, 15));
- sxi(SX_ROP(26, 58, 90, num - 17));
+ sxi(SX_ROP, 10, 42, 74, 15);
+ sxi(SX_ROP, 26, 58, 90, num - 17);
} else {
- sxi(SX_ROP(10, 42, 74, num - 1));
+ sxi(SX_ROP, 10, 42, 74, num - 1);
}
sxm(SX_STM, d, 74, num - 1);
s += xinc;
@@ -254,8 +254,8 @@ CG14Copy32(PixmapPtr pDstPixmap,
for (i = 0; i < chunks; i++) {
sxm(SX_LD, s, 10, 31);
sxm(SX_LD, d, 42, 31);
- sxi(SX_ROP(10, 42, 74, 15));
- sxi(SX_ROP(26, 58, 90, 15));
+ sxi(SX_ROP, 10, 42, 74, 15);
+ sxi(SX_ROP, 26, 58, 90, 15);
sxm(SX_STM, d, 74, 31);
s -= 128;
d -= 128;
@@ -268,10 +268,10 @@ CG14Copy32(PixmapPtr pDstPixmap,
sxm(SX_LD, s, 10, count - 1);
sxm(SX_LD, d, 42, count - 1);
if (count > 16) {
- sxi(SX_ROP(10, 42, 74, 15));
- sxi(SX_ROP(26, 58, 90, count - 17));
+ sxi(SX_ROP, 10, 42, 74, 15);
+ sxi(SX_ROP, 26, 58, 90, count - 17);
} else {
- sxi(SX_ROP(10, 42, 74, count - 1));
+ sxi(SX_ROP, 10, 42, 74, count - 1);
}
sxm(SX_STM, d, 74, count - 1);
}
@@ -351,7 +351,7 @@ CG14Copy8_aligned_rop(Cg14Ptr p, int src
if (pre > 0) {
sxm(SX_LDB, saddr, 8, pre - 1);
sxm(SX_LDB, daddr, 40, pre - 1);
- sxi(SX_ROP(8, 40, 72, pre - 1));
+ sxi(SX_ROP, 8, 40, 72, pre - 1);
sxm(SX_STB, daddr, 72, pre - 1);
saddr += pre;
daddr += pre;
@@ -363,10 +363,10 @@ CG14Copy8_aligned_rop(Cg14Ptr p, int src
sxm(SX_LD, saddr, 8, wrds - 1);
sxm(SX_LD, daddr, 40, wrds - 1);
if (cnt > 16) {
- sxi(SX_ROP(8, 40, 72, 15));
- sxi(SX_ROP(8, 56, 88, wrds - 17));
+ sxi(SX_ROP, 8, 40, 72, 15);
+ sxi(SX_ROP, 8, 56, 88, wrds - 17);
} else
- sxi(SX_ROP(8, 40, 72, wrds - 1));
+ sxi(SX_ROP, 8, 40, 72, wrds - 1);
sxm(SX_ST, daddr, 72, wrds - 1);
saddr += wrds << 2;
daddr += wrds << 2;
@@ -375,7 +375,7 @@ CG14Copy8_aligned_rop(Cg14Ptr p, int src
if (cnt > 0) {
sxm(SX_LDB, saddr, 8, cnt - 1);
sxm(SX_LDB, daddr, 40, cnt - 1);
- sxi(SX_ROP(8, 40, 72, cnt - 1));
+ sxi(SX_ROP, 8, 40, 72, cnt - 1);
sxm(SX_STB, daddr, 72, cnt - 1);
}
next:
@@ -443,34 +443,34 @@ CG14Copy8_short_rop(Cg14Ptr p, int srcst
sxm(SX_LD, saddr, sreg, swrds - 1);
if (wrds > 15) {
if (dist != 0) {
- sxi(SX_FUNNEL_I(8, dist, 40, 15));
- sxi(SX_FUNNEL_I(24, dist, 56, wrds - 16));
+ sxi(SX_FUNNEL_I, 8, dist, 40, 15);
+ sxi(SX_FUNNEL_I, 24, dist, 56, wrds - 16);
/* shifted source pixels are now at register 40+ */
ssreg = 40;
} else ssreg = 8;
if (pre != 0) {
/* mask out leading junk */
write_sx_reg(p, SX_QUEUED(R_MASK), lmask);
- sxi(SX_ROPB(ssreg, 80, 8, 0));
+ sxi(SX_ROPB, ssreg, 80, 8, 0);
write_sx_reg(p, SX_QUEUED(R_MASK), 0xffffffff);
- sxi(SX_ROPB(ssreg + 1, 81, 9, 14));
+ sxi(SX_ROPB, ssreg + 1, 81, 9, 14);
} else {
- sxi(SX_ROPB(ssreg, 80, 8, 15));
+ sxi(SX_ROPB, ssreg, 80, 8, 15);
}
- sxi(SX_ROPB(ssreg + 16, 96, 24, wrds - 16));
+ sxi(SX_ROPB, ssreg + 16, 96, 24, wrds - 16);
} else {
if (dist != 0) {
- sxi(SX_FUNNEL_I(8, dist, 40, wrds));
+ sxi(SX_FUNNEL_I, 8, dist, 40, wrds);
ssreg = 40;
} else ssreg = 8;
if (pre != 0) {
/* mask out leading junk */
write_sx_reg(p, SX_QUEUED(R_MASK), lmask);
- sxi(SX_ROPB(ssreg, 80, 8, 0));
+ sxi(SX_ROPB, ssreg, 80, 8, 0);
write_sx_reg(p, SX_QUEUED(R_MASK), 0xffffffff);
- sxi(SX_ROPB(ssreg + 1, 81, 9, wrds));
+ sxi(SX_ROPB, ssreg + 1, 81, 9, wrds);
} else {
- sxi(SX_ROPB(ssreg, 80, 8, wrds));
+ sxi(SX_ROPB, ssreg, 80, 8, wrds);
}
}
if (post != 0) {
@@ -482,9 +482,9 @@ CG14Copy8_short_rop(Cg14Ptr p, int srcst
* the left end but it's less annoying this way and
* the instruction count is the same
*/
- sxi(SX_ANDS(7 + wrds, 7, 5, 0));
- sxi(SX_ANDS(79 + wrds, 6, 4, 0));
- sxi(SX_ORS(5, 4, 7 + wrds, 0));
+ sxi(SX_ANDS, 7 + wrds, 7, 5, 0);
+ sxi(SX_ANDS, 79 + wrds, 6, 4, 0);
+ sxi(SX_ORS, 5, 4, 7 + wrds, 0);
}
#ifdef DEBUG
sxm(SX_ST, taddr, 40, wrds - 1);
@@ -555,8 +555,8 @@ CG14Copy8_short_norop(Cg14Ptr p, int src
sxm(SX_LD, saddr, sreg, swrds - 1);
if (wrds > 15) {
if (dist != 0) {
- sxi(SX_FUNNEL_I(8, dist, 40, 15));
- sxi(SX_FUNNEL_I(24, dist, 56, wrds - 16));
+ sxi(SX_FUNNEL_I, 8, dist, 40, 15);
+ sxi(SX_FUNNEL_I, 24, dist, 56, wrds - 16);
/* shifted source pixels are now at reg 40+ */
ssreg = 40;
} else ssreg = 8;
@@ -564,18 +564,18 @@ CG14Copy8_short_norop(Cg14Ptr p, int src
/* read only the first word */
sxm(SX_LD, daddr, 80, 0);
/* mask out leading junk */
- sxi(SX_ROPB(ssreg, 80, ssreg, 0));
+ sxi(SX_ROPB, ssreg, 80, ssreg, 0);
}
} else {
if (dist != 0) {
- sxi(SX_FUNNEL_I(8, dist, 40, wrds));
+ sxi(SX_FUNNEL_I, 8, dist, 40, wrds);
ssreg = 40;
} else ssreg = 8;
if (pre != 0) {
/* read only the first word */
sxm(SX_LD, daddr, 80, 0);
/* mask out leading junk */
- sxi(SX_ROPB(ssreg, 80, ssreg, 0));
+ sxi(SX_ROPB, ssreg, 80, ssreg, 0);
}
}
if (post != 0) {
@@ -589,9 +589,9 @@ CG14Copy8_short_norop(Cg14Ptr p, int src
* the instruction count is the same
*/
sxm(SX_LD, laddr, 81, 0);
- sxi(SX_ANDS(ssreg + wrds - 1, 7, 5, 0));
- sxi(SX_ANDS(81, 6, 4, 0));
- sxi(SX_ORS(5, 4, ssreg + wrds - 1, 0));
+ sxi(SX_ANDS, ssreg + wrds - 1, 7, 5, 0);
+ sxi(SX_ANDS, 81, 6, 4, 0);
+ sxi(SX_ORS, 5, 4, ssreg + wrds - 1, 0);
}
#ifdef DEBUG
sxm(SX_ST, taddr, 40, wrds - 1);
@@ -810,10 +810,10 @@ CG14Copy8(PixmapPtr pDstPixmap,
sxm(SX_LDB, s, 10, num - 1);
sxm(SX_LDB, d, 42, num - 1);
if (num > 16) {
- sxi(SX_ROP(10, 42, 74, 15));
- sxi(SX_ROP(26, 58, 90, num - 17));
+ sxi(SX_ROP, 10, 42, 74, 15);
+ sxi(SX_ROP, 26, 58, 90, num - 17);
} else {
- sxi(SX_ROP(10, 42, 74, num - 1));
+ sxi(SX_ROP, 10, 42, 74, num - 1);
}
sxm(SX_STBM, d, 74, num - 1);
s += xinc;
@@ -833,8 +833,8 @@ CG14Copy8(PixmapPtr pDstPixmap,
for (i = 0; i < chunks; i++) {
sxm(SX_LDB, s, 10, 31);
sxm(SX_LDB, d, 42, 31);
- sxi(SX_ROP(10, 42, 74, 15));
- sxi(SX_ROP(26, 58, 90, 15));
+ sxi(SX_ROP, 10, 42, 74, 15);
+ sxi(SX_ROP, 26, 58, 90, 15);
sxm(SX_STBM, d, 74, 31);
s -= 128;
d -= 128;
@@ -847,10 +847,10 @@ CG14Copy8(PixmapPtr pDstPixmap,
sxm(SX_LDB, s, 10, count - 1);
sxm(SX_LDB, d, 42, count - 1);
if (count > 16) {
- sxi(SX_ROP(10, 42, 74, 15));
- sxi(SX_ROP(26, 58, 90, count - 17));
+ sxi(SX_ROP, 10, 42, 74, 15);
+ sxi(SX_ROP, 26, 58, 90, count - 17);
} else {
- sxi(SX_ROP(10, 42, 74, count - 1));
+ sxi(SX_ROP, 10, 42, 74, count - 1);
}
sxm(SX_STBM, d, 74, count - 1);
}
@@ -940,7 +940,7 @@ CG14Solid32(Cg14Ptr p, uint32_t start, u
/* alright, let's do actual ROP stuff */
/* first repeat the fill colour into 16 registers */
- sxi(SX_SELECT_S(8, 8, 10, 15));
+ sxi(SX_SELECT_S, 8, 8, 10, 15);
for (line = 0; line < h; line++) {
x = 0;
@@ -954,10 +954,10 @@ CG14Solid32(Cg14Ptr p, uint32_t start, u
* non-memory ops can only have counts up to 16
*/
if (num <= 16) {
- sxi(SX_ROP(10, 42, 74, num - 1));
+ sxi(SX_ROP, 10, 42, 74, num - 1);
} else {
- sxi(SX_ROP(10, 42, 74, 15));
- sxi(SX_ROP(10, 58, 90, num - 17));
+ sxi(SX_ROP, 10, 42, 74, 15);
+ sxi(SX_ROP, 10, 58, 90, num - 17);
}
/* and write the result back into memory */
sxm(SX_ST, ptr, 74, num - 1);
@@ -1013,7 +1013,7 @@ next:
/* alright, let's do actual ROP stuff */
/* first repeat the fill colour into 16 registers */
- sxi(SX_SELECT_S(8, 8, 10, 15));
+ sxi(SX_SELECT_S, 8, 8, 10, 15);
for (line = 0; line < h; line++) {
ptr = start;
@@ -1021,7 +1021,7 @@ next:
pre = min(pre, cnt);
if (pre) {
sxm(SX_LDB, ptr, 26, pre - 1);
- sxi(SX_ROP(10, 26, 42, pre - 1));
+ sxi(SX_ROP, 10, 26, 42, pre - 1);
sxm(SX_STB, ptr, 42, pre - 1);
ptr += pre;
cnt -= pre;
@@ -1033,10 +1033,10 @@ next:
num = min(32, cnt >> 2);
sxm(SX_LD, ptr, 26, num - 1);
if (num <= 16) {
- sxi(SX_ROP(10, 26, 58, num - 1));
+ sxi(SX_ROP, 10, 26, 58, num - 1);
} else {
- sxi(SX_ROP(10, 26, 58, 15));
- sxi(SX_ROP(10, 42, 74, num - 17));
+ sxi(SX_ROP, 10, 26, 58, 15);
+ sxi(SX_ROP, 10, 42, 74, num - 17);
}
sxm(SX_ST, ptr, 58, num - 1);
ptr += num << 2;
@@ -1045,7 +1045,7 @@ next:
if (cnt > 3) xf86Msg(X_ERROR, "%s cnt %d\n", __func__, cnt);
if (cnt > 0) {
sxm(SX_LDB, ptr, 26, cnt - 1);
- sxi(SX_ROP(10, 26, 42, cnt - 1));
+ sxi(SX_ROP, 10, 26, 42, cnt - 1);
sxm(SX_STB, ptr, 42, cnt - 1);
}
if ((ptr + cnt) != (start + w)) xf86Msg(X_ERROR, "%s %x vs %x\n", __func__, ptr + cnt, start + w);
Index: xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_render.c
diff -u xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_render.c:1.14 xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_render.c:1.15
--- xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_render.c:1.14 Fri Dec 24 04:41:40 2021
+++ xsrc/external/mit/xf86-video-suncg14/dist/src/cg14_render.c Fri Dec 24 05:22:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cg14_render.c,v 1.14 2021/12/24 04:41:40 macallan Exp $ */
+/* $NetBSD: cg14_render.c,v 1.15 2021/12/24 05:22:54 macallan Exp $ */
/*
* Copyright (c) 2013 Michael Lorenz
* All rights reserved.
@@ -79,21 +79,21 @@ void CG14Comp_Over32Solid(Cg14Ptr p,
/* fetch destination pixels */
sxm(SX_LDUQ0, dstx, 60, 3);
/* duplicate them for all channels */
- sxi(SX_ORS(0, 12, 13, 2));
- sxi(SX_ORS(0, 16, 17, 2));
- sxi(SX_ORS(0, 20, 21, 2));
- sxi(SX_ORS(0, 24, 25, 2));
+ sxi(SX_ORS, 0, 12, 13, 2);
+ sxi(SX_ORS, 0, 16, 17, 2);
+ sxi(SX_ORS, 0, 20, 21, 2);
+ sxi(SX_ORS, 0, 24, 25, 2);
/* generate inverted alpha */
- sxi(SX_XORS(12, 8, 28, 15));
+ sxi(SX_XORS, 12, 8, 28, 15);
/* multiply source */
- sxi(SX_MUL16X16SR8(8, 12, 44, 3));
- sxi(SX_MUL16X16SR8(8, 16, 48, 3));
- sxi(SX_MUL16X16SR8(8, 20, 52, 3));
- sxi(SX_MUL16X16SR8(8, 24, 56, 3));
+ sxi(SX_MUL16X16SR8, 8, 12, 44, 3);
+ sxi(SX_MUL16X16SR8, 8, 16, 48, 3);
+ sxi(SX_MUL16X16SR8, 8, 20, 52, 3);
+ sxi(SX_MUL16X16SR8, 8, 24, 56, 3);
/* multiply dest */
- sxi(SX_MUL16X16SR8(28, 60, 76, 15));
+ sxi(SX_MUL16X16SR8, 28, 60, 76, 15);
/* add up */
- sxi(SX_ADDV(44, 76, 92, 15));
+ sxi(SX_ADDV, 44, 76, 92, 15);
/* write back */
if (rest < 4) {
sxm(SX_STUQ0C, dstx, 92, rest - 1);
@@ -120,20 +120,20 @@ void CG14Comp_Over32Solid(Cg14Ptr p,
write_sx_reg(p, SX_QUEUED(12), m);
/* fetch dst pixel */
sxm(SX_LDUQ0, dstx, 20, 0);
- sxi(SX_ORV(12, 0, R_SCAM, 0));
+ sxi(SX_ORV, 12, 0, R_SCAM, 0);
/*
* src * alpha + R0
* R[9:11] * SCAM + R0 -> R[17:19]
*/
- sxi(SX_SAXP16X16SR8(9, 0, 17, 2));
+ sxi(SX_SAXP16X16SR8, 9, 0, 17, 2);
/* invert SCAM */
- sxi(SX_XORV(12, 8, R_SCAM, 0));
+ sxi(SX_XORV, 12, 8, R_SCAM, 0);
#ifdef SX_DEBUG
- sxi(SX_XORV(12, 8, 13, 0));
+ sxi(SX_XORV, 12, 8, 13, 0);
#endif
/* dst * (1 - alpha) + R[13:15] */
- sxi(SX_SAXP16X16SR8(21, 17, 25, 2));
+ sxi(SX_SAXP16X16SR8, 21, 17, 25, 2);
sxm(SX_STUQ0C, dstx, 24, 0);
}
dstx += 4;
@@ -172,21 +172,21 @@ void CG14Comp_Over8Solid(Cg14Ptr p,
/* fetch destination pixels */
sxm(SX_LDUQ0, dstx, 60, 3);
/* duplicate them for all channels */
- sxi(SX_ORS(0, 13, 16, 3));
- sxi(SX_ORS(0, 14, 20, 3));
- sxi(SX_ORS(0, 15, 24, 3));
- sxi(SX_ORS(0, 12, 13, 2));
+ sxi(SX_ORS, 0, 13, 16, 3);
+ sxi(SX_ORS, 0, 14, 20, 3);
+ sxi(SX_ORS, 0, 15, 24, 3);
+ sxi(SX_ORS, 0, 12, 13, 2);
/* generate inverted alpha */
- sxi(SX_XORS(12, 8, 28, 15));
+ sxi(SX_XORS, 12, 8, 28, 15);
/* multiply source */
- sxi(SX_MUL16X16SR8(8, 12, 44, 3));
- sxi(SX_MUL16X16SR8(8, 16, 48, 3));
- sxi(SX_MUL16X16SR8(8, 20, 52, 3));
- sxi(SX_MUL16X16SR8(8, 24, 56, 3));
+ sxi(SX_MUL16X16SR8, 8, 12, 44, 3);
+ sxi(SX_MUL16X16SR8, 8, 16, 48, 3);
+ sxi(SX_MUL16X16SR8, 8, 20, 52, 3);
+ sxi(SX_MUL16X16SR8, 8, 24, 56, 3);
/* multiply dest */
- sxi(SX_MUL16X16SR8(28, 60, 76, 15));
+ sxi(SX_MUL16X16SR8, 28, 60, 76, 15);
/* add up */
- sxi(SX_ADDV(44, 76, 92, 15));
+ sxi(SX_ADDV, 44, 76, 92, 15);
/* write back */
if (rest < 4) {
sxm(SX_STUQ0C, dstx, 92, rest - 1);
@@ -215,20 +215,20 @@ void CG14Comp_Over8Solid(Cg14Ptr p,
write_sx_reg(p, SX_QUEUED(12), m);
/* fetch dst pixel */
sxm(SX_LDUQ0, dstx, 20, 0);
- sxi(SX_ORV(12, 0, R_SCAM, 0));
+ sxi(SX_ORV, 12, 0, R_SCAM, 0);
/*
* src * alpha + R0
* R[9:11] * SCAM + R0 -> R[17:19]
*/
- sxi(SX_SAXP16X16SR8(9, 0, 17, 2));
+ sxi(SX_SAXP16X16SR8, 9, 0, 17, 2);
/* invert SCAM */
- sxi(SX_XORV(12, 8, R_SCAM, 0));
+ sxi(SX_XORV, 12, 8, R_SCAM, 0);
#ifdef SX_DEBUG
- sxi(SX_XORV(12, 8, 13, 0));
+ sxi(SX_XORV, 12, 8, 13, 0);
#endif
/* dst * (1 - alpha) + R[13:15] */
- sxi(SX_SAXP16X16SR8(21, 17, 25, 2));
+ sxi(SX_SAXP16X16SR8, 21, 17, 25, 2);
sxm(SX_STUQ0C, dstx, 24, 0);
}
dstx += 4;
@@ -263,8 +263,8 @@ void CG14Comp_Add32(Cg14Ptr p,
for (x = 0; x < full; x++) {
sxm(SX_LDUQ0, srcx, 8, 31);
sxm(SX_LDUQ0, dstx, 40, 31);
- sxi(SX_ADDV(8, 40, 72, 15));
- sxi(SX_ADDV(24, 56, 88, 15));
+ sxi(SX_ADDV, 8, 40, 72, 15);
+ sxi(SX_ADDV, 24, 56, 88, 15);
sxm(SX_STUQ0, dstx, 72, 31);
srcx += 128;
dstx += 128;
@@ -274,10 +274,10 @@ void CG14Comp_Add32(Cg14Ptr p,
sxm(SX_LDUQ0, srcx, 8, part - 1);
sxm(SX_LDUQ0, dstx, 40, part - 1);
if (part & 16) {
- sxi(SX_ADDV(8, 40, 72, 15));
- sxi(SX_ADDV(24, 56, 88, part - 17));
+ sxi(SX_ADDV, 8, 40, 72, 15);
+ sxi(SX_ADDV, 24, 56, 88, part - 17);
} else {
- sxi(SX_ADDV(8, 40, 72, part - 1));
+ sxi(SX_ADDV, 8, 40, 72, part - 1);
}
sxm(SX_STUQ0, dstx, 72, part - 1);
@@ -324,8 +324,8 @@ void CG14Comp_Add8(Cg14Ptr p,
for (x = 0; x < full; x++) {
write_sx_io(p, srcx, SX_LDB(8, 31, srcoff));
write_sx_io(p, dstx, SX_LDB(40, 31, dstoff));
- sxi(SX_ADDV(8, 40, 72, 15));
- sxi(SX_ADDV(24, 56, 88, 15));
+ sxi(SX_ADDV, 8, 40, 72, 15);
+ sxi(SX_ADDV, 24, 56, 88, 15);
write_sx_io(p, dstx, SX_STBC(72, 31, dstoff));
srcx += 32;
dstx += 32;
@@ -336,10 +336,10 @@ void CG14Comp_Add8(Cg14Ptr p,
write_sx_io(p, srcx, SX_LDB(8, part - 1, srcoff));
write_sx_io(p, dstx, SX_LDB(40, part - 1, dstoff));
if (part > 16) {
- sxi(SX_ADDV(8, 40, 72, 15));
- sxi(SX_ADDV(24, 56, 88, part - 17));
+ sxi(SX_ADDV, 8, 40, 72, 15);
+ sxi(SX_ADDV, 24, 56, 88, part - 17);
} else {
- sxi(SX_ADDV(8, 40, 72, part - 1));
+ sxi(SX_ADDV, 8, 40, 72, part - 1);
}
write_sx_io(p, dstx, SX_STBC(72, part - 1, dstoff));
}
@@ -390,8 +390,8 @@ void CG14Comp_Add8_32(Cg14Ptr p,
write_sx_io(p, srcx, SX_LDB(8, 31, srcoff));
/* load alpha from destination */
write_sx_io(p, dstx, SX_LDUC0(40, 31, dstoff));
- sxi(SX_ADDV(8, 40, 72, 15));
- sxi(SX_ADDV(24, 56, 88, 15));
+ sxi(SX_ADDV, 8, 40, 72, 15);
+ sxi(SX_ADDV, 24, 56, 88, 15);
/* write clamped values back into dest alpha */
write_sx_io(p, dstx, SX_STUC0C(72, 31, dstoff));
srcx += 32;
@@ -403,10 +403,10 @@ void CG14Comp_Add8_32(Cg14Ptr p,
write_sx_io(p, srcx, SX_LDB(8, part - 1, srcoff));
write_sx_io(p, dstx, SX_LDUC0(40, part - 1, dstoff));
if (part > 16) {
- sxi(SX_ADDV(8, 40, 72, 15));
- sxi(SX_ADDV(24, 56, 88, part - 17));
+ sxi(SX_ADDV, 8, 40, 72, 15);
+ sxi(SX_ADDV, 24, 56, 88, part - 17);
} else {
- sxi(SX_ADDV(8, 40, 72, part - 1));
+ sxi(SX_ADDV, 8, 40, 72, part - 1);
}
write_sx_io(p, dstx, SX_STUC0C(72, part - 1, dstoff));
}
@@ -449,10 +449,10 @@ void CG14Comp_Over32(Cg14Ptr p,
/* fetch source pixels */
sxm(SX_LDUQ0, srcx, 12, num - 1);
if (flip) {
- sxi(SX_GATHER(13, 4, 40, num - 1));
- sxi(SX_GATHER(15, 4, 44, num - 1));
- sxi(SX_SCATTER(40, 4, 15, num - 1));
- sxi(SX_SCATTER(44, 4, 13, num - 1));
+ sxi(SX_GATHER, 13, 4, 40, num - 1);
+ sxi(SX_GATHER, 15, 4, 44, num - 1);
+ sxi(SX_SCATTER, 40, 4, 15, num - 1);
+ sxi(SX_SCATTER, 44, 4, 13, num - 1);
}
/* fetch dst pixels */
sxm(SX_LDUQ0, dstx, 44, num - 1);
@@ -460,9 +460,9 @@ void CG14Comp_Over32(Cg14Ptr p,
for (i = 0; i < num; i++) {
int ii = i << 2;
/* write inverted alpha into SCAM */
- sxi(SX_XORS(12 + ii, 8, R_SCAM, 0));
+ sxi(SX_XORS, 12 + ii, 8, R_SCAM, 0);
/* dst * (1 - alpha) + src */
- sxi(SX_SAXP16X16SR8(44 + ii, 12 + ii, 76 + ii, 3));
+ sxi(SX_SAXP16X16SR8, 44 + ii, 12 + ii, 76 + ii, 3);
}
sxm(SX_STUQ0C, dstx, 76, num - 1);
srcx += 16;
@@ -500,10 +500,10 @@ void CG14Comp_Over32Mask(Cg14Ptr p,
/* fetch source pixels */
sxm(SX_LDUQ0, srcx, 12, num - 1);
if (flip) {
- sxi(SX_GATHER(13, 4, 40, num - 1));
- sxi(SX_GATHER(15, 4, 44, num - 1));
- sxi(SX_SCATTER(40, 4, 15, num - 1));
- sxi(SX_SCATTER(44, 4, 13, num - 1));
+ sxi(SX_GATHER, 13, 4, 40, num - 1);
+ sxi(SX_GATHER, 15, 4, 44, num - 1);
+ sxi(SX_SCATTER, 40, 4, 15, num - 1);
+ sxi(SX_SCATTER, 44, 4, 13, num - 1);
}
/* fetch mask */
sxm(SX_LDB, mskx, 28, num - 1);
@@ -513,13 +513,13 @@ void CG14Comp_Over32Mask(Cg14Ptr p,
for (i = 0; i < num; i++) {
int ii = i << 2;
/* mask alpha to SCAM */
- sxi(SX_ORS(28 + i, 0, R_SCAM, 0));
+ sxi(SX_ORS, 28 + i, 0, R_SCAM, 0);
/* src * alpha */
- sxi(SX_SAXP16X16SR8(12 + ii, 0, 60 + ii, 3));
+ sxi(SX_SAXP16X16SR8, 12 + ii, 0, 60 + ii, 3);
/* write inverted alpha into SCAM */
- sxi(SX_XORS(28 + i, 8, R_SCAM, 0));
+ sxi(SX_XORS, 28 + i, 8, R_SCAM, 0);
/* dst * (1 - alpha) + R[60:] */
- sxi(SX_SAXP16X16SR8(44 + ii, 60 + ii, 76 + ii, 3));
+ sxi(SX_SAXP16X16SR8, 44 + ii, 60 + ii, 76 + ii, 3);
}
sxm(SX_STUQ0C, dstx, 76, num - 1);
srcx += 16;
@@ -545,7 +545,7 @@ void CG14Comp_Over32Mask_noalpha(Cg14Ptr
write_sx_reg(p, SX_QUEUED(8), 0xff);
write_sx_reg(p, SX_QUEUED(9), 0xff);
- sxi(SX_ORS(8, 0, 10, 1));
+ sxi(SX_ORS, 8, 0, 10, 1);
for (line = 0; line < height; line++) {
srcx = src;
mskx = msk;
@@ -561,28 +561,28 @@ void CG14Comp_Over32Mask_noalpha(Cg14Ptr
/* fetch source pixels */
sxm(SX_LDUQ0, srcx, 12, num - 1);
if (flip) {
- sxi(SX_GATHER(13, 4, 40, num - 1));
- sxi(SX_GATHER(15, 4, 44, num - 1));
- sxi(SX_SCATTER(40, 4, 15, num - 1));
- sxi(SX_SCATTER(44, 4, 13, num - 1));
+ sxi(SX_GATHER, 13, 4, 40, num - 1);
+ sxi(SX_GATHER, 15, 4, 44, num - 1);
+ sxi(SX_SCATTER, 40, 4, 15, num - 1);
+ sxi(SX_SCATTER, 44, 4, 13, num - 1);
}
/* fetch mask */
sxm(SX_LDB, mskx, 28, num - 1);
/* fetch dst pixels */
sxm(SX_LDUQ0, dstx, 44, num - 1);
/* set src alpha to 0xff */
- sxi(SX_SCATTER(8, 4, 12, num - 1));
+ sxi(SX_SCATTER, 8, 4, 12, num - 1);
/* now process up to 4 pixels */
for (i = 0; i < num; i++) {
int ii = i << 2;
/* mask alpha to SCAM */
- sxi(SX_ORS(28 + i, 0, R_SCAM, 0));
+ sxi(SX_ORS, 28 + i, 0, R_SCAM, 0);
/* src * alpha */
- sxi(SX_SAXP16X16SR8(12 + ii, 0, 60 + ii, 3));
+ sxi(SX_SAXP16X16SR8, 12 + ii, 0, 60 + ii, 3);
/* write inverted alpha into SCAM */
- sxi(SX_XORS(28 + i, 8, R_SCAM, 0));
+ sxi(SX_XORS, 28 + i, 8, R_SCAM, 0);
/* dst * (1 - alpha) + R[60:] */
- sxi(SX_SAXP16X16SR8(44 + ii, 60 + ii, 76 + ii, 3));
+ sxi(SX_SAXP16X16SR8, 44 + ii, 60 + ii, 76 + ii, 3);
}
sxm(SX_STUQ0C, dstx, 76, num - 1);
srcx += 16;
@@ -608,7 +608,7 @@ void CG14Comp_Over32Mask32_noalpha(Cg14P
write_sx_reg(p, SX_QUEUED(8), 0xff);
write_sx_reg(p, SX_QUEUED(9), 0xff);
- sxi(SX_ORS(8, 0, 10, 1));
+ sxi(SX_ORS, 8, 0, 10, 1);
for (line = 0; line < height; line++) {
srcx = src;
mskx = msk;
@@ -624,28 +624,28 @@ void CG14Comp_Over32Mask32_noalpha(Cg14P
/* fetch source pixels */
sxm(SX_LDUQ0, srcx, 12, num - 1);
if (flip) {
- sxi(SX_GATHER(13, 4, 40, num - 1));
- sxi(SX_GATHER(15, 4, 44, num - 1));
- sxi(SX_SCATTER(40, 4, 15, num - 1));
- sxi(SX_SCATTER(44, 4, 13, num - 1));
+ sxi(SX_GATHER, 13, 4, 40, num - 1);
+ sxi(SX_GATHER, 15, 4, 44, num - 1);
+ sxi(SX_SCATTER, 40, 4, 15, num - 1);
+ sxi(SX_SCATTER, 44, 4, 13, num - 1);
}
/* fetch mask */
sxm(SX_LDUQ0, mskx, 28, num - 1);
/* fetch dst pixels */
sxm(SX_LDUQ0, dstx, 44, num - 1);
/* set src alpha to 0xff */
- sxi(SX_SCATTER(8, 4, 12, num - 1));
+ sxi(SX_SCATTER, 8, 4, 12, num - 1);
/* now process up to 4 pixels */
for (i = 0; i < num; i++) {
int ii = i << 2;
/* mask alpha to SCAM */
- sxi(SX_ORS(28 + ii, 0, R_SCAM, 0));
+ sxi(SX_ORS, 28 + ii, 0, R_SCAM, 0);
/* src * alpha */
- sxi(SX_SAXP16X16SR8(12 + ii, 0, 60 + ii, 3));
+ sxi(SX_SAXP16X16SR8, 12 + ii, 0, 60 + ii, 3);
/* write inverted alpha into SCAM */
- sxi(SX_XORS(28 + ii, 8, R_SCAM, 0));
+ sxi(SX_XORS, 28 + ii, 8, R_SCAM, 0);
/* dst * (1 - alpha) + R[60:] */
- sxi(SX_SAXP16X16SR8(44 + ii, 60 + ii, 76 + ii, 3));
+ sxi(SX_SAXP16X16SR8, 44 + ii, 60 + ii, 76 + ii, 3);
}
sxm(SX_STUQ0C, dstx, 76, num - 1);
srcx += 16;
