Module Name:    src
Committed By:   msaitoh
Date:           Sat Jul 16 06:52:41 UTC 2022

Modified Files:
        src/sys/dev/ic: mfireg.h
        src/sys/dev/pci: mfii.c

Log Message:
Add max 256 VD support.


To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/dev/ic/mfireg.h
cvs rdiff -u -r1.23 -r1.24 src/sys/dev/pci/mfii.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/ic/mfireg.h
diff -u src/sys/dev/ic/mfireg.h:1.23 src/sys/dev/ic/mfireg.h:1.24
--- src/sys/dev/ic/mfireg.h:1.23	Sat Jul  9 11:44:57 2022
+++ src/sys/dev/ic/mfireg.h	Sat Jul 16 06:52:40 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: mfireg.h,v 1.23 2022/07/09 11:44:57 msaitoh Exp $ */
+/* $NetBSD: mfireg.h,v 1.24 2022/07/16 06:52:40 msaitoh Exp $ */
 /* $OpenBSD: mfireg.h,v 1.24 2006/06/19 19:05:45 marco Exp $ */
 /*
  * Copyright (c) 2006 Marco Peereboom <ma...@peereboom.us>
@@ -809,7 +809,23 @@ struct mfi_ctrl_props {
 		uint32_t	allowBootWithPinnedCache	:1;
 		uint32_t	disableSpinDownHS		:1;
 		uint32_t	enableJBOD			:1;
-		uint32_t	reserved			:18;
+		uint32_t	disableCacheBypass		:1;
+		uint32_t	useDiskActivityForLocate	:1;
+		uint32_t	enablePI			:1;
+		uint32_t	preventPIImport			:1;
+		uint32_t	useGlobalSparesForEmergency	:1;
+		uint32_t	useUnconfGoodForEmergency	:1;
+		uint32_t	useEmergencySparesforSMARTer	:1;
+		uint32_t	forceSGPIOForQuadOnly		:1;
+		uint32_t	enableConfigAutoBalance		:1;
+		uint32_t	enableVirtualCache		:1;
+		uint32_t	enableAutoLockRecovery		:1;
+		uint32_t	disableImmediateIO		:1;
+		uint32_t	disableT10RebuildAssist		:1;
+		uint32_t	ignore64ldRestriction		:1;
+		uint32_t	enableSwZone			:1;
+		uint32_t	limitMaxRateSATA3G		:1;
+		uint32_t	reserved			:2;
 	} OnOffProperties;
 	/*
 	 * % of source LD to be reserved for auto snapshot in snapshot
@@ -967,7 +983,111 @@ struct mfi_ctrl_info {
 	uint8_t			mci_reserved2[11];
 	struct mfi_ctrl_props	mci_properties;
 	char			mci_package_version[0x60];
-	uint8_t			mci_pad[0x800 - 0x6a0];
+
+	uint64_t		mci_dev_iface_port_addr2[8];
+	uint8_t			mci_reserved3[128];
+
+	struct {
+		uint16_t raid_level_0;
+		uint16_t raid_level_1;
+		uint16_t raid_level_5;
+		uint16_t raid_level_1e;
+		uint16_t raid_level_6;
+		uint16_t raid_level_10;
+		uint16_t raid_level_50;
+		uint16_t raid_level_60;
+		uint16_t raid_level_1e_rlq0;
+		uint16_t raid_level_1e0_rlq0;
+		uint16_t reserved[6];
+	} __packed		mci_pds_for_raid_levels;
+
+	uint16_t		mci_max_pds;
+	uint16_t		mci_max_ded_hsps;
+	uint16_t		mci_max_global_hsps;
+	uint16_t		mci_ddf_size;
+	uint8_t			mci_max_lds_per_array;
+	uint8_t			mci_partitions_in_ddf;
+	uint8_t			mci_lock_key_binding;
+	uint8_t			mci_max_pits_per_ld;
+	uint8_t			mci_max_views_per_ld;
+	uint8_t			mci_max_target_id;
+	uint16_t		mci_max_bvl_vd_size;
+
+	uint16_t		mci_max_configurable_ssc_size;
+	uint16_t		mci_current_ssc_size;
+
+	char			mci_expander_fw_version[12];
+
+	uint16_t		mci_pfk_trial_time_remaining;
+	uint16_t		mci_cache_memory_size;
+
+	uint32_t		mci_adapter_ops2;
+#define MFI_INFO_AOPS2_SUPP_PI_CTRL	0x00000001
+#define MFI_INFO_AOPS2_SUPP_LD_PIT1	0x00000002
+#define MFI_INFO_AOPS2_SUPP_LD_PIT2	0x00000004
+#define MFI_INFO_AOPS2_SUPP_LD_PIT3	0x00000008
+#define MFI_INFO_AOPS2_SUPP_LD_BBMI	0x00000010
+#define MFI_INFO_AOPS2_SUPP_SHIELD_STAT	0x00000020
+#define MFI_INFO_AOPS2_BLK_SSD_WC_CNG	0x00000040
+#define MFI_INFO_AOPS2_SUPP_SUSPRES_BGO	0x00000080
+#define MFI_INFO_AOPS2_SUPP_EMERG_SPARE	0x00000100
+#define MFI_INFO_AOPS2_SUPP_SET_LNKSPD	0x00000200
+#define MFI_INFO_AOPS2_SUPP_BT_PFK_CNG	0x00000400
+#define MFI_INFO_AOPS2_SUPP_JBOD	0x00000800
+#define MFI_INFO_AOPS2_DIS_ONLN_PFK_CNG	0x00001000
+#define MFI_INFO_AOPS2_SUPP_PERF_TUNE	0x00002000
+#define MFI_INFO_AOPS2_SUPP_SSD_PREAD	0x00004000
+#define MFI_INFO_AOPS2_RT_SCHED		0x00008000
+#define MFI_INFO_AOPS2_SUPP_RESET_NOW	0x00010000
+#define MFI_INFO_AOPS2_SUPP_EMU_DRIVE	0x00020000
+#define MFI_INFO_AOPS2_HEADLESS_MODE	0x00040000
+#define MFI_INFO_AOPS2_DEDIC_HSPARE_LIM	0x00080000
+#define MFI_INFO_AOPS2_SUPP_UNEVEN_SPAN	0x00100000
+
+	uint8_t			mci_drv_version[32];
+	uint8_t			mci_max_da_pd_count_spinup_60;
+	uint8_t			mci_temperature_roc;
+	uint8_t			mci_temperature_ctrl;
+	uint8_t			mci_reserved4;
+	uint16_t		mci_max_configurable_pds;
+	uint8_t			mci_reserved5[2];
+
+	uint32_t		cluster;
+
+	char			cluster_id[16];
+	char			reserved6[4];
+
+	uint32_t		mci_adapter_ops3;
+#define MFI_INFO_AOPS3_SUPP_PERSONALTY_CHANGE	0x00000003
+#define MFI_INFO_AOPS3_SUPP_THERMAL_POLL_INTVL	0x00000004
+#define MFI_INFO_AOPS3_SUPP_DIS_IMMEDIATE_IO	0x00000008
+#define MFI_INFO_AOPS3_SUPP_T10_REBUILD_ASSIST	0x00000010
+#define MFI_INFO_AOPS3_SUPP_MAX_EXT_LDS		0x00000020
+#define MFI_INFO_AOPS3_SUPP_CRASH_DUMP		0x00000040
+#define MFI_INFO_AOPS3_SUPP_SW_SONE		0x00000080
+#define MFI_INFO_AOPS3_SUPP_DEBUG_QUEUE		0x00000100
+#define MFI_INFO_AOPS3_SUPP_NVCACHE_ERASE	0x00000200
+#define MFI_INFO_AOPS3_SUPP_FORCE_TO_512E	0x00000400
+#define MFI_INFO_AOPS3_SUPP_HOQ_REBUILD		0x00000800
+#define MFI_INFO_AOPS3_SUPP_ALLOWED_OPS_DRVRMVL	0x00001000
+#define MFI_INFO_AOPS3_SUPP_DRV_ACTIVITY_LEDSET	0x00002000
+#define MFI_INFO_AOPS3_SUPP_NVDRAM		0x00004000
+#define MFI_INFO_AOPS3_SUPP_FORCE_FLASH		0x00008000
+#define MFI_INFO_AOPS3_SUPP_DIS_SES_MONITOR	0x00010000
+#define MFI_INFO_AOPS3_SUPP_CACHE_BYPASS_MODE	0x00020000
+#define MFI_INFO_AOPS3_SUPP_SECURITY_ON_JBOD	0x00040000
+#define MFI_INFO_AOPS3_DISCARD_CACHE_DUR_LD_DEL	0x00080000
+#define MFI_INFO_AOPS3_SUPP_TTY_LOG_COMPRESS	0x00100000
+#define MFI_INFO_AOPS3_SUPP_CPLD_UPDATE		0x00200000
+#define MFI_INFO_AOPS3_SUPP_DISK_CACHE_SYS_PD	0x00400000
+#define MFI_INFO_AOPS3_SUPP_EXTENDED_SSC_SIZE	0x00800000
+#define MFI_INFO_AOPS3_USE_SEQNUM_JBOD_FP	0x01000000
+
+	uint8_t			mci_pad_cpld[16];
+
+	uint16_t		mci_adapter_ops4;
+
+	uint8_t			mci_pad[0x800 - 0x7fe];
 } __packed;
 
 /* logical disk info from MR_DCMD_LD_GET_LIST */

Index: src/sys/dev/pci/mfii.c
diff -u src/sys/dev/pci/mfii.c:1.23 src/sys/dev/pci/mfii.c:1.24
--- src/sys/dev/pci/mfii.c:1.23	Sat Jul  9 11:44:57 2022
+++ src/sys/dev/pci/mfii.c	Sat Jul 16 06:52:41 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: mfii.c,v 1.23 2022/07/09 11:44:57 msaitoh Exp $ */
+/* $NetBSD: mfii.c,v 1.24 2022/07/16 06:52:41 msaitoh Exp $ */
 /* $OpenBSD: mfii.c,v 1.58 2018/08/14 05:22:21 jmatthew Exp $ */
 
 /*
@@ -19,7 +19,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mfii.c,v 1.23 2022/07/09 11:44:57 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mfii.c,v 1.24 2022/07/16 06:52:41 msaitoh Exp $");
 
 #include "bio.h"
 
@@ -206,6 +206,21 @@ struct mfii_foreign_scan_info {
 	struct mfii_foreign_scan_cfg cfgs[8];
 } __packed;
 
+#define MFII_MAX_LD_EXT		256
+
+struct mfii_ld_list_ext {
+	uint32_t		mll_no_ld;
+	uint32_t		mll_res;
+	struct {
+		struct mfi_ld	mll_ld;
+		uint8_t		mll_state; /* states are the same as MFI_ */
+		uint8_t		mll_res2;
+		uint8_t		mll_res3;
+		uint8_t		mll_res4;
+		uint64_t	mll_size;
+	} mll_list[MFII_MAX_LD_EXT];
+} __packed;
+
 struct mfii_dmamem {
 	bus_dmamap_t		mdm_map;
 	bus_dma_segment_t	mdm_seg;
@@ -340,13 +355,14 @@ struct mfii_softc {
 	struct {
 		bool		ld_present;
 		char		ld_dev[16];	/* device name sd? */
-	}			sc_ld[MFI_MAX_LD];
-	int			sc_target_lds[MFI_MAX_LD];
+	}			sc_ld[MFII_MAX_LD_EXT];
+	int			sc_target_lds[MFII_MAX_LD_EXT];
+	bool			sc_max256vd;
 
 	/* bio */
 	struct mfi_conf		*sc_cfg;
 	struct mfi_ctrl_info	sc_info;
-	struct mfi_ld_list	sc_ld_list;
+	struct mfii_ld_list_ext	sc_ld_list;
 	struct mfi_ld_details	*sc_ld_details; /* array to all logical disks */
 	int			sc_no_pd; /* used physical disks */
 	int			sc_ld_sz; /* sizeof sc_ld_details */
@@ -697,6 +713,7 @@ mfii_attach(device_t parent, device_t se
 	int chain_frame_sz, nsge_in_io, nsge_in_chain, i;
 	struct scsipi_adapter *adapt = &sc->sc_adapt;
 	struct scsipi_channel *chan = &sc->sc_chan;
+	union mfi_mbox mbox;
 
 	/* init sc */
 	sc->sc_dev = self;
@@ -873,6 +890,13 @@ mfii_attach(device_t parent, device_t se
 	for (i = 0; i < sc->sc_info.mci_lds_present; i++)
 		sc->sc_ld[i].ld_present = 1;
 
+	sc->sc_max256vd =
+	    (sc->sc_info.mci_adapter_ops3 & MFI_INFO_AOPS3_SUPP_MAX_EXT_LDS) ?
+	    true : false;
+
+	if (sc->sc_max256vd)
+		aprint_verbose_dev(self, "Max 256 VD support\n");
+
 	memset(adapt, 0, sizeof(*adapt));
 	adapt->adapt_dev = sc->sc_dev;
 	adapt->adapt_nchannels = 1;
@@ -902,8 +926,11 @@ mfii_attach(device_t parent, device_t se
 		goto intr_disestablish;
 	}
 
+	memset(&mbox, 0, sizeof(mbox));
+	if (sc->sc_max256vd)
+		mbox.b[0] = 1;
 	mutex_enter(&sc->sc_lock);
-	if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, NULL, &sc->sc_ld_list,
+	if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, &mbox, &sc->sc_ld_list,
 	    sizeof(sc->sc_ld_list), MFII_DATA_IN, true) != 0) {
 		mutex_exit(&sc->sc_lock);
 		aprint_error_dev(self,
@@ -1401,11 +1428,15 @@ mfii_aen_pd_state_change(struct mfii_sof
 static void
 mfii_aen_ld_update(struct mfii_softc *sc)
 {
+	union mfi_mbox mbox;
 	int i, target, old, nld;
-	int newlds[MFI_MAX_LD];
+	int newlds[MFII_MAX_LD_EXT];
 
+	memset(&mbox, 0, sizeof(mbox));
+	if (sc->sc_max256vd)
+		mbox.b[0] = 1;
 	mutex_enter(&sc->sc_lock);
-	if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, NULL, &sc->sc_ld_list,
+	if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, &mbox, &sc->sc_ld_list,
 	    sizeof(sc->sc_ld_list), MFII_DATA_IN, false) != 0) {
 		mutex_exit(&sc->sc_lock);
 		DNPRINTF(MFII_D_MISC,
@@ -1423,7 +1454,7 @@ mfii_aen_ld_update(struct mfii_softc *sc
 		newlds[target] = i;
 	}
 
-	for (i = 0; i < MFI_MAX_LD; i++) {
+	for (i = 0; i < MFII_MAX_LD_EXT; i++) {
 		old = sc->sc_target_lds[i];
 		nld = newlds[i];
 
@@ -2192,7 +2223,7 @@ mfii_scsipi_request(struct scsipi_channe
 	periph = xs->xs_periph;
 	target = periph->periph_target;
 
-	if (target >= MFI_MAX_LD || !sc->sc_ld[target].ld_present ||
+	if (target >= MFII_MAX_LD_EXT || !sc->sc_ld[target].ld_present ||
 	    periph->periph_lun != 0) {
 		xs->error = XS_SELTIMEOUT;
 		scsipi_done(xs);
@@ -2921,7 +2952,10 @@ mfii_bio_getitall(struct mfii_softc *sc)
 	sc->sc_cfg = cfg;
 
 	/* get all ld info */
-	if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, NULL, &sc->sc_ld_list,
+	memset(&mbox, 0, sizeof(mbox));
+	if (sc->sc_max256vd)
+		mbox.b[0] = 1;
+	if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, &mbox, &sc->sc_ld_list,
 	    sizeof(sc->sc_ld_list), MFII_DATA_IN, false))
 		goto done;
 
@@ -3898,7 +3932,7 @@ static int
 mfii_create_sensors(struct mfii_softc *sc)
 {
 	int i, rv;
-	const int nsensors = MFI_BBU_SENSORS + MFI_MAX_LD;
+	const int nsensors = MFI_BBU_SENSORS + MFII_MAX_LD_EXT;
 
 	sc->sc_sme = sysmon_envsys_create();
 	sc->sc_sensors = malloc(sizeof(envsys_data_t) * nsensors,
@@ -3967,7 +4001,7 @@ mfii_refresh_sensor(struct sysmon_envsys
 {
 	struct mfii_softc	*sc = sme->sme_cookie;
 
-	if (edata->sensor >= MFI_BBU_SENSORS + MFI_MAX_LD)
+	if (edata->sensor >= MFI_BBU_SENSORS + MFII_MAX_LD_EXT)
 		return;
 
 	if (edata->sensor < MFI_BBU_SENSORS) {

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