Module Name: src
Committed By: riastradh
Date: Mon Mar 17 18:24:08 UTC 2025
Modified Files:
src/sys/dev/usb: umcpmio.c umcpmio.h umcpmio_hid_reports.h umcpmio_io.h
umcpmio_subr.c umcpmio_subr.h
Log Message:
umcpmio(4): Fix a lot of KNF issues.
- Space after comma.
- Space between _keyword_ and parentheses: `for (...)'
- No space between _function_ and parentheses: `foo(...)'.
- Space around assignment operators: `x = y', not `x=y'.
- Space after semicolons: `for (x = 0; x < n; x++)'
- Break overlong lines.
- Sort includes.
- `do { ... } while (0)' in statement macros.
- Parenthesize macro arguments (or just use functions if macros
aren't necessary).
- No parentheses needed for `return': say `return EINVAL;', not
`return (EINVAL);' (but parenthesizing complex expressions is
fine).
- Various other things.
/*
* block comments like this
*/
Please, folks, read through /usr/share/misc/style and try to adhere to
it _before_ committing. There's also an Emacs C style in
/usr/share/misc/NetBSD.el and a clang-format configuration in
/usr/share/misc/dot.clang-format to help you.
Aside from KNF, I strongly encourage you to write:
error = foo();
if (error)
goto out;
error = bar();
if (error)
goto out;
...
instead of
error = foo();
if (!error) {
error = bar();
if (!error) {
...
} else {
printf("error in bar\n");
}
} else {
printf("error in foo\n");
}
It's hard to follow _both_ the success cases _and_ the failure cases
when the success cases grow progressively more deeply indented, and the
failure cases are farther and farther away from the logic handling them
as you have more conditions.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/dev/usb/umcpmio.c src/sys/dev/usb/umcpmio.h \
src/sys/dev/usb/umcpmio_hid_reports.h src/sys/dev/usb/umcpmio_io.h \
src/sys/dev/usb/umcpmio_subr.c src/sys/dev/usb/umcpmio_subr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/usb/umcpmio.c
diff -u src/sys/dev/usb/umcpmio.c:1.1 src/sys/dev/usb/umcpmio.c:1.2
--- src/sys/dev/usb/umcpmio.c:1.1 Mon Dec 16 16:37:38 2024
+++ src/sys/dev/usb/umcpmio.c Mon Mar 17 18:24:08 2025
@@ -1,4 +1,4 @@
-/* $NetBSD: umcpmio.c,v 1.1 2024/12/16 16:37:38 brad Exp $ */
+/* $NetBSD: umcpmio.c,v 1.2 2025/03/17 18:24:08 riastradh Exp $ */
/*
* Copyright (c) 2024 Brad Spencer <b...@anduin.eldar.org>
@@ -17,49 +17,52 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: umcpmio.c,v 1.1 2024/12/16 16:37:38 brad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: umcpmio.c,v 1.2 2025/03/17 18:24:08 riastradh Exp $");
/*
- Driver for the Microchip MCP2221 / MCP2221A USB multi-io chip
-*/
+ * Driver for the Microchip MCP2221 / MCP2221A USB multi-io chip
+ */
#ifdef _KERNEL_OPT
#include "opt_usb.h"
#endif
#include <sys/param.h>
-#include <sys/systm.h>
+#include <sys/types.h>
+
#include <sys/conf.h>
+#include <sys/device.h>
+#include <sys/file.h>
+#include <sys/gpio.h>
+#include <sys/kauth.h>
#include <sys/kernel.h>
#include <sys/kmem.h>
-#include <sys/device.h>
+#include <sys/lwp.h>
#include <sys/sysctl.h>
+#include <sys/systm.h>
#include <sys/tty.h>
-#include <sys/file.h>
#include <sys/vnode.h>
-#include <sys/kauth.h>
-#include <sys/lwp.h>
-#include <sys/gpio.h>
+#include <dev/i2c/i2cvar.h>
+
#include <dev/gpio/gpiovar.h>
-#include <dev/i2c/i2cvar.h>
+#include <dev/hid/hid.h>
+#include <dev/usb/uhidev.h>
#include <dev/usb/usb.h>
-#include <dev/usb/usbhid.h>
-
+#include <dev/usb/usbdevs.h>
#include <dev/usb/usbdi.h>
#include <dev/usb/usbdi_util.h>
-#include <dev/usb/usbdevs.h>
-#include <dev/usb/uhidev.h>
-#include <dev/hid/hid.h>
+#include <dev/usb/usbhid.h>
#include <dev/usb/umcpmio.h>
-#include <dev/usb/umcpmio_subr.h>
#include <dev/usb/umcpmio_hid_reports.h>
#include <dev/usb/umcpmio_io.h>
+#include <dev/usb/umcpmio_subr.h>
-int umcpmio_send_report(struct umcpmio_softc *, uint8_t *, size_t, uint8_t *, int);
+int umcpmio_send_report(struct umcpmio_softc *, uint8_t *, size_t, uint8_t *,
+ int);
static const struct usb_devno umcpmio_devs[] = {
{ USB_VENDOR_MICROCHIP, USB_PRODUCT_MICROCHIP_MCP2221 },
@@ -78,20 +81,23 @@ static int umcpmio_verify_gpioclock_cd_s
#define UMCPMIO_DEBUG 1
#ifdef UMCPMIO_DEBUG
-#define DPRINTF(x) if (umcpmiodebug) printf x
-#define DPRINTFN(n, x) if (umcpmiodebug > (n)) printf x
+#define DPRINTF(x) do { if (umcpmiodebug) printf x; } while (0)
+#define DPRINTFN(n, x) do { if (umcpmiodebug > (n)) printf x; } while (0)
int umcpmiodebug = 0;
#else
#define DPRINTF(x) __nothing
-#define DPRINTFN(n,x) __nothing
+#define DPRINTFN(n, x) __nothing
#endif
-
CFATTACH_DECL_NEW(umcpmio, sizeof(struct umcpmio_softc), umcpmio_match,
umcpmio_attach, umcpmio_detach, umcpmio_activate);
-
-#define WAITMS(ms) if (ms > 0) delay(ms * 1000)
+static void
+WAITMS(int ms)
+{
+ if (ms > 0)
+ delay(ms * 1000);
+}
extern struct cfdriver umcpmio_cd;
@@ -100,6 +106,7 @@ static dev_type_read(umcpmio_dev_read);
static dev_type_write(umcpmio_dev_write);
static dev_type_close(umcpmio_dev_close);
static dev_type_ioctl(umcpmio_dev_ioctl);
+
const struct cdevsw umcpmio_cdevsw = {
.d_open = umcpmio_dev_open,
.d_close = umcpmio_dev_close,
@@ -115,7 +122,6 @@ const struct cdevsw umcpmio_cdevsw = {
.d_flag = D_OTHER
};
-
static const char umcpmio_valid_vrefs[] =
"4.096V, 2.048V, 1.024V, OFF, VDD";
@@ -128,17 +134,20 @@ static const char umcpmio_valid_cds[] =
static void
umcpmio_dump_buffer(bool enabled, uint8_t *buf, u_int len, const char *name)
{
+ int i;
+
if (enabled) {
- DPRINTF(("%s:",name));
- for(int i=0; i < len; i++) {
- DPRINTF((" %02x",buf[i]));
+ DPRINTF(("%s:", name));
+ for (i = 0; i < len; i++) {
+ DPRINTF((" %02x", buf[i]));
}
DPRINTF(("\n"));
}
}
-/* Communication with the HID function requires sending a HID report request and
- * then waiting for a response.
+/*
+ * Communication with the HID function requires sending a HID report
+ * request and then waiting for a response.
*
* The panic that occurs when trying to use the interrupt... i.e.
* attaching though this driver seems to be related to the fact that
@@ -156,9 +165,8 @@ umcpmio_dump_buffer(bool enabled, uint8_
/*
* This is the panic you will get:
*
- panic: kernel diagnostic assertion "ci->ci_mtx_count == -1" failed: file "../../../../kern/kern_synch.c", line 762 mi_switch: cpu0: ci_mtx_count (-2) != -1 (block with spin-mutex held)
-
-*/
+ * panic: kernel diagnostic assertion "ci->ci_mtx_count == -1" failed: file "../../../../kern/kern_synch.c", line 762 mi_switch: cpu0: ci_mtx_count (-2) != -1 (block with spin-mutex held)
+ */
static void
umcpmio_uhidev_intr(void *cookie, void *ibuf, u_int len)
@@ -168,26 +176,33 @@ umcpmio_uhidev_intr(void *cookie, void *
if (sc->sc_dying)
return;
- DPRINTFN(30,("umcpmio_uhidev_intr: len=%d\n",len));
+ DPRINTFN(30, ("umcpmio_uhidev_intr: len=%d\n", len));
mutex_enter(&sc->sc_res_mutex);
switch(len) {
case MCP2221_RES_BUFFER_SIZE:
if (sc->sc_res_buffer != NULL) {
- memcpy(sc->sc_res_buffer, ibuf, MCP2221_RES_BUFFER_SIZE);
+ memcpy(sc->sc_res_buffer, ibuf,
+ MCP2221_RES_BUFFER_SIZE);
sc->sc_res_ready = true;
cv_signal(&sc->sc_res_cv);
} else {
- int d=umcpmiodebug;
- device_printf(sc->sc_dev,"umcpmio_uhidev_intr: NULL sc_res_buffer: len=%d\n",len);
- umcpmiodebug=20;
- umcpmio_dump_buffer(true, (uint8_t *)ibuf, len, "umcpmio_uhidev_intr: ibuf");
- umcpmiodebug=d;
+ int d = umcpmiodebug;
+ device_printf(sc->sc_dev,
+ "umcpmio_uhidev_intr: NULL sc_res_buffer:"
+ " len=%d\n",
+ len);
+ umcpmiodebug = 20;
+ umcpmio_dump_buffer(true, (uint8_t *)ibuf, len,
+ "umcpmio_uhidev_intr: ibuf");
+ umcpmiodebug = d;
}
break;
default:
- device_printf(sc->sc_dev,"umcpmio_uhidev_intr: Unknown interrupt length: %d",len);
+ device_printf(sc->sc_dev,
+ "umcpmio_uhidev_intr: Unknown interrupt length: %d",
+ len);
break;
}
mutex_exit(&sc->sc_res_mutex);
@@ -200,7 +215,7 @@ umcpmio_send_report(struct umcpmio_softc
size_t sendlen, uint8_t *resbuf, int timeout)
{
int err = 0;
- int err_count=0;
+ int err_count = 0;
if (sc->sc_dying)
return EIO;
@@ -208,7 +223,8 @@ umcpmio_send_report(struct umcpmio_softc
KASSERT(mutex_owned(&sc->sc_action_mutex));
if (sc->sc_res_buffer != NULL) {
- device_printf(sc->sc_dev,"umcpmio_send_report: sc->sc_res_buffer is not NULL\n");
+ device_printf(sc->sc_dev,
+ "umcpmio_send_report: sc->sc_res_buffer is not NULL\n");
}
sc->sc_res_buffer = resbuf;
sc->sc_res_ready = false;
@@ -216,40 +232,53 @@ umcpmio_send_report(struct umcpmio_softc
err = uhidev_write(sc->sc_hdev, sendbuf, sendlen);
if (err) {
- DPRINTF(("umcpmio_send_report: uhidev_write errored with: err=%d\n", err));
+ DPRINTF(("umcpmio_send_report: uhidev_write errored with:"
+ " err=%d\n", err));
goto out;
}
- DPRINTFN(30,("umcpmio_send_report: about to wait on cv. err=%d\n", err));
+ DPRINTFN(30, ("umcpmio_send_report: about to wait on cv. err=%d\n",
+ err));
mutex_enter(&sc->sc_res_mutex);
while (!sc->sc_res_ready) {
- DPRINTFN(20,("umcpmio_send_report: LOOP for response. sc_res_ready=%d, err_count=%d, timeout=%d\n",sc->sc_res_ready, err_count, mstohz(timeout)));
+ DPRINTFN(20, ("umcpmio_send_report: LOOP for response."
+ " sc_res_ready=%d, err_count=%d, timeout=%d\n",
+ sc->sc_res_ready, err_count, mstohz(timeout)));
- err = cv_timedwait_sig(&sc->sc_res_cv, &sc->sc_res_mutex, mstohz(timeout));
+ err = cv_timedwait_sig(&sc->sc_res_cv, &sc->sc_res_mutex,
+ mstohz(timeout));
- /* We are only going to allow this to loop on an error,
+ /*
+ * We are only going to allow this to loop on an error,
* any error at all, so many times.
*/
if (err) {
- DPRINTF(("umcpmio_send_report: cv_timedwait_sig reported an error: err=%d, sc->sc_res_ready=%d\n",err,sc->sc_res_ready));
+ DPRINTF(("umcpmio_send_report:"
+ " cv_timedwait_sig reported an error:"
+ " err=%d, sc->sc_res_ready=%d\n",
+ err, sc->sc_res_ready));
err_count++;
}
- /* The CV was interrupted, but the buffer is ready so, clear the error
- * and break out.
+ /*
+ * The CV was interrupted, but the buffer is ready so,
+ * clear the error and break out.
*/
if ((err == ERESTART) && (sc->sc_res_ready)) {
- DPRINTF(("umcpmio_send_report: ERESTART and buffer is ready\n"));
+ DPRINTF(("umcpmio_send_report:"
+ " ERESTART and buffer is ready\n"));
err = 0;
break;
}
- /* Too many times though the loop, just break out. Turn
+ /*
+ * Too many times though the loop, just break out. Turn
* a ERESTART (interruption) into a I/O error at this point.
*/
if (err_count > sc->sc_response_errcnt) {
- DPRINTF(("umcpmio_send_report: err_count exceeded: err=%d\n",err));
+ DPRINTF(("umcpmio_send_report: err_count exceeded:"
+ " err=%d\n", err));
if (err == ERESTART)
err = EIO;
break;
@@ -257,13 +286,19 @@ umcpmio_send_report(struct umcpmio_softc
/* This is a normal timeout, without interruption, try again */
if (err == EWOULDBLOCK) {
- DPRINTF(("umcpmio_send_report: EWOULDBLOCK: err_count=%d\n",err_count));
+ DPRINTF(("umcpmio_send_report: EWOULDBLOCK:"
+ " err_count=%d\n", err_count));
continue;
}
- /* The CV was interrupted and the buffer wasn't filled in, so try again */
+ /*
+ * The CV was interrupted and the buffer wasn't filled
+ * in, so try again
+ */
if ((err == ERESTART) && (!sc->sc_res_ready)) {
- DPRINTF(("umcpmio_send_report: ERESTART and buffer is NOT ready. err_count=%d\n",err_count));
+ DPRINTF(("umcpmio_send_report:"
+ " ERESTART and buffer is NOT ready."
+ " err_count=%d\n", err_count));
continue;
}
}
@@ -291,7 +326,7 @@ umcpmio_gpio_pin_read(void *arg, int pin
r = umcpmio_get_gpio_value(sc, pin, true);
- return(r);
+ return r;
}
static void
@@ -302,13 +337,14 @@ umcpmio_gpio_pin_write(void *arg, int pi
umcpmio_set_gpio_value_one(sc, pin, value, true);
}
-/* Internal function that does the dirty work of setting a gpio
+/*
+ * Internal function that does the dirty work of setting a gpio
* pin to its "type".
*
- * There are really two ways to do some of this, one is to set the pin to input
- * and output, or whatever, using SRAM calls, the other is to use the GPIO
- * config calls to set input and output and SRAM for everything else. This just
- * uses SRAM for everything.
+ * There are really two ways to do some of this, one is to set the pin
+ * to input and output, or whatever, using SRAM calls, the other is to
+ * use the GPIO config calls to set input and output and SRAM for
+ * everything else. This just uses SRAM for everything.
*/
static int
@@ -335,7 +371,8 @@ umcpmio_gpio_pin_ctlctl(void *arg, int p
if (err)
goto out;
- /* You can't just set one pin, you must set all of them, so copy the
+ /*
+ * You can't just set one pin, you must set all of them, so copy the
* current settings for the pin we are not messing with.
*
* And, yes, of course, if the MCP-2210 is ever supported with this
@@ -372,46 +409,62 @@ umcpmio_gpio_pin_ctlctl(void *arg, int p
umcpmio_set_gpio_dir_sram(&set_sram_req, pin, flags);
/*
- * This part is unfortunate... if a pin is set to output, the value set
- * on the pin is not mirrored by the chip into SRAM, but the chip will
- * use the value from SRAM to set the value of the pin. What this means is
- * that we have to learn the value from the GPIO config and make sure it is
- * set properly when updating SRAM.
+ * This part is unfortunate... if a pin is set to output, the
+ * value set on the pin is not mirrored by the chip into SRAM,
+ * but the chip will use the value from SRAM to set the value of
+ * the pin. What this means is that we have to learn the value
+ * from the GPIO config and make sure it is set properly when
+ * updating SRAM.
*/
if (current_gpio_cfg_res.gp0_pin_dir == MCP2221_GPIO_CFG_DIR_OUTPUT) {
- if (current_gpio_cfg_res.gp0_pin_value == 1)
- set_sram_req.gp0_settings |= MCP2221_SRAM_GPIO_OUTPUT_HIGH;
- else
- set_sram_req.gp0_settings &= ~MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ if (current_gpio_cfg_res.gp0_pin_value == 1) {
+ set_sram_req.gp0_settings |=
+ MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ } else {
+ set_sram_req.gp0_settings &=
+ ~MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ }
}
if (current_gpio_cfg_res.gp1_pin_dir == MCP2221_GPIO_CFG_DIR_OUTPUT) {
- if (current_gpio_cfg_res.gp1_pin_value == 1)
- set_sram_req.gp1_settings |= MCP2221_SRAM_GPIO_OUTPUT_HIGH;
- else
- set_sram_req.gp1_settings &= ~MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ if (current_gpio_cfg_res.gp1_pin_value == 1) {
+ set_sram_req.gp1_settings |=
+ MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ } else {
+ set_sram_req.gp1_settings &=
+ ~MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ }
}
if (current_gpio_cfg_res.gp2_pin_dir == MCP2221_GPIO_CFG_DIR_OUTPUT) {
- if (current_gpio_cfg_res.gp2_pin_value == 1)
- set_sram_req.gp2_settings |= MCP2221_SRAM_GPIO_OUTPUT_HIGH;
- else
- set_sram_req.gp2_settings &= ~MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ if (current_gpio_cfg_res.gp2_pin_value == 1) {
+ set_sram_req.gp2_settings |=
+ MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ } else {
+ set_sram_req.gp2_settings &=
+ ~MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ }
}
if (current_gpio_cfg_res.gp3_pin_dir == MCP2221_GPIO_CFG_DIR_OUTPUT) {
- if (current_gpio_cfg_res.gp3_pin_value == 1)
- set_sram_req.gp3_settings |= MCP2221_SRAM_GPIO_OUTPUT_HIGH;
- else
- set_sram_req.gp3_settings &= ~MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ if (current_gpio_cfg_res.gp3_pin_value == 1) {
+ set_sram_req.gp3_settings |=
+ MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ } else {
+ set_sram_req.gp3_settings &=
+ ~MCP2221_SRAM_GPIO_OUTPUT_HIGH;
+ }
}
err = umcpmio_put_sram(sc, &set_sram_req, &set_sram_res, false);
if (! err) {
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&set_sram_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_gpio_pin_ctlctl set sram buffer copy");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&set_sram_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_gpio_pin_ctlctl set sram buffer copy");
if (set_sram_res.cmd == MCP2221_CMD_SET_SRAM &&
set_sram_res.completion == MCP2221_CMD_COMPLETE_OK) {
sc->sc_gpio_pins[pin].pin_flags = flags;
} else {
- device_printf(sc->sc_dev, "umcpmio_gpio_pin_ctlctl: not the command desired, or error: %02x %02x\n",
+ device_printf(sc->sc_dev, "umcpmio_gpio_pin_ctlctl:"
+ " not the command desired, or error: %02x %02x\n",
set_sram_res.cmd,
set_sram_res.completion);
err = EIO;
@@ -437,15 +490,14 @@ umcpmio_gpio_pin_ctl(void *arg, int pin,
}
/*
- XXX -
-
- Since testing of gpio interrupts wasn't possible, this part probably is not
- complete. At the very least, there is a scheduled callout that needs to exist
- to read the interrupt status. The chip does not send anything on its own when
- the interrupt happens.
+ * XXX -
+ *
+ * Since testing of gpio interrupts wasn't possible, this part probably
+ * is not complete. At the very least, there is a scheduled callout
+ * that needs to exist to read the interrupt status. The chip does not
+ * send anything on its own when the interrupt happens.
*/
-
static void *
umcpmio_gpio_intr_establish(void *vsc, int pin, int ipl, int irqmode,
int (*func)(void *), void *arg)
@@ -458,12 +510,13 @@ umcpmio_gpio_intr_establish(void *vsc, i
int err = 0;
if (sc->sc_dying)
- return(NULL);
+ return NULL;
irq->sc_gpio_irqfunc = func;
irq->sc_gpio_irqarg = arg;
- DPRINTF(("umcpmio_intr_establish: pin=%d, irqmode=%04x\n",pin,irqmode));
+ DPRINTF(("umcpmio_intr_establish: pin=%d, irqmode=%04x\n",
+ pin, irqmode));
mutex_enter(&sc->sc_action_mutex);
@@ -478,24 +531,28 @@ umcpmio_gpio_intr_establish(void *vsc, i
umcpmio_set_gpio_irq_sram(&set_sram_req, irqmode);
err = umcpmio_put_sram(sc, &set_sram_req, &set_sram_res, false);
if (! err) {
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&set_sram_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_intr_establish set sram buffer copy");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&set_sram_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_intr_establish set sram buffer copy");
if (set_sram_res.cmd == MCP2221_CMD_SET_SRAM &&
set_sram_res.completion == MCP2221_CMD_COMPLETE_OK) {
sc->sc_gpio_pins[1].pin_flags = GPIO_PIN_ALT2;
} else {
- device_printf(sc->sc_dev, "umcpmio_intr_establish: not the command desired, or error: %02x %02x\n",
+ device_printf(sc->sc_dev, "umcpmio_intr_establish:"
+ " not the command desired, or error: %02x %02x\n",
set_sram_res.cmd,
set_sram_res.completion);
}
} else {
- device_printf(sc->sc_dev, "umcpmio_intr_establish: set sram error: err=%d\n",
+ device_printf(sc->sc_dev, "umcpmio_intr_establish:"
+ " set sram error: err=%d\n",
err);
}
out:
mutex_exit(&sc->sc_action_mutex);
- return(irq);
+ return irq;
}
static void
@@ -525,17 +582,21 @@ umcpmio_gpio_intr_disestablish(void *vsc
umcpmio_set_gpio_irq_sram(&set_sram_req, 0);
err = umcpmio_put_sram(sc, &set_sram_req, &set_sram_res, true);
if (! err) {
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&set_sram_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_intr_disestablish set sram buffer copy");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&set_sram_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_intr_disestablish set sram buffer copy");
if (set_sram_res.cmd == MCP2221_CMD_SET_SRAM &&
set_sram_res.completion == MCP2221_CMD_COMPLETE_OK) {
sc->sc_gpio_pins[1].pin_flags = GPIO_PIN_INPUT;
} else {
- device_printf(sc->sc_dev, "umcpmio_intr_disestablish: not the command desired, or error: %02x %02x\n",
+ device_printf(sc->sc_dev, "umcpmio_intr_disestablish:"
+ " not the command desired, or error: %02x %02x\n",
set_sram_res.cmd,
set_sram_res.completion);
}
} else {
- device_printf(sc->sc_dev, "umcpmio_intr_disestablish: set sram error: err=%d\n",
+ device_printf(sc->sc_dev, "umcpmio_intr_disestablish:"
+ " set sram error: err=%d\n",
err);
}
out:
@@ -547,18 +608,21 @@ umcpmio_gpio_intrstr(void *vsc, int pin,
{
if (pin < 0 || pin >= MCP2221_NPINS) {
- DPRINTF(("umcpmio_gpio_intrstr: pin %d less than zero or too big\n",pin));
- return (false);
+ DPRINTF(("umcpmio_gpio_intrstr:"
+ " pin %d less than zero or too big\n",
+ pin));
+ return false;
}
if (pin != 1) {
- DPRINTF(("umcpmio_gpio_intrstr: pin %d was not 1\n",pin));
- return (false);
+ DPRINTF(("umcpmio_gpio_intrstr: pin %d was not 1\n",
+ pin));
+ return false;
}
snprintf(buf, buflen, "GPIO %d", pin);
- return (true);
+ return true;
}
/* Clear status of the I2C engine */
@@ -576,37 +640,47 @@ umcpmio_i2c_clear(struct umcpmio_softc *
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)&status_req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)&status_res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)&status_req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)&status_res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
if (! err) {
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&status_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_i2c_clear buffer copy");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&status_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_i2c_clear buffer copy");
if (status_res.cmd == MCP2221_CMD_STATUS &&
status_res.completion == MCP2221_CMD_COMPLETE_OK) {
- umcpmio_dump_buffer(true, (uint8_t *)&status_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_i2c_clear res buffer");
+ umcpmio_dump_buffer(true,
+ (uint8_t *)&status_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_i2c_clear res buffer");
} else {
- device_printf(sc->sc_dev, "umcpmio_i2c_clear: cmd exec: not the command desired, or error: %02x %02x\n",
+ device_printf(sc->sc_dev, "umcpmio_i2c_clear:"
+ " cmd exec: not the command desired, or error:"
+ " %02x %02x\n",
status_res.cmd,
status_res.completion);
err = EIO;
}
} else {
- device_printf(sc->sc_dev, "umcpmio_i2c_clear: request error: err=%d\n", err);
+ device_printf(sc->sc_dev, "umcpmio_i2c_clear: request error:"
+ " err=%d\n", err);
err = EIO;
}
- return(err);
+ return err;
}
-/* There isn't much required to acquire or release the I2C bus, but the man
+/*
+ * There isn't much required to acquire or release the I2C bus, but the man
* pages says these are needed
*/
static int
umcpmio_acquire_bus(void *v, int flags)
{
- return(0);
+ return 0;
}
static void
@@ -615,14 +689,14 @@ umcpmio_release_bus(void *v, int flags)
return;
}
-/* The I2C write and I2C read functions mostly use an algorithm that Adafruit
+/*
+ * The I2C write and I2C read functions mostly use an algorithm that Adafruit
* came up with in their Python based driver. A lot of other people have used
* this same algorithm to good effect. If changes are made to the I2C read and
* write functions, it is HIGHLY advisable that a MCP2221 or MCP2221A be on
* hand to test them.
*/
-
/* This is what is considered a fatal return from the engine. */
static bool
@@ -638,12 +712,13 @@ umcpmio_i2c_fatal(uint8_t state)
state == MCP2221_ENGINE_WRITETIMEOUT ||
state == MCP2221_ENGINE_ADDRTIMEOUT)
r = true;
- return(r);
+ return r;
}
static int
umcpmio_i2c_write(struct umcpmio_softc *sc, i2c_op_t op, i2c_addr_t addr,
- const void *cmdbuf, size_t cmdlen, void *databuf, size_t datalen, int flags)
+ const void *cmdbuf, size_t cmdlen, void *databuf, size_t datalen,
+ int flags)
{
struct mcp2221_i2c_req i2c_req;
struct mcp2221_i2c_res i2c_res;
@@ -659,7 +734,9 @@ umcpmio_i2c_write(struct umcpmio_softc *
if (err)
goto out;
if (status_res.internal_i2c_state != 0) {
- DPRINTF(("umcpmio_i2c_write: internal state not zero, clearing. internal_i2c_state=%02x\n",status_res.internal_i2c_state));
+ DPRINTF(("umcpmio_i2c_write: internal state not zero,"
+ " clearing. internal_i2c_state=%02x\n",
+ status_res.internal_i2c_state));
err = umcpmio_i2c_clear(sc, true);
}
if (err)
@@ -688,26 +765,37 @@ umcpmio_i2c_write(struct umcpmio_softc *
if (databuf != NULL)
memcpy(&i2c_req.data[remaining], databuf, datalen);
- DPRINTF(("umcpmio_i2c_write: I2C WRITE: cmd: %02x\n",cmd));
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&i2c_req, MCP2221_REQ_BUFFER_SIZE, "umcpmio_i2c_write: write req buffer copy");
+ DPRINTF(("umcpmio_i2c_write: I2C WRITE: cmd: %02x\n", cmd));
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&i2c_req, MCP2221_REQ_BUFFER_SIZE,
+ "umcpmio_i2c_write: write req buffer copy");
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)&i2c_req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)&i2c_res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)&i2c_req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)&i2c_res, sc->sc_cv_wait);
mutex_exit(&sc->sc_action_mutex);
if (! err) {
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&i2c_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_i2c_write: write res buffer copy");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&i2c_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_i2c_write: write res buffer copy");
if (i2c_res.cmd == cmd &&
i2c_res.completion == MCP2221_CMD_COMPLETE_OK) {
- /* Adafruit does a read back of the status at this
- * point. We choose not to do that. That is done later
- * anyway, and it seemed to be redundent.
+ /*
+ * Adafruit does a read back of the status at
+ * this point. We choose not to do that. That
+ * is done later anyway, and it seemed to be
+ * redundent.
*/
} else {
if (i2c_res.cmd == cmd &&
i2c_res.completion == MCP2221_I2C_ENGINE_BUSY) {
- DPRINTF(("umcpmio_i2c_write: I2C engine busy\n"));
+ DPRINTF(("umcpmio_i2c_write:"
+ " I2C engine busy\n"));
- if (umcpmio_i2c_fatal(i2c_res.internal_i2c_state)) {
+ const uint8_t state =
+ i2c_res.internal_i2c_state;
+ if (umcpmio_i2c_fatal(state)) {
err = EIO;
} else {
wretry--;
@@ -719,14 +807,17 @@ umcpmio_i2c_write(struct umcpmio_softc *
}
}
} else {
- device_printf(sc->sc_dev, "umcpmio_i2c_write: not the command desired, or error: %02x %02x\n",
+ device_printf(sc->sc_dev, "umcpmio_i2c_write:"
+ " not the command desired, or error:"
+ " %02x %02x\n",
i2c_res.cmd,
i2c_res.completion);
err = EIO;
}
}
} else {
- device_printf(sc->sc_dev, "umcpmio_i2c_write request error: err=%d\n", err);
+ device_printf(sc->sc_dev, "umcpmio_i2c_write request error:"
+ " err=%d\n", err);
err = EIO;
}
@@ -734,36 +825,59 @@ umcpmio_i2c_write(struct umcpmio_softc *
while (wsretry > 0) {
wsretry--;
- DPRINTF(("umcpmio_i2c_write: checking status loop: wcretry=%d\n",wsretry));
+ DPRINTF(("umcpmio_i2c_write: checking status loop:"
+ " wcretry=%d\n", wsretry));
err = umcpmio_get_status(sc, &status_res, true);
if (! err) {
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&status_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_i2c_write post check status");
- /* Since there isn't any documentation on what
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&status_res,
+ MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_i2c_write post check status");
+ /*
+ * Since there isn't any documentation on what
* some of the internal state means, it isn't
* clear that this is any different than than
* MCP2221_ENGINE_ADDRNACK in the other state
* register.
*/
- if (status_res.internal_i2c_state20 & MCP2221_ENGINE_T1_MASK_NACK) {
- DPRINTF(("umcpmio_i2c_write post check: engine internal state T1 says NACK\n"));
+ const uint8_t state20 =
+ status_res.internal_i2c_state20;
+ if (state20 & MCP2221_ENGINE_T1_MASK_NACK) {
+ DPRINTF(("umcpmio_i2c_write"
+ " post check:"
+ " engine internal state T1"
+ " says NACK\n"));
err = EIO;
break;
}
if (status_res.internal_i2c_state == 0) {
- DPRINTF(("umcpmio_i2c_write post check: engine internal state is ZERO\n"));
+ DPRINTF(("umcpmio_i2c_write"
+ " post check:"
+ " engine internal state"
+ " is ZERO\n"));
err = 0;
break;
}
- if (status_res.internal_i2c_state == MCP2221_ENGINE_WRITINGNOSTOP &&
+ if (status_res.internal_i2c_state ==
+ MCP2221_ENGINE_WRITINGNOSTOP &&
cmd == MCP2221_I2C_WRITE_DATA_NS) {
- DPRINTF(("umcpmio_i2c_write post check: engine internal state is WRITINGNOSTOP\n"));
+ DPRINTF(("umcpmio_i2c_write"
+ " post check:"
+ " engine internal state"
+ " is WRITINGNOSTOP\n"));
err = 0;
break;
}
- if (umcpmio_i2c_fatal(status_res.internal_i2c_state)) {
- DPRINTF(("umcpmio_i2c_write post check: engine internal state is fatal: %02x\n", status_res.internal_i2c_state));
+ const uint8_t state =
+ status_res.internal_i2c_state;
+ if (umcpmio_i2c_fatal(state)) {
+ DPRINTF(("umcpmio_i2c_write"
+ " post check:"
+ " engine internal state"
+ " is fatal: %02x\n",
+ state));
err = EIO;
break;
}
@@ -776,17 +890,19 @@ umcpmio_i2c_write(struct umcpmio_softc *
}
out:
-
- return(err);
+ return err;
}
-/* This one deviates a bit from Adafruit in that is supports a straight read and
- * a write + read. That is, write a register to read from and then do the read.
+/*
+ * This one deviates a bit from Adafruit in that is supports a straight
+ * read and a write + read. That is, write a register to read from and
+ * then do the read.
*/
static int
umcpmio_i2c_read(struct umcpmio_softc *sc, i2c_op_t op, i2c_addr_t addr,
- const void *cmdbuf, size_t cmdlen, void *databuf, size_t datalen, int flags)
+ const void *cmdbuf, size_t cmdlen, void *databuf, size_t datalen, int
+ flags)
{
struct mcp2221_i2c_req i2c_req;
struct mcp2221_i2c_res i2c_res;
@@ -798,8 +914,10 @@ umcpmio_i2c_read(struct umcpmio_softc *s
int rretry = sc->sc_retry_busy_read;
if (cmdbuf != NULL) {
- DPRINTF(("umcpmio_i2c_read: has a cmdbuf, doing write first: addr=%02x\n",addr));
- err = umcpmio_i2c_write(sc, I2C_OP_WRITE, addr, cmdbuf, cmdlen, NULL, 0, flags);
+ DPRINTF(("umcpmio_i2c_read: has a cmdbuf, doing write first:"
+ " addr=%02x\n", addr));
+ err = umcpmio_i2c_write(sc, I2C_OP_WRITE, addr, cmdbuf, cmdlen,
+ NULL, 0, flags);
}
if (err)
goto out;
@@ -808,9 +926,12 @@ umcpmio_i2c_read(struct umcpmio_softc *s
if (err)
goto out;
- if (status_res.internal_i2c_state !=0 &&
+ if (status_res.internal_i2c_state != 0 &&
status_res.internal_i2c_state != MCP2221_ENGINE_WRITINGNOSTOP) {
- DPRINTF(("umcpmio_i2c_read: internal state not zero and not WRITINGNOSTOP, clearing. internal_i2c_state=%02x\n",status_res.internal_i2c_state));
+ DPRINTF(("umcpmio_i2c_read:"
+ " internal state not zero and not WRITINGNOSTOP,"
+ " clearing. internal_i2c_state=%02x\n",
+ status_res.internal_i2c_state));
err = umcpmio_i2c_clear(sc, true);
}
if (err)
@@ -824,68 +945,108 @@ umcpmio_i2c_read(struct umcpmio_softc *s
cmd = MCP2221_I2C_READ_DATA_RS;
}
- /* The chip apparently can't do a READ without a STOP operation. Report that, and try
- * treating it like a READ with a STOP. This won't work for a lot of devices.
+ /*
+ * The chip apparently can't do a READ without a STOP
+ * operation. Report that, and try treating it like a READ
+ * with a STOP. This won't work for a lot of devices.
*/
if (!I2C_OP_STOP_P(op) &&
- sc->sc_reportreadnostop)
- device_printf(sc->sc_dev,"umcpmio_i2c_read: ************ called with READ without STOP ***************\n");
+ sc->sc_reportreadnostop) {
+ device_printf(sc->sc_dev,
+ "umcpmio_i2c_read: ************ called with READ"
+ " without STOP ***************\n");
+ }
i2c_req.cmd = cmd;
i2c_req.lsblen = datalen;
i2c_req.msblen = 0;
i2c_req.slaveaddr = (addr << 1) | 0x01;
- DPRINTF(("umcpmio_i2c_read: I2C READ normal read: cmd=%02x, addr=%02x\n",cmd,addr));
+ DPRINTF(("umcpmio_i2c_read: I2C READ normal read:"
+ " cmd=%02x, addr=%02x\n", cmd, addr));
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&i2c_req, MCP2221_RES_BUFFER_SIZE, "umcpmio_i2c_read normal read req buffer copy");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&i2c_req, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_i2c_read normal read req buffer copy");
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)&i2c_req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)&i2c_res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)&i2c_req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)&i2c_res, sc->sc_cv_wait);
mutex_exit(&sc->sc_action_mutex);
if (! err) {
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&i2c_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_i2c_read read-request response buffer copy");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&i2c_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_i2c_read read-request response buffer copy");
while (rretry > 0) {
rretry--;
- DPRINTF(("umcpmio_i2c_read: fetch loop: rretry=%d\n",rretry));
+ DPRINTF(("umcpmio_i2c_read: fetch loop: rretry=%d\n",
+ rretry));
err = 0;
memset(&i2c_fetch_req, 0, MCP2221_REQ_BUFFER_SIZE);
i2c_fetch_req.cmd = MCP2221_CMD_I2C_FETCH_READ_DATA;
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)&i2c_fetch_req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)&i2c_fetch_res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)&i2c_fetch_req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)&i2c_fetch_res, sc->sc_cv_wait);
mutex_exit(&sc->sc_action_mutex);
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&i2c_fetch_req, MCP2221_RES_BUFFER_SIZE, "umcpmio_i2c_read fetch res buffer copy");
-
- if (i2c_fetch_res.cmd == MCP2221_CMD_I2C_FETCH_READ_DATA) {
- if (i2c_fetch_res.completion == MCP2221_FETCH_READ_PARTIALDATA ||
- i2c_fetch_res.fetchlen == MCP2221_FETCH_READERROR) {
- DPRINTF(("umcpmio_i2c_read: fetch loop: partial data or read error: completion=%02x,fetchlen=%02x\n",i2c_fetch_res.completion,i2c_fetch_res.fetchlen));
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&i2c_fetch_req, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_i2c_read fetch res buffer copy");
+
+ if (i2c_fetch_res.cmd ==
+ MCP2221_CMD_I2C_FETCH_READ_DATA) {
+ if (i2c_fetch_res.completion ==
+ MCP2221_FETCH_READ_PARTIALDATA ||
+ i2c_fetch_res.fetchlen ==
+ MCP2221_FETCH_READERROR) {
+ DPRINTF(("umcpmio_i2c_read:"
+ " fetch loop:"
+ " partial data or read error:"
+ " completion=%02x,"
+ " fetchlen=%02x\n",
+ i2c_fetch_res.completion,
+ i2c_fetch_res.fetchlen));
WAITMS(sc->sc_busy_delay);
err = EAGAIN;
continue;
}
- if (i2c_fetch_res.internal_i2c_state == MCP2221_ENGINE_ADDRNACK) {
- DPRINTF(("umcpmio_i2c_read: fetch loop: engine NACK\n"));
+ if (i2c_fetch_res.internal_i2c_state ==
+ MCP2221_ENGINE_ADDRNACK) {
+ DPRINTF(("umcpmio_i2c_read:"
+ " fetch loop: engine NACK\n"));
err = EIO;
break;
}
if (i2c_fetch_res.internal_i2c_state == 0 &&
i2c_fetch_res.fetchlen == 0) {
- DPRINTF(("umcpmio_i2c_read: fetch loop: internal state and fetch len are ZERO\n"));
+ DPRINTF(("umcpmio_i2c_read:"
+ " fetch loop:"
+ " internal state and"
+ " fetch len are ZERO\n"));
err = 0;
break;
}
- if (i2c_fetch_res.internal_i2c_state == MCP2221_ENGINE_READPARTIAL ||
- i2c_fetch_res.internal_i2c_state == MCP2221_ENGINE_READCOMPLETE) {
- DPRINTF(("umcpmio_i2c_read: fetch loop: read partial or read complete: internal_i2c_state=%02x\n", i2c_fetch_res.internal_i2c_state));
+ if (i2c_fetch_res.internal_i2c_state ==
+ MCP2221_ENGINE_READPARTIAL ||
+ i2c_fetch_res.internal_i2c_state ==
+ MCP2221_ENGINE_READCOMPLETE) {
+ int state =
+ i2c_fetch_res.internal_i2c_state;
+ DPRINTF(("umcpmio_i2c_read:"
+ " fetch loop: read partial or"
+ " read complete:"
+ " internal_i2c_state=%02x\n",
+ state));
err = 0;
break;
}
} else {
- device_printf(sc->sc_dev, "umcpmio_i2c_read: fetch2: not the command desired: %02x\n",
+ device_printf(sc->sc_dev, "umcpmio_i2c_read:"
+ " fetch2: not the command desired: %02x\n",
i2c_fetch_res.cmd);
err = EIO;
break;
@@ -896,22 +1057,29 @@ umcpmio_i2c_read(struct umcpmio_softc *s
if (! err) {
if (databuf != NULL &&
- i2c_fetch_res.fetchlen != MCP2221_FETCH_READERROR) {
- int size = uimin(i2c_fetch_res.fetchlen, datalen);
- DPRINTF(("umcpmio_i2c_read: copy data: size=%d,fetchlen=%d\n",size, i2c_fetch_res.fetchlen));
- if (size > 0)
- memcpy(databuf, &i2c_fetch_res.data[0], size);
+ i2c_fetch_res.fetchlen !=
+ MCP2221_FETCH_READERROR) {
+ int size = uimin(i2c_fetch_res.fetchlen,
+ datalen);
+ DPRINTF(("umcpmio_i2c_read: copy data:"
+ " size=%d, fetchlen=%d\n",
+ size, i2c_fetch_res.fetchlen));
+ if (size > 0) {
+ memcpy(databuf, &i2c_fetch_res.data[0],
+ size);
+ }
} else {
- DPRINTF(("umcpmio_i2c_read: copy data: databuf is NULL\n"));
+ DPRINTF(("umcpmio_i2c_read: copy data:"
+ " databuf is NULL\n"));
}
}
} else {
- device_printf(sc->sc_dev, "umcpmio_i2c_read request error: cmd=%02x,err=%d\n", cmd, err);
+ device_printf(sc->sc_dev, "umcpmio_i2c_read request error:"
+ " cmd=%02x, err=%d\n", cmd, err);
err = EIO;
}
out:
-
- return(err);
+ return err;
}
static int
@@ -923,14 +1091,15 @@ umcpmio_i2c_exec(void *v, i2c_op_t op, i
int err = 0;
if (addr > 0x7f)
- return (ENOTSUP);
+ return ENOTSUP;
if (cmdbuf != NULL)
totallen += cmdlen;
if (databuf != NULL)
totallen += datalen;
- /* There is a way to do a transfer that is larger than 60 bytes,
+ /*
+ * There is a way to do a transfer that is larger than 60 bytes,
* but it requires that your break the transfer up into pieces and
* send them in 60 byte chunks. We just won't support that right now.
* It would be somewhat unusual for there to be a transfer that big,
@@ -940,25 +1109,27 @@ umcpmio_i2c_exec(void *v, i2c_op_t op, i
*/
if (totallen > 60)
- return (ENOTSUP);
+ return ENOTSUP;
if (I2C_OP_WRITE_P(op)) {
- err = umcpmio_i2c_write(sc, op, addr, cmdbuf, cmdlen, databuf, datalen, flags);
+ err = umcpmio_i2c_write(sc, op, addr, cmdbuf, cmdlen,
+ databuf, datalen, flags);
DPRINTF(("umcpmio_exec: I2C WRITE: err=%d\n", err));
} else {
- err = umcpmio_i2c_read(sc, op, addr, cmdbuf, cmdlen, databuf, datalen, flags);
+ err = umcpmio_i2c_read(sc, op, addr, cmdbuf, cmdlen,
+ databuf, datalen, flags);
DPRINTF(("umcpmio_exec: I2C READ: err=%d\n", err));
}
- return(err);
+ return err;
}
/* Accessing the ADC and DAC part of the chip */
-#define UMCPMIO_DEV_UNIT(m) (m & 0x80 ? (m & 0x7f) / 3 : m)
-#define UMCPMIO_DEV_WHAT(m) (m & 0x80 ? ((m & 0x7f) % 3) + 1: CONTROL_DEV)
+#define UMCPMIO_DEV_UNIT(m) ((m) & 0x80 ? ((m) & 0x7f) / 3 : (m))
+#define UMCPMIO_DEV_WHAT(m) ((m) & 0x80 ? (((m) & 0x7f) % 3) + 1 : CONTROL_DEV)
static int
umcpmio_dev_open(dev_t dev, int flags, int fmt, struct lwp *l)
@@ -975,24 +1146,28 @@ umcpmio_dev_open(dev_t dev, int flags, i
dunit = UMCPMIO_DEV_WHAT(minor(dev));
if (sc->sc_dev_open[dunit]) {
- DPRINTF(("umcpmio_dev_open: dunit=%d BUSY\n",dunit));
+ DPRINTF(("umcpmio_dev_open: dunit=%d BUSY\n", dunit));
return EBUSY;
}
- /* The control device only allows for ioctl calls, so pretty much allow
- * any sort of access. For the ADC, you perform a strict O_RDONLY and
- * for the DAC a strict O_WRONLY. It is an error to try and do a O_RDWR
- * It makes little sense to try and support select or poll. The ADC and
- * DAC are always available for use.
+ /*
+ * The control device only allows for ioctl calls, so pretty
+ * much allow any sort of access. For the ADC, you perform a
+ * strict O_RDONLY and for the DAC a strict O_WRONLY. It is an
+ * error to try and do a O_RDWR It makes little sense to try
+ * and support select or poll. The ADC and DAC are always
+ * available for use.
*/
if (dunit != CONTROL_DEV &&
((flags & FREAD) && (flags & FWRITE))) {
- DPRINTF(("umcpmio_dev_open: Not CONTROL device and trying to do READ and WRITE\n"));
+ DPRINTF(("umcpmio_dev_open: Not CONTROL device and trying to"
+ " do READ and WRITE\n"));
return EINVAL;
}
- /* Ya, this unrolling will also have to be changed if the MCP-2210 is
+ /*
+ * Ya, this unrolling will also have to be changed if the MCP-2210 is
* supported. There are currently only 4 pins, so don't worry too much
* about it. The MCP-2210 has RAM, so there would be a fifth for it.
*/
@@ -1014,16 +1189,20 @@ umcpmio_dev_open(dev_t dev, int flags, i
break;
}
if (! error) {
- /* XXX - we can probably do better here... it doesn't
- * remember what the pin was set to and probably should.
+ /*
+ * XXX - we can probably do better here... it
+ * doesn't remember what the pin was set to and
+ * probably should.
*/
if (flags & FREAD) {
- error = umcpmio_gpio_pin_ctlctl(sc, pin, GPIO_PIN_ALT0, false);
+ error = umcpmio_gpio_pin_ctlctl(sc, pin,
+ GPIO_PIN_ALT0, false);
} else {
if (pin == 1) {
error = EINVAL;
} else {
- error = umcpmio_gpio_pin_ctlctl(sc, pin, GPIO_PIN_ALT1, false);
+ error = umcpmio_gpio_pin_ctlctl(sc,
+ pin, GPIO_PIN_ALT1, false);
}
}
}
@@ -1032,7 +1211,8 @@ umcpmio_dev_open(dev_t dev, int flags, i
sc->sc_dev_open[dunit] = true;
mutex_exit(&sc->sc_action_mutex);
- DPRINTF(("umcpmio_dev_open: Opened dunit=%d,pin=%d,error=%d\n",dunit,pin,error));
+ DPRINTF(("umcpmio_dev_open: Opened dunit=%d, pin=%d, error=%d\n",
+ dunit, pin, error));
return error;
}
@@ -1050,7 +1230,8 @@ umcpmio_dev_read(dev_t dev, struct uio *
uint8_t adc_msb;
uint16_t buf;
- if ((sc = device_lookup_private(&umcpmio_cd, UMCPMIO_DEV_UNIT(minor(dev)))) == NULL)
+ sc = device_lookup_private(&umcpmio_cd, UMCPMIO_DEV_UNIT(minor(dev)));
+ if (sc == NULL)
return ENXIO;
dunit = UMCPMIO_DEV_WHAT(minor(dev));
@@ -1092,7 +1273,6 @@ umcpmio_dev_read(dev_t dev, struct uio *
error = EINVAL;
}
-
return error;
}
@@ -1105,7 +1285,8 @@ umcpmio_dev_write(dev_t dev, struct uio
int dunit;
int error = 0;
- if ((sc = device_lookup_private(&umcpmio_cd, UMCPMIO_DEV_UNIT(minor(dev)))) == NULL)
+ sc = device_lookup_private(&umcpmio_cd, UMCPMIO_DEV_UNIT(minor(dev)));
+ if (sc == NULL)
return ENXIO;
dunit = UMCPMIO_DEV_WHAT(minor(dev));
@@ -1165,12 +1346,15 @@ umcpmio_dev_close(dev_t dev, int flags,
break;
}
if (! error) {
- /* XXX - Ya, this really could be done better. Probably should
- * read the sram config and maybe the gpio config and save out
- * what the pin was set to.
+ /*
+ * XXX - Ya, this really could be done better.
+ * Probably should read the sram config and
+ * maybe the gpio config and save out what the
+ * pin was set to.
*/
- error = umcpmio_gpio_pin_ctlctl(sc, pin, GPIO_PIN_INPUT, false);
+ error = umcpmio_gpio_pin_ctlctl(sc, pin,
+ GPIO_PIN_INPUT, false);
}
}
sc->sc_dev_open[dunit] = false;
@@ -1204,77 +1388,122 @@ umcpmio_dev_ioctl(dev_t dev, u_long cmd,
dunit = UMCPMIO_DEV_WHAT(minor(dev));
if (dunit != CONTROL_DEV) {
- /* It actually is fine to call ioctl with a unsupported cmd,
- * but be a little noisy if debug is enabled.
+ /*
+ * It actually is fine to call ioctl with a unsupported
+ * cmd, but be a little noisy if debug is enabled.
*/
- DPRINTF(("umcpmio_dev_ioctl: dunit is not the CONTROL device: dunit=%d,cmd=%ld\n",dunit,cmd));
+ DPRINTF(("umcpmio_dev_ioctl: dunit is not the CONTROL device:"
+ " dunit=%d, cmd=%ld\n", dunit, cmd));
return EINVAL;
}
mutex_enter(&sc->sc_action_mutex);
switch (cmd) {
- /* The GET calls use a shadow buffer for each type of call. That
- * probably isn't actually needed and the memcpy could be avoided.
- * but... it is only ever 64 bytes, so maybe not a big deal.
+ /*
+ * The GET calls use a shadow buffer for each type of
+ * call. That probably isn't actually needed and the
+ * memcpy could be avoided. but... it is only ever 64
+ * bytes, so maybe not a big deal.
*/
case UMCPMIO_GET_STATUS:
ioctl_get_status = (struct mcp2221_status_res *)data;
error = umcpmio_get_status(sc, &get_status_res, false);
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&get_status_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_dev_ioctl: UMCPMIO_GET_STATUS: get_status_res");
- DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_GET_STATUS: umcpmio_get_status error=%d\n",error));
- if (! error)
- memcpy(ioctl_get_status, &get_status_res, MCP2221_RES_BUFFER_SIZE);
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&get_status_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_dev_ioctl: UMCPMIO_GET_STATUS: get_status_res");
+ DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_GET_STATUS:"
+ " umcpmio_get_status error=%d\n", error));
+ if (! error) {
+ memcpy(ioctl_get_status, &get_status_res,
+ MCP2221_RES_BUFFER_SIZE);
+ }
break;
case UMCPMIO_GET_SRAM:
ioctl_get_sram = (struct mcp2221_get_sram_res *)data;
error = umcpmio_get_sram(sc, &get_sram_res, false);
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&get_sram_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_dev_ioctl: UMCPMIO_GET_SRAM: get_sram_res");
- DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_GET_SRAM: umcpmio_get_sram error=%d\n",error));
- if (! error)
- memcpy(ioctl_get_sram, &get_sram_res, MCP2221_RES_BUFFER_SIZE);
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&get_sram_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_dev_ioctl: UMCPMIO_GET_SRAM: get_sram_res");
+ DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_GET_SRAM:"
+ " umcpmio_get_sram error=%d\n", error));
+ if (! error) {
+ memcpy(ioctl_get_sram, &get_sram_res,
+ MCP2221_RES_BUFFER_SIZE);
+ }
break;
case UMCPMIO_GET_GP_CFG:
ioctl_get_gpio_cfg = (struct mcp2221_get_gpio_cfg_res *)data;
error = umcpmio_get_gpio_cfg(sc, &get_gpio_cfg_res, false);
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&get_gpio_cfg_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_dev_ioctl: UMCPMIO_GET_GP_CFG: get_gpio_cfg_res");
- DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_GET_GP_CFG: umcpmio_get_gpio_cfg error=%d\n",error));
- if (! error)
- memcpy(ioctl_get_gpio_cfg, &get_gpio_cfg_res, MCP2221_RES_BUFFER_SIZE);
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&get_gpio_cfg_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_dev_ioctl: UMCPMIO_GET_GP_CFG: get_gpio_cfg_res");
+ DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_GET_GP_CFG:"
+ " umcpmio_get_gpio_cfg error=%d\n", error));
+ if (! error) {
+ memcpy(ioctl_get_gpio_cfg, &get_gpio_cfg_res,
+ MCP2221_RES_BUFFER_SIZE);
+ }
break;
case UMCPMIO_GET_FLASH:
ioctl_get_flash = (struct umcpmio_ioctl_get_flash *)data;
- error = umcpmio_get_flash(sc, ioctl_get_flash->subcode, &get_flash_res, false);
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&get_flash_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_dev_ioctl: UMCPMIO_GET_FLASH: get_flash_res");
- DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_GET_FLASH: umcpmio_get_flash subcode=%d,error=%d\n",ioctl_get_flash->subcode,error));
- if (! error)
- memcpy(&ioctl_get_flash->get_flash_res, &get_flash_res, MCP2221_RES_BUFFER_SIZE);
+ error = umcpmio_get_flash(sc, ioctl_get_flash->subcode,
+ &get_flash_res, false);
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&get_flash_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_dev_ioctl: UMCPMIO_GET_FLASH: get_flash_res");
+ DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_GET_FLASH:"
+ " umcpmio_get_flash subcode=%d, error=%d\n",
+ ioctl_get_flash->subcode, error));
+ if (!error) {
+ memcpy(&ioctl_get_flash->get_flash_res, &get_flash_res,
+ MCP2221_RES_BUFFER_SIZE);
+ }
break;
case UMCPMIO_PUT_FLASH:
- /* We only allow the flash parts related to gpio to be changed.
+ /*
+ * We only allow the flash parts related to gpio to be changed.
* Bounce any attempt to do something else. Also use a shadow
* buffer for the put, so we get to control just literally
* everything about the write to flash.
*/
ioctl_put_flash = (struct umcpmio_ioctl_put_flash *)data;
- DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_PUT_FLASH: umcpmio_put_flash subcode=%d\n",ioctl_put_flash->subcode));
+ DPRINTF(("umcpmio_dev_ioctl: UMCPMIO_PUT_FLASH:"
+ " umcpmio_put_flash subcode=%d\n",
+ ioctl_put_flash->subcode));
if (ioctl_put_flash->subcode == MCP2221_FLASH_SUBCODE_GP) {
memset(&put_flash_req, 0, MCP2221_REQ_BUFFER_SIZE);
put_flash_req.subcode = ioctl_put_flash->subcode;
- put_flash_req.u.gp.gp0_settings = ioctl_put_flash->put_flash_req.u.gp.gp0_settings;
- put_flash_req.u.gp.gp1_settings = ioctl_put_flash->put_flash_req.u.gp.gp1_settings;
- put_flash_req.u.gp.gp2_settings = ioctl_put_flash->put_flash_req.u.gp.gp2_settings;
- put_flash_req.u.gp.gp3_settings = ioctl_put_flash->put_flash_req.u.gp.gp3_settings;
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&ioctl_put_flash->put_flash_req, MCP2221_REQ_BUFFER_SIZE, "umcpmio_dev_ioctl: UMCPMIO_PUT_FLASH: ioctl put_flash_req");
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&put_flash_req, MCP2221_REQ_BUFFER_SIZE, "umcpmio_dev_ioctl: UMCPMIO_PUT_FLASH: put_flash_req");
+ put_flash_req.u.gp.gp0_settings =
+ ioctl_put_flash->put_flash_req.u.gp.gp0_settings;
+ put_flash_req.u.gp.gp1_settings =
+ ioctl_put_flash->put_flash_req.u.gp.gp1_settings;
+ put_flash_req.u.gp.gp2_settings =
+ ioctl_put_flash->put_flash_req.u.gp.gp2_settings;
+ put_flash_req.u.gp.gp3_settings =
+ ioctl_put_flash->put_flash_req.u.gp.gp3_settings;
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&ioctl_put_flash->put_flash_req,
+ MCP2221_REQ_BUFFER_SIZE,
+ "umcpmio_dev_ioctl: UMCPMIO_PUT_FLASH:"
+ " ioctl put_flash_req");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&put_flash_req, MCP2221_REQ_BUFFER_SIZE,
+ "umcpmio_dev_ioctl:"
+ " UMCPMIO_PUT_FLASH: put_flash_req");
memset(&put_flash_res, 0, MCP2221_RES_BUFFER_SIZE);
- error = umcpmio_put_flash(sc, &put_flash_req, &put_flash_res, false);
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&put_flash_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_dev_ioctl: UMCPMIO_PUT_FLASH: put_flash_res");
- memcpy(&ioctl_put_flash->put_flash_res, &put_flash_res, MCP2221_RES_BUFFER_SIZE);
+ error = umcpmio_put_flash(sc, &put_flash_req,
+ &put_flash_res, false);
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&put_flash_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_dev_ioctl: UMCPMIO_PUT_FLASH:"
+ " put_flash_res");
+ memcpy(&ioctl_put_flash->put_flash_res, &put_flash_res,
+ MCP2221_RES_BUFFER_SIZE);
} else {
error = EINVAL;
}
@@ -1311,12 +1540,15 @@ umcpmio_verify_sysctl(SYSCTLFN_ARGS)
return 0;
}
-/* sysctl validation for stuff that interacts with the chip needs to happen in a
- * transaction. The read of the current state and the update to new state can't
- * allow for someone to sneak in between the two.
+/*
+ * sysctl validation for stuff that interacts with the chip needs to
+ * happen in a transaction. The read of the current state and the
+ * update to new state can't allow for someone to sneak in between the
+ * two.
*
- * We use text for the values of a lot of these variables so you don't need the
- * datasheet in front of you. You get to do that with umcpmioctl(8).
+ * We use text for the values of a lot of these variables so you don't
+ * need the datasheet in front of you. You get to do that with
+ * umcpmioctl(8).
*/
static struct umcpmio_sysctl_name umcpmio_vref_names[] = {
@@ -1358,10 +1590,13 @@ umcpmio_verify_dac_sysctl(SYSCTLFN_ARGS)
if (error)
goto out;
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&sram_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_verify_dac_sysctl SRAM res buffer");
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&sram_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_verify_dac_sysctl SRAM res buffer");
if (sram_res.dac_reference_voltage & MCP2221_SRAM_DAC_IS_VRM) {
- vrm = sram_res.dac_reference_voltage & MCP2221_SRAM_DAC_VRM_MASK;
+ vrm = sram_res.dac_reference_voltage &
+ MCP2221_SRAM_DAC_VRM_MASK;
switch (vrm) {
case MCP2221_SRAM_DAC_VRM_4096V:
strncpy(buf, "4.096V", UMCPMIO_VREF_NAME);
@@ -1398,7 +1633,8 @@ umcpmio_verify_dac_sysctl(SYSCTLFN_ARGS)
if (! error) {
if (strncmp(cbuf, buf, UMCPMIO_VREF_NAME) != 0) {
- DPRINTF(("umcpmio_verify_dac_sysctl: setting DAC vref: %s\n",buf));
+ DPRINTF(("umcpmio_verify_dac_sysctl: setting DAC vref:"
+ " %s\n", buf));
error = umcpmio_set_dac_vref_one(sc, buf, false);
}
}
@@ -1430,7 +1666,8 @@ umcpmio_verify_adc_sysctl(SYSCTLFN_ARGS)
goto out;
if (sram_res.irq_adc_reference_voltage & MCP2221_SRAM_ADC_IS_VRM) {
- vrm = sram_res.irq_adc_reference_voltage & MCP2221_SRAM_ADC_VRM_MASK;
+ vrm = sram_res.irq_adc_reference_voltage &
+ MCP2221_SRAM_ADC_VRM_MASK;
switch (vrm) {
case MCP2221_SRAM_ADC_VRM_4096V:
strncpy(buf, "4.096V", UMCPMIO_VREF_NAME);
@@ -1467,7 +1704,8 @@ umcpmio_verify_adc_sysctl(SYSCTLFN_ARGS)
if (! error) {
if (strncmp(cbuf, buf, UMCPMIO_VREF_NAME) != 0) {
- DPRINTF(("umcpmio_verify_adc_sysctl: setting ADC vref: %s\n",buf));
+ DPRINTF(("umcpmio_verify_adc_sysctl: setting ADC vref:"
+ " %s\n", buf));
error = umcpmio_set_adc_vref_one(sc, buf, false);
}
}
@@ -1514,7 +1752,8 @@ umcpmio_verify_gpioclock_dc_sysctl(SYSCT
goto out;
duty_cycle = sram_res.clock_divider & MCP2221_SRAM_GPIO_CLOCK_DC_MASK;
- DPRINTF(("umcpmio_verify_gpioclock_dc_sysctl: current duty cycle: %02x\n",duty_cycle));
+ DPRINTF(("umcpmio_verify_gpioclock_dc_sysctl: current duty cycle:"
+ " %02x\n", duty_cycle));
switch (duty_cycle) {
case MCP2221_SRAM_GPIO_CLOCK_DC_75:
strncpy(buf, "75%", UMCPMIO_DC_NAME);
@@ -1548,7 +1787,8 @@ umcpmio_verify_gpioclock_dc_sysctl(SYSCT
if (! error) {
if (strncmp(cbuf, buf, UMCPMIO_VREF_NAME) != 0) {
- DPRINTF(("umcpmio_verify_gpioclock_dc_sysctl: setting GPIO clock duty cycle: %s\n",buf));
+ DPRINTF(("umcpmio_verify_gpioclock_dc_sysctl:"
+ " setting GPIO clock duty cycle: %s\n", buf));
error = umcpmio_set_gpioclock_dc_one(sc, buf, false);
}
}
@@ -1558,7 +1798,6 @@ umcpmio_verify_gpioclock_dc_sysctl(SYSCT
return error;
}
-
static struct umcpmio_sysctl_name umcpmio_cd_names[] = {
{
.text = "375kHz",
@@ -1604,10 +1843,11 @@ umcpmio_verify_gpioclock_cd_sysctl(SYSCT
if (error)
goto out;
- clock_divider = sram_res.clock_divider & MCP2221_SRAM_GPIO_CLOCK_CD_MASK;
- DPRINTF(("umcpmio_verify_gpioclock_cd_sysctl: current clock divider: %02x\n",clock_divider));
+ clock_divider = sram_res.clock_divider &
+ MCP2221_SRAM_GPIO_CLOCK_CD_MASK;
+ DPRINTF(("umcpmio_verify_gpioclock_cd_sysctl: current clock divider:"
+ " %02x\n", clock_divider));
switch (clock_divider) {
-
case MCP2221_SRAM_GPIO_CLOCK_CD_375KHZ:
strncpy(buf, "375kHz", UMCPMIO_CD_NAME);
break;
@@ -1651,7 +1891,9 @@ umcpmio_verify_gpioclock_cd_sysctl(SYSCT
if (! error) {
if (strncmp(cbuf, buf, UMCPMIO_CD_NAME) != 0) {
- DPRINTF(("umcpmio_verify_gpioclock_cd_sysctl: setting GPIO clock clock divider: %s\n",buf));
+ DPRINTF(("umcpmio_verify_gpioclock_cd_sysctl:"
+ " setting GPIO clock clock divider: %s\n",
+ buf));
error = umcpmio_set_gpioclock_cd_one(sc, buf, false);
}
}
@@ -1670,8 +1912,9 @@ umcpmio_sysctl_init(struct umcpmio_softc
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
0, CTLTYPE_NODE, device_xname(sc->sc_dev),
- SYSCTL_DESCR("mcpmio controls"), NULL, 0, NULL, 0, CTL_HW,
- CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("mcpmio controls"),
+ NULL, 0, NULL, 0,
+ CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
return error;
sysctlroot_num = cnode->sysctl_num;
@@ -1679,68 +1922,75 @@ umcpmio_sysctl_init(struct umcpmio_softc
#ifdef UMCPMIO_DEBUG
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_INT, "debug",
- SYSCTL_DESCR("Debug level"), umcpmio_verify_sysctl, 0,
- &umcpmiodebug, 0, CTL_HW, sysctlroot_num, CTL_CREATE,
- CTL_EOL)) != 0)
+ SYSCTL_DESCR("Debug level"),
+ umcpmio_verify_sysctl, 0, &umcpmiodebug, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_BOOL, "dump_buffers",
- SYSCTL_DESCR("Dump buffer when debugging"), NULL, 0, &sc->sc_dumpbuffer,
- 0, CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("Dump buffer when debugging"),
+ NULL, 0, &sc->sc_dumpbuffer, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
#endif
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_INT, "response_wait",
- SYSCTL_DESCR("How long to wait in ms for a response for a HID report"),
- umcpmio_verify_sysctl, 0, &sc->sc_cv_wait, 0, CTL_HW,
- sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("How long to wait in ms for a response"
+ " for a HID report"),
+ umcpmio_verify_sysctl, 0, &sc->sc_cv_wait, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_INT, "response_errcnt",
SYSCTL_DESCR("How many errors to allow on a response"),
- umcpmio_verify_sysctl, 0, &sc->sc_response_errcnt, 0, CTL_HW,
- sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_sysctl, 0, &sc->sc_response_errcnt, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
0, CTLTYPE_NODE, "i2c",
- SYSCTL_DESCR("I2C controls"), NULL, 0, NULL, 0, CTL_HW,
- sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("I2C controls"),
+ NULL, 0, NULL, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
i2c_num = cnode->sysctl_num;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
0, CTLTYPE_NODE, "adcdac",
- SYSCTL_DESCR("ADC and DAC controls"), NULL, 0, NULL, 0, CTL_HW,
- sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("ADC and DAC controls"),
+ NULL, 0, NULL, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
adc_dac_num = cnode->sysctl_num;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
0, CTLTYPE_NODE, "adc",
- SYSCTL_DESCR("ADC controls"), NULL, 0, NULL, 0, CTL_HW,
- sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("ADC controls"),
+ NULL, 0, NULL, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
adc_num = cnode->sysctl_num;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
0, CTLTYPE_NODE, "dac",
- SYSCTL_DESCR("DAC controls"), NULL, 0, NULL, 0, CTL_HW,
- sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("DAC controls"),
+ NULL, 0, NULL, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
dac_num = cnode->sysctl_num;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
0, CTLTYPE_NODE, "gpio",
- SYSCTL_DESCR("GPIO controls"), NULL, 0, NULL, 0, CTL_HW,
- sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("GPIO controls"),
+ NULL, 0, NULL, 0,
+ CTL_HW, sysctlroot_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
gpio_num = cnode->sysctl_num;
@@ -1748,90 +1998,94 @@ umcpmio_sysctl_init(struct umcpmio_softc
/* I2C */
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_BOOL, "reportreadnostop",
- SYSCTL_DESCR("Report that a READ without STOP was attempted by a device"),
- NULL, 0, &sc->sc_reportreadnostop, 0, CTL_HW, sysctlroot_num, i2c_num,
- CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("Report that a READ without STOP was attempted"
+ " by a device"),
+ NULL, 0, &sc->sc_reportreadnostop, 0,
+ CTL_HW, sysctlroot_num, i2c_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_INT, "busy_delay",
SYSCTL_DESCR("How long to wait in ms when the I2C engine is busy"),
- umcpmio_verify_sysctl, 0, &sc->sc_busy_delay, 0, CTL_HW,
- sysctlroot_num, i2c_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_sysctl, 0, &sc->sc_busy_delay, 0,
+ CTL_HW, sysctlroot_num, i2c_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_INT, "retry_busy_read",
SYSCTL_DESCR("How many times to retry a busy I2C read"),
- umcpmio_verify_sysctl, 0, &sc->sc_retry_busy_read, 0, CTL_HW,
- sysctlroot_num, i2c_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_sysctl, 0, &sc->sc_retry_busy_read, 0,
+ CTL_HW, sysctlroot_num, i2c_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_INT, "retry_busy_write",
SYSCTL_DESCR("How many times to retry a busy I2C write"),
- umcpmio_verify_sysctl, 0, &sc->sc_retry_busy_write, 0, CTL_HW,
- sysctlroot_num, i2c_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_sysctl, 0, &sc->sc_retry_busy_write, 0,
+ CTL_HW, sysctlroot_num, i2c_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
/* GPIO */
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_INT, "irq_poll",
SYSCTL_DESCR("How often to poll for a IRQ change"),
- umcpmio_verify_sysctl, 0, &sc->sc_irq_poll, 0, CTL_HW,
- sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_sysctl, 0, &sc->sc_irq_poll, 0,
+ CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READONLY, CTLTYPE_STRING, "clock_duty_cycles",
- SYSCTL_DESCR("Valid duty cycles for GPIO clock on GP1 ALT3 duty cycle"),
- 0, 0, __UNCONST(umcpmio_valid_dcs),
- sizeof(umcpmio_valid_dcs) + 1, CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("Valid duty cycles for GPIO clock on"
+ " GP1 ALT3 duty cycle"),
+ 0, 0, __UNCONST(umcpmio_valid_dcs), sizeof(umcpmio_valid_dcs) + 1,
+ CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_STRING, "clock_duty_cycle",
SYSCTL_DESCR("GPIO clock on GP1 ALT3 duty cycle"),
- umcpmio_verify_gpioclock_dc_sysctl, 0, (void *) sc,
- UMCPMIO_DC_NAME, CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_gpioclock_dc_sysctl, 0, (void *)sc, UMCPMIO_DC_NAME,
+ CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READONLY, CTLTYPE_STRING, "clock_dividers",
- SYSCTL_DESCR("Valid clock dividers for GPIO clock on GP1 with ALT3"),
- 0, 0, __UNCONST(umcpmio_valid_cds),
- sizeof(umcpmio_valid_cds) + 1, CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
+ SYSCTL_DESCR("Valid clock dividers for GPIO clock on GP1"
+ " with ALT3"),
+ 0, 0, __UNCONST(umcpmio_valid_cds), sizeof(umcpmio_valid_cds) + 1,
+ CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_STRING, "clock_divider",
SYSCTL_DESCR("GPIO clock on GP1 ALT3 clock divider"),
- umcpmio_verify_gpioclock_cd_sysctl, 0, (void *) sc,
- UMCPMIO_CD_NAME, CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_gpioclock_cd_sysctl, 0, (void *)sc, UMCPMIO_CD_NAME,
+ CTL_HW, sysctlroot_num, gpio_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
/* ADC and DAC */
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READONLY, CTLTYPE_STRING, "vrefs",
SYSCTL_DESCR("Valid vref values for ADC and DAC"),
- 0, 0, __UNCONST(umcpmio_valid_vrefs),
- sizeof(umcpmio_valid_vrefs) + 1, CTL_HW, sysctlroot_num, adc_dac_num, CTL_CREATE, CTL_EOL)) != 0)
+ 0, 0,
+ __UNCONST(umcpmio_valid_vrefs), sizeof(umcpmio_valid_vrefs) + 1,
+ CTL_HW, sysctlroot_num, adc_dac_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
/* ADC */
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_STRING, "vref",
SYSCTL_DESCR("ADC voltage reference"),
- umcpmio_verify_adc_sysctl, 0, (void *) sc,
- UMCPMIO_VREF_NAME, CTL_HW, sysctlroot_num, adc_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_adc_sysctl, 0, (void *)sc, UMCPMIO_VREF_NAME,
+ CTL_HW, sysctlroot_num, adc_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
/* DAC */
if ((error = sysctl_createv(&sc->sc_umcpmiolog, 0, NULL, &cnode,
CTLFLAG_READWRITE, CTLTYPE_STRING, "vref",
SYSCTL_DESCR("DAC voltage reference"),
- umcpmio_verify_dac_sysctl, 0, (void *) sc,
- UMCPMIO_VREF_NAME, CTL_HW, sysctlroot_num, dac_num, CTL_CREATE, CTL_EOL)) != 0)
+ umcpmio_verify_dac_sysctl, 0, (void *)sc, UMCPMIO_VREF_NAME,
+ CTL_HW, sysctlroot_num, dac_num, CTL_CREATE, CTL_EOL)) != 0)
return error;
return 0;
@@ -1846,11 +2100,11 @@ umcpmio_match(device_t parent, cfdata_t
!= NULL ? UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
}
-
-/* This driver could be extended to support the MCP-2210 which is MCP's USB to
- * SPI / gpio chip. It also appears to be a something like the PIC16F1455 used in
- * the MCP2221 / MCP2221A. It is likely that a lot of this could use tables to
- * drive behavior.
+/*
+ * This driver could be extended to support the MCP-2210 which is MCP's
+ * USB to SPI / gpio chip. It also appears to be a something like the
+ * PIC16F1455 used in the MCP2221 / MCP2221A. It is likely that a lot
+ * of this could use tables to drive behavior.
*/
static void
@@ -1877,7 +2131,10 @@ umcpmio_attach(device_t parent, device_t
sc->sc_retry_busy_read = 50;
sc->sc_retry_busy_write = 50;
sc->sc_irq_poll = 10;
- sc->sc_dev_open[CONTROL_DEV] = sc->sc_dev_open[GP1_DEV] = sc->sc_dev_open[GP2_DEV] = sc->sc_dev_open[GP3_DEV] = false;
+ sc->sc_dev_open[CONTROL_DEV] = false;
+ sc->sc_dev_open[GP1_DEV] = false;
+ sc->sc_dev_open[GP2_DEV] = false;
+ sc->sc_dev_open[GP3_DEV] = false;
aprint_normal("\n");
@@ -1894,37 +2151,45 @@ umcpmio_attach(device_t parent, device_t
err = uhidev_open(sc->sc_hdev, &umcpmio_uhidev_intr, sc);
- /* It is not clear that this should be needed, but it was noted
+ /*
+ * It is not clear that this should be needed, but it was noted
* that the device would sometimes not be ready if this delay
- * was not present. In fact, the attempts to set stuff a little
- * later would sometimes fail.
+ * was not present. In fact, the attempts to set stuff a
+ * little later would sometimes fail.
*/
delay(1000);
- if (err)
- aprint_error_dev(sc->sc_dev, "umcpmio_attach: open uhidev_open: err=%d\n",err);
+ if (err) {
+ aprint_error_dev(sc->sc_dev, "umcpmio_attach: "
+ " open uhidev_open: err=%d\n", err);
+ }
if (!err)
err = umcpmio_get_status(sc, &status_res, true);
if (!err) {
- aprint_normal_dev(sc->sc_dev, "Hardware revision: %d.%d, Firmware revision: %d.%d\n",
+ aprint_normal_dev(sc->sc_dev,
+ "Hardware revision: %d.%d, Firmware revision: %d.%d\n",
status_res.mcp2221_hardware_rev_major,
status_res.mcp2221_hardware_rev_minor,
status_res.mcp2221_firmware_rev_major,
status_res.mcp2221_firmware_rev_minor);
- /* The datasheet suggests that it is possble for this to fail if the I2C port
- * is currently being used. However... since you just plugged in the chip,
- * the I2C port should not really be in use at that moment. In any case, try
- * hard to set this and don't make it fatal if it did not get set.
+ /*
+ * The datasheet suggests that it is possble for this
+ * to fail if the I2C port is currently being used.
+ * However... since you just plugged in the chip, the
+ * I2C port should not really be in use at that moment.
+ * In any case, try hard to set this and don't make it
+ * fatal if it did not get set.
*/
- int i2cspeed=0;
+ int i2cspeed = 0;
while (! err && i2cspeed < 3) {
err = umcpmio_set_i2c_speed_one(sc, I2C_SPEED_SM, true);
if (err) {
- aprint_error_dev(sc->sc_dev, "umcpmio_attach: set I2C speed: err=%d\n",
+ aprint_error_dev(sc->sc_dev, "umcpmio_attach:"
+ " set I2C speed: err=%d\n",
err);
delay(300);
}
@@ -1935,35 +2200,68 @@ umcpmio_attach(device_t parent, device_t
err = umcpmio_get_sram(sc, &get_sram_res, true);
if (! err) {
- umcpmio_dump_buffer(sc->sc_dumpbuffer, (uint8_t *)&get_sram_res, MCP2221_RES_BUFFER_SIZE, "umcpmio_attach get sram buffer copy");
-
- /* There are only 4 pins right now, just unroll any loops */
+ umcpmio_dump_buffer(sc->sc_dumpbuffer,
+ (uint8_t *)&get_sram_res, MCP2221_RES_BUFFER_SIZE,
+ "umcpmio_attach get sram buffer copy");
+
+ /*
+ * There are only 4 pins right now, just unroll
+ * any loops
+ */
sc->sc_gpio_pins[0].pin_num = 0;
- sc->sc_gpio_pins[0].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_ALT0 | GPIO_PIN_ALT3;
- sc->sc_gpio_pins[0].pin_flags = umcpmio_sram_gpio_to_flags(get_sram_res.gp0_settings);
+ sc->sc_gpio_pins[0].pin_caps = GPIO_PIN_INPUT;
+ sc->sc_gpio_pins[0].pin_caps |= GPIO_PIN_OUTPUT;
+ sc->sc_gpio_pins[0].pin_caps |= GPIO_PIN_ALT0;
+ sc->sc_gpio_pins[0].pin_caps |= GPIO_PIN_ALT3;
+ sc->sc_gpio_pins[0].pin_flags =
+ umcpmio_sram_gpio_to_flags(
+ get_sram_res.gp0_settings);
sc->sc_gpio_pins[0].pin_intrcaps = 0;
snprintf(sc->sc_gpio_pins[0].pin_defname, 4, "GP0");
sc->sc_gpio_pins[1].pin_num = 1;
- sc->sc_gpio_pins[1].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_ALT0 | GPIO_PIN_ALT1 | GPIO_PIN_ALT2 | GPIO_PIN_ALT3;
- sc->sc_gpio_pins[1].pin_flags = umcpmio_sram_gpio_to_flags(get_sram_res.gp1_settings);
+ sc->sc_gpio_pins[1].pin_caps = GPIO_PIN_INPUT;
+ sc->sc_gpio_pins[1].pin_caps |= GPIO_PIN_OUTPUT;
+ sc->sc_gpio_pins[1].pin_caps |= GPIO_PIN_ALT0;
+ sc->sc_gpio_pins[1].pin_caps |= GPIO_PIN_ALT1;
+ sc->sc_gpio_pins[1].pin_caps |= GPIO_PIN_ALT2;
+ sc->sc_gpio_pins[1].pin_caps |= GPIO_PIN_ALT3;
+ sc->sc_gpio_pins[1].pin_flags =
+ umcpmio_sram_gpio_to_flags(
+ get_sram_res.gp1_settings);
/* XXX - lets not advertise this right now... */
#if 0
- sc->sc_gpio_pins[1].pin_intrcaps = GPIO_INTR_POS_EDGE | GPIO_INTR_NEG_EDGE | GPIO_INTR_DOUBLE_EDGE | GPIO_INTR_MPSAFE;
+ sc->sc_gpio_pins[1].pin_intrcaps = GPIO_INTR_POS_EDGE;
+ sc->sc_gpio_pins[1].pin_intrcaps |= GPIO_INTR_NEG_EDGE;
+ sc->sc_gpio_pins[1].pin_intrcaps |=
+ GPIO_INTR_DOUBLE_EDGE;
+ sc->sc_gpio_pins[1].pin_intrcaps |= GPIO_INTR_MPSAFE;
#endif
sc->sc_gpio_pins[1].pin_intrcaps = 0;
snprintf(sc->sc_gpio_pins[1].pin_defname, 4, "GP1");
sc->sc_gpio_pins[2].pin_num = 2;
- sc->sc_gpio_pins[2].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_ALT0 | GPIO_PIN_ALT1 | GPIO_PIN_ALT3;
- sc->sc_gpio_pins[2].pin_flags = umcpmio_sram_gpio_to_flags(get_sram_res.gp2_settings);
+ sc->sc_gpio_pins[2].pin_caps = GPIO_PIN_INPUT;
+ sc->sc_gpio_pins[2].pin_caps |= GPIO_PIN_OUTPUT;
+ sc->sc_gpio_pins[2].pin_caps |= GPIO_PIN_ALT0;
+ sc->sc_gpio_pins[2].pin_caps |= GPIO_PIN_ALT1;
+ sc->sc_gpio_pins[2].pin_caps |= GPIO_PIN_ALT3;
+ sc->sc_gpio_pins[2].pin_flags =
+ umcpmio_sram_gpio_to_flags(
+ get_sram_res.gp2_settings);
sc->sc_gpio_pins[2].pin_intrcaps = 0;
snprintf(sc->sc_gpio_pins[2].pin_defname, 4, "GP2");
sc->sc_gpio_pins[3].pin_num = 3;
- sc->sc_gpio_pins[3].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_ALT0 | GPIO_PIN_ALT1 | GPIO_PIN_ALT3;
- sc->sc_gpio_pins[3].pin_flags = umcpmio_sram_gpio_to_flags(get_sram_res.gp3_settings);
+ sc->sc_gpio_pins[3].pin_caps = GPIO_PIN_INPUT;
+ sc->sc_gpio_pins[3].pin_caps |= GPIO_PIN_OUTPUT;
+ sc->sc_gpio_pins[3].pin_caps |= GPIO_PIN_ALT0;
+ sc->sc_gpio_pins[3].pin_caps |= GPIO_PIN_ALT1;
+ sc->sc_gpio_pins[3].pin_caps |= GPIO_PIN_ALT3;
+ sc->sc_gpio_pins[3].pin_flags =
+ umcpmio_sram_gpio_to_flags(
+ get_sram_res.gp3_settings);
sc->sc_gpio_pins[3].pin_intrcaps = 0;
snprintf(sc->sc_gpio_pins[3].pin_defname, 4, "GP3");
@@ -1972,16 +2270,19 @@ umcpmio_attach(device_t parent, device_t
sc->sc_gpio_gc.gp_pin_write = umcpmio_gpio_pin_write;
sc->sc_gpio_gc.gp_pin_ctl = umcpmio_gpio_pin_ctl;
- sc->sc_gpio_gc.gp_intr_establish = umcpmio_gpio_intr_establish;
- sc->sc_gpio_gc.gp_intr_disestablish = umcpmio_gpio_intr_disestablish;
+ sc->sc_gpio_gc.gp_intr_establish =
+ umcpmio_gpio_intr_establish;
+ sc->sc_gpio_gc.gp_intr_disestablish =
+ umcpmio_gpio_intr_disestablish;
sc->sc_gpio_gc.gp_intr_str = umcpmio_gpio_intrstr;
-
gba.gba_gc = &sc->sc_gpio_gc;
gba.gba_pins = sc->sc_gpio_pins;
gba.gba_npins = MCP2221_NPINS;
- sc->sc_gpio_dev = config_found(self, &gba, gpiobus_print, CFARGS(.iattr = "gpiobus"));
+ sc->sc_gpio_dev =
+ config_found(self, &gba, gpiobus_print,
+ CFARGS(.iattr = "gpiobus"));
iic_tag_init(&sc->sc_i2c_tag);
sc->sc_i2c_tag.ic_cookie = sc;
@@ -1991,17 +2292,19 @@ umcpmio_attach(device_t parent, device_t
memset(&iba, 0, sizeof(iba));
iba.iba_tag = &sc->sc_i2c_tag;
- sc->sc_i2c_dev = config_found(self, &iba, iicbus_print, CFARGS(.iattr = "i2cbus"));
+ sc->sc_i2c_dev = config_found(self, &iba, iicbus_print,
+ CFARGS(.iattr = "i2cbus"));
} else {
- aprint_error_dev(sc->sc_dev, "umcpmio_attach: get sram error: err=%d\n",
+ aprint_error_dev(sc->sc_dev, "umcpmio_attach:"
+ " get sram error: err=%d\n",
err);
}
} else {
- aprint_error_dev(sc->sc_dev, "umcpmio_attach: open uhidev_open: err=%d\n", err);
+ aprint_error_dev(sc->sc_dev, "umcpmio_attach:"
+ " open uhidev_open: err=%d\n", err);
}
}
-
static int
umcpmio_detach(device_t self, int flags)
{
@@ -2035,7 +2338,7 @@ umcpmio_activate(device_t self, enum dev
{
struct umcpmio_softc *sc = device_private(self);
- DPRINTFN(5,("umcpmio_activate: %d\n", act));
+ DPRINTFN(5, ("umcpmio_activate: %d\n", act));
switch (act) {
case DVACT_DEACTIVATE:
Index: src/sys/dev/usb/umcpmio.h
diff -u src/sys/dev/usb/umcpmio.h:1.1 src/sys/dev/usb/umcpmio.h:1.2
--- src/sys/dev/usb/umcpmio.h:1.1 Mon Dec 16 16:37:38 2024
+++ src/sys/dev/usb/umcpmio.h Mon Mar 17 18:24:08 2025
@@ -1,4 +1,4 @@
-/* $NetBSD: umcpmio.h,v 1.1 2024/12/16 16:37:38 brad Exp $ */
+/* $NetBSD: umcpmio.h,v 1.2 2025/03/17 18:24:08 riastradh Exp $ */
/*
* Copyright (c) 2024 Brad Spencer <b...@anduin.eldar.org>
@@ -16,33 +16,37 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-
#ifndef _UMCPMIO_H_
#define _UMCPMIO_H_
#include <sys/param.h>
-#include <sys/systm.h>
+#include <sys/types.h>
+
+#include <sys/condvar.h>
#include <sys/conf.h>
+#include <sys/device.h>
+#include <sys/file.h>
+#include <sys/gpio.h>
+#include <sys/kauth.h>
#include <sys/kernel.h>
#include <sys/kmem.h>
-#include <sys/device.h>
+#include <sys/lwp.h>
+#include <sys/mutex.h>
#include <sys/sysctl.h>
+#include <sys/systm.h>
#include <sys/tty.h>
-#include <sys/file.h>
#include <sys/vnode.h>
-#include <sys/kauth.h>
-#include <sys/lwp.h>
-#include <sys/gpio.h>
#include <dev/gpio/gpiovar.h>
+#include <dev/hid/hid.h>
+
#include <dev/i2c/i2cvar.h>
+#include <dev/usb/uhidev.h>
+#include <dev/usb/usbdevs.h>
#include <dev/usb/usbdi.h>
#include <dev/usb/usbdi_util.h>
-#include <dev/usb/usbdevs.h>
-#include <dev/usb/uhidev.h>
-#include <dev/hid/hid.h>
#define UMCPMIO_VREF_NAME 7
#define UMCPMIO_CD_NAME 7
@@ -103,4 +107,4 @@ struct umcpmio_sysctl_name {
const char *text;
};
-#endif
+#endif /* _UMCPMIO_H_ */
Index: src/sys/dev/usb/umcpmio_hid_reports.h
diff -u src/sys/dev/usb/umcpmio_hid_reports.h:1.1 src/sys/dev/usb/umcpmio_hid_reports.h:1.2
--- src/sys/dev/usb/umcpmio_hid_reports.h:1.1 Mon Dec 16 16:37:38 2024
+++ src/sys/dev/usb/umcpmio_hid_reports.h Mon Mar 17 18:24:08 2025
@@ -1,4 +1,4 @@
-/* $NetBSD: umcpmio_hid_reports.h,v 1.1 2024/12/16 16:37:38 brad Exp $ */
+/* $NetBSD: umcpmio_hid_reports.h,v 1.2 2025/03/17 18:24:08 riastradh Exp $ */
/*
* Copyright (c) 2024 Brad Spencer <b...@anduin.eldar.org>
@@ -16,16 +16,14 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-
-#ifndef _UMCPMIO_HID_REPORTS_H_
-#define _UMCPMIO_HID_REPORTS_H_
-
+#ifndef _UMCPMIO_HID_REPORTS_H_
+#define _UMCPMIO_HID_REPORTS_H_
#include <sys/types.h>
-
-/* It is nice that all HID reports want a 64 byte request and return a 64 byte
- * response.
+/*
+ * It is nice that all HID reports want a 64 byte request and return a
+ * 64 byte response.
*/
#define MCP2221_REQ_BUFFER_SIZE 64
@@ -252,7 +250,6 @@ struct mcp2221_get_gpio_cfg_res {
#define MCP2221_SRAM_PIN_IS_ALT1 0x03
#define MCP2221_SRAM_PIN_IS_ALT2 0x04
-
struct mcp2221_set_sram_req {
uint8_t cmd; /* MCP2221_CMD_SET_SRAM */
uint8_t dontcare1;
@@ -499,4 +496,4 @@ struct mcp2221_put_flash_res {
/* XXX - missing is the submit password call to unlock the chip */
-#endif
+#endif /* _UMCPMIO_HID_REPORTS_H_ */
Index: src/sys/dev/usb/umcpmio_io.h
diff -u src/sys/dev/usb/umcpmio_io.h:1.1 src/sys/dev/usb/umcpmio_io.h:1.2
--- src/sys/dev/usb/umcpmio_io.h:1.1 Mon Dec 16 16:37:38 2024
+++ src/sys/dev/usb/umcpmio_io.h Mon Mar 17 18:24:08 2025
@@ -1,4 +1,4 @@
-/* $NetBSD: umcpmio_io.h,v 1.1 2024/12/16 16:37:38 brad Exp $ */
+/* $NetBSD: umcpmio_io.h,v 1.2 2025/03/17 18:24:08 riastradh Exp $ */
/*
* Copyright (c) 2024 Brad Spencer <b...@anduin.eldar.org>
@@ -16,10 +16,13 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-
#ifndef _UMCPMIO_IO_H_
#define _UMCPMIO_IO_H_
+#include <sys/types.h>
+
+#include <sys/ioccom.h>
+
#include <dev/usb/umcpmio_hid_reports.h>
struct umcpmio_ioctl_get_flash {
@@ -39,5 +42,4 @@ struct umcpmio_ioctl_put_flash {
#define UMCPMIO_GET_FLASH _IOWR('m', 4, struct umcpmio_ioctl_get_flash)
#define UMCPMIO_PUT_FLASH _IOWR('m', 5, struct umcpmio_ioctl_put_flash)
-
-#endif
+#endif /* _UMCPMIO_IO_H_ */
Index: src/sys/dev/usb/umcpmio_subr.c
diff -u src/sys/dev/usb/umcpmio_subr.c:1.1 src/sys/dev/usb/umcpmio_subr.c:1.2
--- src/sys/dev/usb/umcpmio_subr.c:1.1 Mon Dec 16 16:37:38 2024
+++ src/sys/dev/usb/umcpmio_subr.c Mon Mar 17 18:24:08 2025
@@ -1,4 +1,4 @@
-/* $NetBSD: umcpmio_subr.c,v 1.1 2024/12/16 16:37:38 brad Exp $ */
+/* $NetBSD: umcpmio_subr.c,v 1.2 2025/03/17 18:24:08 riastradh Exp $ */
/*
* Copyright (c) 2024 Brad Spencer <b...@anduin.eldar.org>
@@ -17,44 +17,47 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: umcpmio_subr.c,v 1.1 2024/12/16 16:37:38 brad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: umcpmio_subr.c,v 1.2 2025/03/17 18:24:08 riastradh Exp $");
#ifdef _KERNEL_OPT
#include "opt_usb.h"
#endif
#include <sys/param.h>
-#include <sys/systm.h>
+#include <sys/types.h>
+
#include <sys/conf.h>
+#include <sys/device.h>
+#include <sys/file.h>
+#include <sys/kauth.h>
#include <sys/kernel.h>
#include <sys/kmem.h>
-#include <sys/device.h>
+#include <sys/lwp.h>
#include <sys/sysctl.h>
+#include <sys/systm.h>
#include <sys/tty.h>
-#include <sys/file.h>
#include <sys/vnode.h>
-#include <sys/kauth.h>
-#include <sys/lwp.h>
-#include <dev/usb/usb.h>
-#include <dev/usb/usbhid.h>
+#include <dev/hid/hid.h>
+#include <dev/usb/uhidev.h>
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdevs.h>
#include <dev/usb/usbdi.h>
#include <dev/usb/usbdi_util.h>
-#include <dev/usb/usbdevs.h>
-#include <dev/usb/uhidev.h>
-#include <dev/hid/hid.h>
+#include <dev/usb/usbhid.h>
#include <dev/usb/umcpmio.h>
#include <dev/usb/umcpmio_subr.h>
#include <dev/usb/umcpmio_hid_reports.h>
-int umcpmio_send_report(struct umcpmio_softc *, uint8_t *, size_t, uint8_t *, int);
+int umcpmio_send_report(struct umcpmio_softc *, uint8_t *, size_t, uint8_t *,
+ int);
#define UMCPMIO_DEBUG 1
#ifdef UMCPMIO_DEBUG
-#define DPRINTF(x) if (umcpmiodebug) printf x
-#define DPRINTFN(n, x) if (umcpmiodebug > (n)) printf x
+#define DPRINTF(x) do { if (umcpmiodebug) printf x; } while (0)
+#define DPRINTFN(n, x) do { if (umcpmiodebug > (n)) printf x; } while (0)
extern int umcpmiodebug;
#else
#define DPRINTF(x) __nothing
@@ -75,16 +78,17 @@ umcpmio_get_status(struct umcpmio_softc
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
- return(err);
+ return err;
}
void
-umcpmio_set_i2c_speed(struct mcp2221_status_req *req,
- int flags)
+umcpmio_set_i2c_speed(struct mcp2221_status_req *req, int flags)
{
int i2cbaud = MCP2221_DEFAULT_I2C_SPEED;
@@ -95,9 +99,10 @@ umcpmio_set_i2c_speed(struct mcp2221_sta
if (i2cbaud <= 0)
i2cbaud = MCP2221_DEFAULT_I2C_SPEED;
- /* Everyone and their brother seems to store the I2C divider like this,
- * so do likewise */
-
+ /*
+ * Everyone and their brother seems to store the I2C divider like this,
+ * so do likewise
+ */
req->i2c_clock_divider = (MCP2221_INTERNAL_CLOCK / i2cbaud) - 3;
}
@@ -112,11 +117,13 @@ umcpmio_put_status(struct umcpmio_softc
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
- return(err);
+ return err;
}
int
@@ -135,7 +142,7 @@ umcpmio_set_i2c_speed_one(struct umcpmio
err = EBUSY;
}
- return(err);
+ return err;
}
int
@@ -150,11 +157,13 @@ umcpmio_get_sram(struct umcpmio_softc *s
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
- return(err);
+ return err;
}
int
@@ -168,11 +177,13 @@ umcpmio_put_sram(struct umcpmio_softc *s
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
- return(err);
+ return err;
}
/* We call the dedicated function ALT3 everywhere */
@@ -197,23 +208,25 @@ umcpmio_sram_gpio_to_flags(uint8_t gp_se
break;
case MCP2221_SRAM_PIN_IS_GPIO:
default:
- if ((gp_setting & MCP2221_SRAM_GPIO_TYPE_MASK) == MCP2221_SRAM_GPIO_INPUT)
+ if ((gp_setting & MCP2221_SRAM_GPIO_TYPE_MASK) ==
+ MCP2221_SRAM_GPIO_INPUT)
r |= GPIO_PIN_INPUT;
else
r |= GPIO_PIN_OUTPUT;
break;
}
- return(r);
+ return r;
}
void
-umcpmio_set_gpio_value_sram(struct mcp2221_set_sram_req *req, int pin, bool value)
+umcpmio_set_gpio_value_sram(struct mcp2221_set_sram_req *req, int pin,
+ bool value)
{
uint8_t *alter = NULL;
uint8_t *newvalue = NULL;
- if (pin >=0 && pin < MCP2221_NPINS) {
+ if (pin >= 0 && pin < MCP2221_NPINS) {
switch (pin) {
case 0:
alter = &req->alter_gpio_config;
@@ -251,7 +264,7 @@ umcpmio_set_gpio_dir_sram(struct mcp2221
uint8_t *alter = NULL;
uint8_t *newvalue = NULL;
- if (pin >=0 && pin < MCP2221_NPINS) {
+ if (pin >= 0 && pin < MCP2221_NPINS) {
switch (pin) {
case 0:
alter = &req->alter_gpio_config;
@@ -284,13 +297,15 @@ umcpmio_set_gpio_dir_sram(struct mcp2221
}
void
-umcpmio_set_gpio_designation_sram(struct mcp2221_set_sram_req *req, int pin, int flags)
+umcpmio_set_gpio_designation_sram(struct mcp2221_set_sram_req *req, int pin,
+ int flags)
{
uint8_t *alter = NULL;
uint8_t *newvalue = NULL;
- uint32_t altmask = GPIO_PIN_ALT0 | GPIO_PIN_ALT1 | GPIO_PIN_ALT2 | GPIO_PIN_ALT3;
+ uint32_t altmask =
+ GPIO_PIN_ALT0 | GPIO_PIN_ALT1 | GPIO_PIN_ALT2 | GPIO_PIN_ALT3;
- if (pin >=0 && pin < MCP2221_NPINS) {
+ if (pin >= 0 && pin < MCP2221_NPINS) {
switch (pin) {
case 0:
alter = &req->alter_gpio_config;
@@ -331,8 +346,12 @@ umcpmio_set_gpio_designation_sram(struct
case GPIO_PIN_ALT2:
nv |= MCP2221_SRAM_PIN_IS_ALT2;
break;
- /* ALT3 will always be used as the dedicated function specific to the pin.
- * Not all of the pins will have the alt functions below #3.
+ /*
+ * ALT3 will always be used as
+ * the dedicated function
+ * specific to the pin. Not
+ * all of the pins will have
+ * the alt functions below #3.
*/
case GPIO_PIN_ALT3:
nv |= MCP2221_SRAM_PIN_IS_DED;
@@ -352,22 +371,32 @@ umcpmio_set_gpio_irq_sram(struct mcp2221
req->alter_gpio_config = MCP2221_SRAM_ALTER_GPIO;
if (irqmode & (GPIO_INTR_POS_EDGE | GPIO_INTR_DOUBLE_EDGE)) {
- req->irq_config |= MCP2221_SRAM_ALTER_IRQ | MCP2221_SRAM_ALTER_POS_EDGE | MCP2221_SRAM_ENABLE_POS_EDGE | MCP2221_SRAM_CLEAR_IRQ;
+ req->irq_config |= MCP2221_SRAM_ALTER_IRQ |
+ MCP2221_SRAM_ALTER_POS_EDGE |
+ MCP2221_SRAM_ENABLE_POS_EDGE |
+ MCP2221_SRAM_CLEAR_IRQ;
}
if (irqmode & (GPIO_INTR_NEG_EDGE | GPIO_INTR_DOUBLE_EDGE)) {
- req->irq_config |= MCP2221_SRAM_ALTER_IRQ | MCP2221_SRAM_ALTER_NEG_EDGE | MCP2221_SRAM_ENABLE_NEG_EDGE | MCP2221_SRAM_CLEAR_IRQ;
+ req->irq_config |= MCP2221_SRAM_ALTER_IRQ |
+ MCP2221_SRAM_ALTER_NEG_EDGE |
+ MCP2221_SRAM_ENABLE_NEG_EDGE |
+ MCP2221_SRAM_CLEAR_IRQ;
}
if (req->irq_config != 0) {
req->gp1_settings = MCP2221_SRAM_PIN_IS_ALT2;
} else {
- req->irq_config = MCP2221_SRAM_ALTER_IRQ | MCP2221_SRAM_CLEAR_IRQ;
- req->gp1_settings = MCP2221_SRAM_PIN_IS_GPIO | MCP2221_SRAM_GPIO_INPUT;
+ req->irq_config = MCP2221_SRAM_ALTER_IRQ |
+ MCP2221_SRAM_CLEAR_IRQ;
+ req->gp1_settings = MCP2221_SRAM_PIN_IS_GPIO |
+ MCP2221_SRAM_GPIO_INPUT;
}
}
-/* It is unfortunate that the GET and PUT requests are not symertric. That is,
- * the bits sort of line up but not quite between a GET and PUT. */
+/*
+ * It is unfortunate that the GET and PUT requests are not symertric. That is,
+ * the bits sort of line up but not quite between a GET and PUT.
+ */
static struct umcpmio_mapping_put umcpmio_vref_puts[] = {
{
@@ -407,11 +436,13 @@ umcpmio_set_dac_vref(struct mcp2221_set_
if (i == __arraycount(umcpmio_vref_puts))
return;
- req->dac_voltage_reference |= umcpmio_vref_puts[i].mask | MCP2221_SRAM_CHANGE_DAC_VREF;
+ req->dac_voltage_reference |= umcpmio_vref_puts[i].mask |
+ MCP2221_SRAM_CHANGE_DAC_VREF;
}
int
-umcpmio_set_dac_vref_one(struct umcpmio_softc *sc, char *newvref, bool takemutex)
+umcpmio_set_dac_vref_one(struct umcpmio_softc *sc, char *newvref,
+ bool takemutex)
{
struct mcp2221_set_sram_req req;
struct mcp2221_set_sram_res res;
@@ -427,11 +458,13 @@ umcpmio_set_dac_vref_one(struct umcpmio_
void
umcpmio_set_dac_value(struct mcp2221_set_sram_req *req, uint8_t newvalue)
{
- req->set_dac_output_value |= (newvalue & MCP2221_SRAM_DAC_VALUE_MASK) | MCP2221_SRAM_CHANGE_DAC_VREF;
+ req->set_dac_output_value |= (newvalue & MCP2221_SRAM_DAC_VALUE_MASK) |
+ MCP2221_SRAM_CHANGE_DAC_VREF;
}
int
-umcpmio_set_dac_value_one(struct umcpmio_softc *sc, uint8_t newvalue, bool takemutex)
+umcpmio_set_dac_value_one(struct umcpmio_softc *sc, uint8_t newvalue,
+ bool takemutex)
{
struct mcp2221_set_sram_req req;
struct mcp2221_set_sram_res res;
@@ -459,11 +492,13 @@ umcpmio_set_adc_vref(struct mcp2221_set_
if (i == __arraycount(umcpmio_vref_puts))
return;
- req->adc_voltage_reference |= umcpmio_vref_puts[i].mask | MCP2221_SRAM_CHANGE_ADC_VREF;
+ req->adc_voltage_reference |= umcpmio_vref_puts[i].mask |
+ MCP2221_SRAM_CHANGE_ADC_VREF;
}
int
-umcpmio_set_adc_vref_one(struct umcpmio_softc *sc, char *newvref, bool takemutex)
+umcpmio_set_adc_vref_one(struct umcpmio_softc *sc, char *newvref,
+ bool takemutex)
{
struct mcp2221_set_sram_req req;
struct mcp2221_set_sram_res res;
@@ -514,7 +549,8 @@ umcpmio_set_gpioclock_dc(struct mcp2221_
}
int
-umcpmio_set_gpioclock_dc_one(struct umcpmio_softc *sc, char *new_dutycycle, bool takemutex)
+umcpmio_set_gpioclock_dc_one(struct umcpmio_softc *sc, char *new_dutycycle,
+ bool takemutex)
{
struct mcp2221_get_sram_res current_sram_res;
struct mcp2221_set_sram_req req;
@@ -525,9 +561,18 @@ umcpmio_set_gpioclock_dc_one(struct umcp
if (! err) {
memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
umcpmio_set_gpioclock_dc(&req, new_dutycycle);
- DPRINTF(("umcpmio_set_gpioclock_dc_one: req.clock_output_divider=%02x,current mask=%02x\n",req.clock_output_divider,current_sram_res.clock_divider & MCP2221_SRAM_GPIO_CLOCK_CD_MASK));
- req.clock_output_divider |= (current_sram_res.clock_divider & MCP2221_SRAM_GPIO_CLOCK_CD_MASK) | MCP2221_SRAM_GPIO_CHANGE_DCCD;
- DPRINTF(("umcpmio_set_gpioclock_dc_one: SET req.clock_output_divider=%02x\n",req.clock_output_divider));
+ DPRINTF(("umcpmio_set_gpioclock_dc_one:"
+ " req.clock_output_divider=%02x, current mask=%02x\n",
+ req.clock_output_divider,
+ (current_sram_res.clock_divider &
+ MCP2221_SRAM_GPIO_CLOCK_CD_MASK)));
+ req.clock_output_divider |=
+ (current_sram_res.clock_divider &
+ MCP2221_SRAM_GPIO_CLOCK_CD_MASK) |
+ MCP2221_SRAM_GPIO_CHANGE_DCCD;
+ DPRINTF(("umcpmio_set_gpioclock_dc_one:"
+ " SET req.clock_output_divider=%02x\n",
+ req.clock_output_divider));
err = umcpmio_put_sram(sc, &req, &res, takemutex);
}
@@ -584,7 +629,8 @@ umcpmio_set_gpioclock_cd(struct mcp2221_
}
int
-umcpmio_set_gpioclock_cd_one(struct umcpmio_softc *sc, char *new_clockdivider, bool takemutex)
+umcpmio_set_gpioclock_cd_one(struct umcpmio_softc *sc, char *new_clockdivider,
+ bool takemutex)
{
struct mcp2221_get_sram_res current_sram_res;
struct mcp2221_set_sram_req req;
@@ -595,9 +641,18 @@ umcpmio_set_gpioclock_cd_one(struct umcp
if (! err) {
memset(&req, 0, MCP2221_REQ_BUFFER_SIZE);
umcpmio_set_gpioclock_cd(&req, new_clockdivider);
- DPRINTF(("umcpmio_set_gpioclock_cd_one: req.clock_output_divider=%02x,current mask=%02x\n",req.clock_output_divider,current_sram_res.clock_divider & MCP2221_SRAM_GPIO_CLOCK_CD_MASK));
- req.clock_output_divider |= (current_sram_res.clock_divider & MCP2221_SRAM_GPIO_CLOCK_DC_MASK) | MCP2221_SRAM_GPIO_CHANGE_DCCD;
- DPRINTF(("umcpmio_set_gpioclock_cd_one: SET req.clock_output_divider=%02x\n",req.clock_output_divider));
+ DPRINTF(("umcpmio_set_gpioclock_cd_one:"
+ " req.clock_output_divider=%02x, current mask=%02x\n",
+ req.clock_output_divider,
+ (current_sram_res.clock_divider &
+ MCP2221_SRAM_GPIO_CLOCK_CD_MASK)));
+ req.clock_output_divider |=
+ (current_sram_res.clock_divider &
+ MCP2221_SRAM_GPIO_CLOCK_DC_MASK) |
+ MCP2221_SRAM_GPIO_CHANGE_DCCD;
+ DPRINTF(("umcpmio_set_gpioclock_cd_one:"
+ " SET req.clock_output_divider=%02x\n",
+ req.clock_output_divider));
err = umcpmio_put_sram(sc, &req, &res, takemutex);
}
@@ -616,11 +671,13 @@ umcpmio_get_gpio_cfg(struct umcpmio_soft
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
- return(err);
+ return err;
}
int
@@ -634,11 +691,13 @@ umcpmio_put_gpio_cfg(struct umcpmio_soft
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
- return(err);
+ return err;
}
/* So... if the pin isn't set to GPIO, just call the output LOW */
@@ -657,36 +716,45 @@ umcpmio_get_gpio_value(struct umcpmio_so
get_gpio_cfg_res.completion == MCP2221_CMD_COMPLETE_OK) {
switch (pin) {
case 0:
- if (get_gpio_cfg_res.gp0_pin_value != MCP2221_GPIO_CFG_VALUE_NOT_GPIO)
- if (get_gpio_cfg_res.gp0_pin_value == 0x01)
+ if (get_gpio_cfg_res.gp0_pin_value !=
+ MCP2221_GPIO_CFG_VALUE_NOT_GPIO)
+ if (get_gpio_cfg_res.gp0_pin_value ==
+ 0x01)
r = GPIO_PIN_HIGH;
break;
case 1:
- if (get_gpio_cfg_res.gp1_pin_value != MCP2221_GPIO_CFG_VALUE_NOT_GPIO)
- if (get_gpio_cfg_res.gp1_pin_value == 0x01)
+ if (get_gpio_cfg_res.gp1_pin_value !=
+ MCP2221_GPIO_CFG_VALUE_NOT_GPIO)
+ if (get_gpio_cfg_res.gp1_pin_value ==
+ 0x01)
r = GPIO_PIN_HIGH;
break;
case 2:
- if (get_gpio_cfg_res.gp2_pin_value != MCP2221_GPIO_CFG_VALUE_NOT_GPIO)
- if (get_gpio_cfg_res.gp2_pin_value == 0x01)
+ if (get_gpio_cfg_res.gp2_pin_value !=
+ MCP2221_GPIO_CFG_VALUE_NOT_GPIO)
+ if (get_gpio_cfg_res.gp2_pin_value ==
+ 0x01)
r = GPIO_PIN_HIGH;
break;
case 3:
- if (get_gpio_cfg_res.gp3_pin_value != MCP2221_GPIO_CFG_VALUE_NOT_GPIO)
- if (get_gpio_cfg_res.gp3_pin_value == 0x01)
+ if (get_gpio_cfg_res.gp3_pin_value !=
+ MCP2221_GPIO_CFG_VALUE_NOT_GPIO)
+ if (get_gpio_cfg_res.gp3_pin_value ==
+ 0x01)
r = GPIO_PIN_HIGH;
break;
default:
break;
}
} else {
- device_printf(sc->sc_dev, "umcpmio_get_gpio_value: wrong command or error: %02x %02x\n",
+ device_printf(sc->sc_dev, "umcpmio_get_gpio_value:"
+ " wrong command or error: %02x %02x\n",
get_gpio_cfg_res.cmd,
get_gpio_cfg_res.completion);
}
}
- return(r);
+ return r;
}
void
@@ -696,7 +764,7 @@ umcpmio_set_gpio_value(struct mcp2221_se
uint8_t *alter = NULL;
uint8_t *newvalue = NULL;
- if (pin >=0 && pin < MCP2221_NPINS) {
+ if (pin >= 0 && pin < MCP2221_NPINS) {
switch (pin) {
case 0:
alter = &req->alter_gp0_value;
@@ -743,13 +811,14 @@ umcpmio_set_gpio_value_one(struct umcpmi
res.completion == MCP2221_CMD_COMPLETE_OK) {
} else {
err = EIO;
- device_printf(sc->sc_dev, "umcpmio_gpio_pin_write: not the command desired, or error: %02x %02x\n",
+ device_printf(sc->sc_dev, "umcpmio_gpio_pin_write:"
+ " not the command desired, or error: %02x %02x\n",
res.cmd,
res.completion);
}
}
- return(err);
+ return err;
}
int
@@ -764,17 +833,19 @@ umcpmio_get_flash(struct umcpmio_softc *
if (subcode < MCP2221_FLASH_SUBCODE_CS ||
subcode > MCP2221_FLASH_SUBCODE_CHIPSN)
- return(EINVAL);
+ return EINVAL;
req.subcode = subcode;
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)&req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
- return(err);
+ return err;
}
int
@@ -787,16 +858,19 @@ umcpmio_put_flash(struct umcpmio_softc *
if (req->subcode < MCP2221_FLASH_SUBCODE_CS ||
req->subcode > MCP2221_FLASH_SUBCODE_CHIPSN) {
- DPRINTF(("umcpmio_put_flash: subcode out of range: subcode=%d\n",req->subcode));
- return(EINVAL);
+ DPRINTF(("umcpmio_put_flash: subcode out of range:"
+ " subcode=%d\n",
+ req->subcode));
+ return EINVAL;
}
if (takemutex)
mutex_enter(&sc->sc_action_mutex);
- err = umcpmio_send_report(sc, (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE, (uint8_t *)res, sc->sc_cv_wait);
+ err = umcpmio_send_report(sc,
+ (uint8_t *)req, MCP2221_REQ_BUFFER_SIZE,
+ (uint8_t *)res, sc->sc_cv_wait);
if (takemutex)
mutex_exit(&sc->sc_action_mutex);
- return(err);
+ return err;
}
-
Index: src/sys/dev/usb/umcpmio_subr.h
diff -u src/sys/dev/usb/umcpmio_subr.h:1.1 src/sys/dev/usb/umcpmio_subr.h:1.2
--- src/sys/dev/usb/umcpmio_subr.h:1.1 Mon Dec 16 16:37:38 2024
+++ src/sys/dev/usb/umcpmio_subr.h Mon Mar 17 18:24:08 2025
@@ -1,4 +1,4 @@
-/* $NetBSD: umcpmio_subr.h,v 1.1 2024/12/16 16:37:38 brad Exp $ */
+/* $NetBSD: umcpmio_subr.h,v 1.2 2025/03/17 18:24:08 riastradh Exp $ */
/*
* Copyright (c) 2024 Brad Spencer <b...@anduin.eldar.org>
@@ -16,11 +16,10 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: umcpmio_subr.h,v 1.1 2024/12/16 16:37:38 brad Exp $");
+#ifndef _UMCPMIO_SUBR_H_
+#define _UMCPMIO_SUBR_H_
-#ifndef _UMCPMIO_SUBR_H_
-#define _UMCPMIO_SUBR_H_
+#include <sys/types.h>
#include <dev/usb/umcpmio.h>
#include <dev/usb/umcpmio_hid_reports.h>
@@ -30,16 +29,21 @@ struct umcpmio_mapping_put {
const uint8_t mask;
};
-int umcpmio_get_status(struct umcpmio_softc *, struct mcp2221_status_res *, bool);
-void umcpmio_set_i2c_speed(struct mcp2221_status_req *req, int);
+int umcpmio_get_status(struct umcpmio_softc *, struct mcp2221_status_res *,
+ bool);
+void umcpmio_set_i2c_speed(struct mcp2221_status_req *, int);
int umcpmio_set_i2c_speed_one(struct umcpmio_softc *, int, bool);
-int umcpmio_put_status(struct umcpmio_softc *, struct mcp2221_status_req *, struct mcp2221_status_res *, bool);
-int umcpmio_get_sram(struct umcpmio_softc *, struct mcp2221_get_sram_res *, bool);
-int umcpmio_put_sram(struct umcpmio_softc *, struct mcp2221_set_sram_req *, struct mcp2221_set_sram_res *, bool);
+int umcpmio_put_status(struct umcpmio_softc *, struct mcp2221_status_req *,
+ struct mcp2221_status_res *, bool);
+int umcpmio_get_sram(struct umcpmio_softc *, struct mcp2221_get_sram_res *,
+ bool);
+int umcpmio_put_sram(struct umcpmio_softc *, struct mcp2221_set_sram_req *,
+ struct mcp2221_set_sram_res *, bool);
uint32_t umcpmio_sram_gpio_to_flags(uint8_t);
void umcpmio_set_gpio_value_sram(struct mcp2221_set_sram_req *, int, bool);
void umcpmio_set_gpio_dir_sram(struct mcp2221_set_sram_req *, int, int);
-void umcpmio_set_gpio_designation_sram(struct mcp2221_set_sram_req *, int, int);
+void umcpmio_set_gpio_designation_sram(struct mcp2221_set_sram_req *, int,
+ int);
void umcpmio_set_gpio_irq_sram(struct mcp2221_set_sram_req *, int);
void umcpmio_set_dac_vref(struct mcp2221_set_sram_req *, char *);
int umcpmio_set_dac_vref_one(struct umcpmio_softc *, char *, bool);
@@ -51,12 +55,17 @@ void umcpmio_set_gpioclock_dc(struct mcp
int umcpmio_set_gpioclock_dc_one(struct umcpmio_softc *, char *, bool);
void umcpmio_set_gpioclock_cd(struct mcp2221_set_sram_req *, char *);
int umcpmio_set_gpioclock_cd_one(struct umcpmio_softc *, char *, bool);
-int umcpmio_get_gpio_cfg(struct umcpmio_softc *, struct mcp2221_get_gpio_cfg_res *, bool);
-int umcpmio_put_gpio_cfg(struct umcpmio_softc *, struct mcp2221_set_gpio_cfg_req *, struct mcp2221_set_gpio_cfg_res *, bool);
+int umcpmio_get_gpio_cfg(struct umcpmio_softc *,
+ struct mcp2221_get_gpio_cfg_res *, bool);
+int umcpmio_put_gpio_cfg(struct umcpmio_softc *,
+ struct mcp2221_set_gpio_cfg_req *, struct mcp2221_set_gpio_cfg_res *,
+ bool);
int umcpmio_get_gpio_value(struct umcpmio_softc *, int, bool);
void umcpmio_set_gpio_value(struct mcp2221_set_gpio_cfg_req *, int, bool);
int umcpmio_set_gpio_value_one(struct umcpmio_softc *, int, bool, bool);
-int umcpmio_get_flash(struct umcpmio_softc *, uint8_t, struct mcp2221_get_flash_res *, bool);
-int umcpmio_put_flash(struct umcpmio_softc *, struct mcp2221_put_flash_req *, struct mcp2221_put_flash_res *, bool);
+int umcpmio_get_flash(struct umcpmio_softc *, uint8_t,
+ struct mcp2221_get_flash_res *, bool);
+int umcpmio_put_flash(struct umcpmio_softc *, struct mcp2221_put_flash_req *,
+ struct mcp2221_put_flash_res *, bool);
-#endif
+#endif /* _UMCPMIO_SUBR_H_ */
