Module Name: src
Committed By: pgoyette
Date: Sat May 16 13:36:44 UTC 2009
Modified Files:
src/sys/arch/x86/include: specialreg.h
Log Message:
Correctly identify flag bit for SSSE3 (one of the 'S' was missing). Also
rename AMD bit from SCALL/RET to SYSCALL/SYSRET to match Intel bit name.
To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/x86/include/specialreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/specialreg.h
diff -u src/sys/arch/x86/include/specialreg.h:1.34 src/sys/arch/x86/include/specialreg.h:1.35
--- src/sys/arch/x86/include/specialreg.h:1.34 Wed May 13 22:25:51 2009
+++ src/sys/arch/x86/include/specialreg.h Sat May 16 13:36:44 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.34 2009/05/13 22:25:51 pgoyette Exp $ */
+/* $NetBSD: specialreg.h,v 1.35 2009/05/16 13:36:44 pgoyette Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -158,8 +158,8 @@
#define CPUID_3DNOW2 0x40000000 /* 3DNow! Instruction Extension */
#define CPUID_3DNOW 0x80000000 /* 3DNow! Instructions */
-#define CPUID_EXT_FLAGS "\20\14SCALL/RET\24MPC\25NOX\27MXX\32FFXSR\33P1GB" \
- "\34RDTSCP\36LONG\0373DNOW2\0403DNOW"
+#define CPUID_EXT_FLAGS "\20\14SYSCALL/SYSRET\24MPC\25NOX\27MXX\32FFXSR" \
+ "\33P1GB\34RDTSCP\36LONG\0373DNOW2\0403DNOW"
/* AMD Fn80000001 %ecx features */
@@ -249,7 +249,7 @@
#define CPUID2_POPCNT 0x00800000
#define CPUID2_FLAGS1 "\20\1SSE3\2B01\3DTES64\4MONITOR\5DS-CPL\6VMX\7SMX" \
- "\10EST\11TM2\12SSE3\13CID\14B11\15B12\16CX16" \
+ "\10EST\11TM2\12SSSE3\13CID\14B11\15B12\16CX16" \
"\17xTPR\20PDCM\21B16\22B17\23DCA\24SSE41\25SSE42" \
"\26X2APIC\27MOVBE\30POPCNT\31B24\32B25\33XSAVE" \
"\34OSXSAVE\35B28\36B29\37B30\40B31"
