Module Name: src
Committed By: martin
Date: Sat May 16 17:16:12 UTC 2009
Modified Files:
src/sys/arch/sparc/include: psl.h
Log Message:
Add memory clobbers to the inline assembler modifying/testing the %psr
register, to avoid the compiler reordering instructions out of critical
sections. Should fix PR port-sparc/41372.
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/sparc/include/psl.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc/include/psl.h
diff -u src/sys/arch/sparc/include/psl.h:1.44 src/sys/arch/sparc/include/psl.h:1.45
--- src/sys/arch/sparc/include/psl.h:1.44 Mon Feb 19 02:57:40 2007
+++ src/sys/arch/sparc/include/psl.h Sat May 16 17:16:12 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: psl.h,v 1.44 2007/02/19 02:57:40 mrg Exp $ */
+/* $NetBSD: psl.h,v 1.45 2009/05/16 17:16:12 martin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -252,7 +252,7 @@
static __inline void
setpsr(int newpsr)
{
- __asm volatile("wr %0,0,%%psr" : : "r" (newpsr));
+ __asm volatile("wr %0,0,%%psr" : : "r" (newpsr) : "memory");
__asm volatile("nop; nop; nop");
}
@@ -266,7 +266,7 @@
* which gives us the same value as the old psr but with all
* the old PIL bits turned off.
*/
- __asm volatile("rd %%psr,%0" : "=r" (psr));
+ __asm volatile("rd %%psr,%0" : "=r" (psr) : : "memory");
oldipl = psr & PSR_PIL;
__asm volatile("wr %0,%1,%%psr" : : "r" (psr), "r" (oldipl));
@@ -290,7 +290,7 @@
psr &= ~PSR_PIL; \
__asm volatile("wr %0,%1,%%psr" : : \
"r" (psr), "n" ((newipl) << 8)); \
- __asm volatile("nop; nop; nop"); \
+ __asm volatile("nop; nop; nop" : : : "memory"); \
}
_SPLSET(spllowerschedclock, IPL_SCHED)
@@ -324,7 +324,7 @@
psr = (psr & ~oldipl) | newipl;
__asm volatile("wr %0,0,%%psr" : : "r" (psr));
- __asm volatile("nop; nop; nop");
+ __asm volatile("nop; nop; nop" : : : "memory");
return (oldipl);
}
@@ -345,7 +345,7 @@
{
int psr;
- __asm volatile("rd %%psr,%0" : "=r" (psr));
+ __asm volatile("rd %%psr,%0" : "=r" (psr) : : "memory");
__asm volatile("wr %0,%1,%%psr" : : \
"r" (psr & ~PSR_PIL), "rn" (newipl));
__asm volatile("nop; nop; nop");
