Module Name: src
Committed By: tsutsui
Date: Mon Jul 20 17:05:13 UTC 2009
Modified Files:
src/sys/arch/pmax/pmax: autoconf.c bus_dma.c bus_space.c cpu.c
dec_3100.c dec_3max.c dec_3maxplus.c dec_3min.c dec_5100.c
dec_maxine.c disksubr.c mainbus.c memc.h memc_3max.c memc_3min.c
promcall.c
Log Message:
KNF, ANSIfy, and misc cosmetics.
To generate a diff of this commit:
cvs rdiff -u -r1.73 -r1.74 src/sys/arch/pmax/pmax/autoconf.c
cvs rdiff -u -r1.51 -r1.52 src/sys/arch/pmax/pmax/bus_dma.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/pmax/pmax/bus_space.c
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/pmax/pmax/cpu.c
cvs rdiff -u -r1.48 -r1.49 src/sys/arch/pmax/pmax/dec_3100.c
cvs rdiff -u -r1.49 -r1.50 src/sys/arch/pmax/pmax/dec_3max.c
cvs rdiff -u -r1.62 -r1.63 src/sys/arch/pmax/pmax/dec_3maxplus.c
cvs rdiff -u -r1.64 -r1.65 src/sys/arch/pmax/pmax/dec_3min.c
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/pmax/pmax/dec_5100.c
cvs rdiff -u -r1.57 -r1.58 src/sys/arch/pmax/pmax/dec_maxine.c
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/pmax/pmax/disksubr.c
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/pmax/pmax/mainbus.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/pmax/pmax/memc.h
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/pmax/pmax/memc_3max.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/pmax/pmax/memc_3min.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/pmax/pmax/promcall.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/pmax/pmax/autoconf.c
diff -u src/sys/arch/pmax/pmax/autoconf.c:1.73 src/sys/arch/pmax/pmax/autoconf.c:1.74
--- src/sys/arch/pmax/pmax/autoconf.c:1.73 Wed Mar 18 10:22:33 2009
+++ src/sys/arch/pmax/pmax/autoconf.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.c,v 1.73 2009/03/18 10:22:33 cegger Exp $ */
+/* $NetBSD: autoconf.c,v 1.74 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -77,7 +77,7 @@
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.73 2009/03/18 10:22:33 cegger Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.74 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -111,6 +111,7 @@
void
cpu_configure(void)
{
+
/* Kick off autoconfiguration. */
(void)splhigh();
@@ -185,6 +186,7 @@
void
cpu_rootconf(void)
{
+
printf("boot device: %s\n",
booted_device ? booted_device->dv_xname : "<unknown>");
Index: src/sys/arch/pmax/pmax/bus_dma.c
diff -u src/sys/arch/pmax/pmax/bus_dma.c:1.51 src/sys/arch/pmax/pmax/bus_dma.c:1.52
--- src/sys/arch/pmax/pmax/bus_dma.c:1.51 Sat Mar 14 21:04:14 2009
+++ src/sys/arch/pmax/pmax/bus_dma.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.51 2009/03/14 21:04:14 dsl Exp $ */
+/* $NetBSD: bus_dma.c,v 1.52 2009/07/20 17:05:13 tsutsui Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.51 2009/03/14 21:04:14 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.52 2009/07/20 17:05:13 tsutsui Exp $");
#include "opt_cputype.h"
@@ -90,7 +90,8 @@
* DMA map creation functions.
*/
int
-_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
+_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
+ bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
{
struct pmax_bus_dmamap *map;
void *mapstore;
@@ -127,7 +128,7 @@
map->dm_nsegs = 0;
*dmamp = map;
- return (0);
+ return 0;
}
/*
@@ -148,16 +149,8 @@
* first indicates if this is the first invocation of this function.
*/
static int
-_bus_dmamap_load_buffer(map, buf, buflen, vm, flags,
- lastaddrp, segp, first)
- bus_dmamap_t map;
- void *buf;
- bus_size_t buflen;
- struct vmspace *vm;
- int flags;
- vaddr_t *lastaddrp;
- int *segp;
- int first;
+_bus_dmamap_load_buffer(bus_dmamap_t map, void *buf, bus_size_t buflen,
+ struct vmspace *vm, int flags, vaddr_t *lastaddrp, int *segp, int first)
{
bus_size_t sgsize;
bus_addr_t curaddr, lastaddr, baddr, bmask;
@@ -231,9 +224,9 @@
* Did we fit?
*/
if (buflen != 0)
- return (EFBIG); /* XXX better return value here? */
+ return EFBIG; /* XXX better return value here? */
- return (0);
+ return 0;
}
/*
@@ -241,7 +234,8 @@
* buffer.
*/
int
-_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf, bus_size_t buflen, struct proc *p, int flags)
+_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
+ bus_size_t buflen, struct proc *p, int flags)
{
vaddr_t lastaddr;
int seg, error;
@@ -255,7 +249,7 @@
KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
if (buflen > map->_dm_size)
- return (EINVAL);
+ return EINVAL;
if (p != NULL) {
vm = p->p_vmspace;
@@ -281,14 +275,15 @@
buf < (void *)MIPS_KSEG2_START)
map->_dm_flags |= PMAX_DMAMAP_COHERENT;
}
- return (error);
+ return error;
}
/*
* Like _bus_dmamap_load(), but for mbufs.
*/
int
-_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0, int flags)
+_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
+ int flags)
{
vaddr_t lastaddr;
int seg, error, first;
@@ -324,14 +319,15 @@
map->dm_nsegs = seg + 1;
map->_dm_vmspace = vmspace_kernel(); /* always kernel */
}
- return (error);
+ return error;
}
/*
* Like _bus_dmamap_load(), but for uios.
*/
int
-_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio, int flags)
+_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
+ int flags)
{
vaddr_t lastaddr;
int seg, i, error, first;
@@ -371,14 +367,15 @@
map->dm_nsegs = seg + 1;
map->_dm_vmspace = uio->uio_vmspace;
}
- return (error);
+ return error;
}
/*
* Like _bus_dmamap_load(), but for raw memory.
*/
int
-_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map, bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
+_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map, bus_dma_segment_t *segs,
+ int nsegs, bus_size_t size, int flags)
{
panic("_bus_dmamap_load_raw: not implemented");
@@ -411,7 +408,8 @@
* This is the R3000 version.
*/
void
-_bus_dmamap_sync_r3k(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, bus_size_t len, int ops)
+_bus_dmamap_sync_r3k(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
+ bus_size_t len, int ops)
{
bus_size_t minlen;
bus_addr_t addr;
@@ -514,7 +512,8 @@
* This is the R4000 version.
*/
void
-_bus_dmamap_sync_r4k(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, bus_size_t len, int ops)
+_bus_dmamap_sync_r4k(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
+ bus_size_t len, int ops)
{
bus_size_t minlen;
bus_addr_t addr;
@@ -651,7 +650,9 @@
* by bus-specific DMA memory allocation functions.
*/
int
-_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags)
+_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
+ bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
+ int flags)
{
extern paddr_t avail_start, avail_end; /* XXX */
vaddr_t curaddr, lastaddr;
@@ -704,7 +705,7 @@
*rsegs = curseg + 1;
- return (0);
+ return 0;
}
/*
@@ -740,7 +741,8 @@
* bus-specific DMA memory map functions.
*/
int
-_bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size, void **kvap, int flags)
+_bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
+ size_t size, void **kvap, int flags)
{
vaddr_t va;
bus_addr_t addr;
@@ -757,7 +759,7 @@
*kvap = (void *)MIPS_PHYS_TO_KSEG1(segs[0].ds_addr);
else
*kvap = (void *)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
- return (0);
+ return 0;
}
size = round_page(size);
@@ -765,7 +767,7 @@
va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY | kmflags);
if (va == 0)
- return (ENOMEM);
+ return ENOMEM;
*kvap = (void *)va;
@@ -784,7 +786,7 @@
}
pmap_update(pmap_kernel());
- return (0);
+ return 0;
}
/*
@@ -819,7 +821,8 @@
* bus-specific DMA mmap(2)'ing functions.
*/
paddr_t
-_bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, off_t off, int prot, int flags)
+_bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, off_t off,
+ int prot, int flags)
{
int i;
@@ -838,9 +841,9 @@
continue;
}
- return (mips_btop(segs[i].ds_addr + off));
+ return mips_btop(segs[i].ds_addr + off);
}
/* Page not found. */
- return (-1);
+ return -1;
}
Index: src/sys/arch/pmax/pmax/bus_space.c
diff -u src/sys/arch/pmax/pmax/bus_space.c:1.6 src/sys/arch/pmax/pmax/bus_space.c:1.7
--- src/sys/arch/pmax/pmax/bus_space.c:1.6 Sat Mar 14 21:04:14 2009
+++ src/sys/arch/pmax/pmax/bus_space.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.6 2009/03/14 21:04:14 dsl Exp $ */
+/* $NetBSD: bus_space.c,v 1.7 2009/07/20 17:05:13 tsutsui Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.6 2009/03/14 21:04:14 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.7 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -44,7 +44,8 @@
/* ARGSUSED */
int
-bus_space_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp)
+bus_space_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags,
+ bus_space_handle_t *bshp)
{
int cacheable = flags & BUS_SPACE_MAP_CACHEABLE;
@@ -53,25 +54,20 @@
*bshp = MIPS_PHYS_TO_KSEG0(bpa);
else
*bshp = MIPS_PHYS_TO_KSEG1(bpa);
- return (0);
+ return 0;
}
/* ARGSUSED */
int
-bus_space_alloc(t, rstart, rend, size, alignment, boundary, flags,
- bpap, bshp)
- bus_space_tag_t t;
- bus_addr_t rstart, rend;
- bus_size_t size, alignment, boundary;
- int flags;
- bus_addr_t *bpap;
- bus_space_handle_t *bshp;
+bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart, bus_addr_t rend,
+ bus_size_t size, bus_size_t alignment, bus_size_t boundary,
+ int flags, bus_addr_t *bpap, bus_space_handle_t *bshp)
{
/*
* Not meaningful on any currently-supported DECstation bus.
*/
- return (EINVAL);
+ return EINVAL;
}
/* ARGSUSED */
@@ -94,9 +90,10 @@
/* ARGSUSED */
int
-bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
+bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
+ bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
{
*nbshp = bsh + offset;
- return (0);
+ return 0;
}
Index: src/sys/arch/pmax/pmax/cpu.c
diff -u src/sys/arch/pmax/pmax/cpu.c:1.27 src/sys/arch/pmax/pmax/cpu.c:1.28
--- src/sys/arch/pmax/pmax/cpu.c:1.27 Sat Mar 14 21:04:14 2009
+++ src/sys/arch/pmax/pmax/cpu.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.27 2009/03/14 21:04:14 dsl Exp $ */
+/* $NetBSD: cpu.c,v 1.28 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.27 2009/03/14 21:04:14 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.28 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -52,9 +52,9 @@
/* make sure that we're looking for a CPU. */
if (strcmp(ma->ma_name, cpu_cd.cd_name) != 0) {
- return (0);
+ return 0;
}
- return (1);
+ return 1;
}
static void
Index: src/sys/arch/pmax/pmax/dec_3100.c
diff -u src/sys/arch/pmax/pmax/dec_3100.c:1.48 src/sys/arch/pmax/pmax/dec_3100.c:1.49
--- src/sys/arch/pmax/pmax/dec_3100.c:1.48 Mon Jul 20 16:25:22 2009
+++ src/sys/arch/pmax/pmax/dec_3100.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: dec_3100.c,v 1.48 2009/07/20 16:25:22 tsutsui Exp $ */
+/* $NetBSD: dec_3100.c,v 1.49 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -105,7 +105,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: dec_3100.c,v 1.48 2009/07/20 16:25:22 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dec_3100.c,v 1.49 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -152,7 +152,7 @@
};
void
-dec_3100_init()
+dec_3100_init(void)
{
const char *submodel;
@@ -180,14 +180,15 @@
* Initialize the memory system and I/O buses.
*/
static void
-dec_3100_bus_reset()
+dec_3100_bus_reset(void)
{
+
/* nothing to do */
kn01_wbflush();
}
static void
-dec_3100_cons_init()
+dec_3100_cons_init(void)
{
int kbd, crt, screen;
@@ -222,11 +223,12 @@
intrtab[vvv].ih_count.ev_count++; \
(*intrtab[vvv].ih_func)(intrtab[vvv].ih_arg); \
} \
- } while (0)
+ } while (/*CONSTCOND*/0)
static void
-dec_3100_intr(unsigned status, unsigned cause, unsigned pc, unsigned ipending)
+dec_3100_intr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
{
+
/* handle clock interrupts ASAP */
if (ipending & MIPS_INT_MASK_3) {
struct clockframe cf;
@@ -258,7 +260,8 @@
static void
-dec_3100_intr_establish(struct device *dev, void *cookie, int level, int (*handler)(void *), void *arg)
+dec_3100_intr_establish(struct device *dev, void *cookie, int level,
+ int (*handler)(void *), void *arg)
{
intrtab[(int)cookie].ih_func = handler;
@@ -270,17 +273,17 @@
* Handle memory errors.
*/
static void
-dec_3100_errintr()
+dec_3100_errintr(void)
{
- u_int16_t csr;
+ uint16_t csr;
- csr = *(volatile u_int16_t *)MIPS_PHYS_TO_KSEG1(KN01_SYS_CSR);
+ csr = *(volatile uint16_t *)MIPS_PHYS_TO_KSEG1(KN01_SYS_CSR);
if (csr & KN01_CSR_MERR) {
printf("Memory error at 0x%x\n",
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN01_SYS_ERRADR));
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN01_SYS_ERRADR));
panic("Mem error interrupt");
}
csr = (csr & ~KN01_CSR_MBZ) | 0xff;
- *(volatile u_int16_t *)MIPS_PHYS_TO_KSEG1(KN01_SYS_CSR) = csr;
+ *(volatile uint16_t *)MIPS_PHYS_TO_KSEG1(KN01_SYS_CSR) = csr;
}
Index: src/sys/arch/pmax/pmax/dec_3max.c
diff -u src/sys/arch/pmax/pmax/dec_3max.c:1.49 src/sys/arch/pmax/pmax/dec_3max.c:1.50
--- src/sys/arch/pmax/pmax/dec_3max.c:1.49 Mon Jul 20 16:25:22 2009
+++ src/sys/arch/pmax/pmax/dec_3max.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: dec_3max.c,v 1.49 2009/07/20 16:25:22 tsutsui Exp $ */
+/* $NetBSD: dec_3max.c,v 1.50 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -106,7 +106,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: dec_3max.c,v 1.49 2009/07/20 16:25:22 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dec_3max.c,v 1.50 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -154,9 +154,9 @@
};
void
-dec_3max_init()
+dec_3max_init(void)
{
- u_int32_t csr;
+ uint32_t csr;
platform.iobus = "tcbus";
platform.bus_reset = dec_3max_bus_reset;
@@ -167,7 +167,7 @@
/* no high resolution timer available */
/* clear any memory errors */
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_ERRADR) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_ERRADR) = 0;
kn02_wbflush();
ipl2spl_table = dec_3max_ipl2spl_table;
@@ -179,9 +179,9 @@
* Enable ECC memory correction, turn off LEDs, and
* disable all TURBOchannel interrupts.
*/
- csr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
+ csr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
csr &= ~(KN02_CSR_WRESERVED|KN02_CSR_IOINTEN|KN02_CSR_CORRECT|0xff);
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR) = csr;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR) = csr;
kn02_wbflush();
strcpy(cpu_model, "DECstation 5000/200 (3MAX)");
@@ -191,21 +191,22 @@
* Initialize the memory system and I/O buses.
*/
static void
-dec_3max_bus_reset()
+dec_3max_bus_reset(void)
{
+
/*
* Reset interrupts, clear any errors from newconf probes
*/
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_ERRADR) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_ERRADR) = 0;
kn02_wbflush();
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CHKSYN) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CHKSYN) = 0;
kn02_wbflush();
}
static void
-dec_3max_cons_init()
+dec_3max_cons_init(void)
{
int kbd, crt, screen;
extern int tcfb_cnattach(int); /* XXX */
@@ -248,10 +249,11 @@
};
static void
-dec_3max_intr_establish(struct device *dev, void *cookie, int level, int (*handler)(void *), void *arg)
+dec_3max_intr_establish(struct device *dev, void *cookie, int level,
+ int (*handler)(void *), void *arg)
{
int i;
- u_int32_t csr;
+ uint32_t csr;
for (i = 0; i < sizeof(kn02intrs)/sizeof(kn02intrs[0]); i++) {
if (kn02intrs[i].cookie == (int)cookie)
@@ -263,10 +265,10 @@
intrtab[(int)cookie].ih_func = handler;
intrtab[(int)cookie].ih_arg = arg;
- csr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR) &
+ csr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR) &
0x00ffff00;
csr |= (kn02intrs[i].intrbit << 16);
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR) = csr;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR) = csr;
kn02_wbflush();
}
@@ -275,19 +277,19 @@
do { \
intrtab[vvv].ih_count.ev_count++; \
(*intrtab[vvv].ih_func)(intrtab[vvv].ih_arg); \
- } while (0)
+ } while (/*CONSTCOND*/0)
static void
-dec_3max_intr(unsigned status, unsigned cause, unsigned pc, unsigned ipending)
+dec_3max_intr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
{
static int warned = 0;
- u_int32_t csr;
+ uint32_t csr;
/* handle clock interrupts ASAP */
if (ipending & MIPS_INT_MASK_1) {
struct clockframe cf;
- csr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
+ csr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
if ((csr & KN02_CSR_PSWARN) && !warned) {
warned = 1;
printf("WARNING: power supply is overheating!\n");
@@ -311,7 +313,7 @@
_splset(MIPS_SR_INT_IE | (status & MIPS_INT_MASK_1));
if (ipending & MIPS_INT_MASK_0) {
- csr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
+ csr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
csr &= (csr >> KN02_CSR_IOINTEN_SHIFT);
if (csr & (KN02_IP_DZ | KN02_IP_LANCE | KN02_IP_SCSI)) {
if (csr & KN02_IP_DZ)
@@ -345,16 +347,16 @@
* XXX on double-error on clean user page, mark bad and reload frame?
*/
static void
-dec_3max_errintr()
+dec_3max_errintr(void)
{
- u_int32_t erradr, errsyn, csr;
+ uint32_t erradr, errsyn, csr;
/* Fetch error address, ECC chk/syn bits, clear interrupt */
- erradr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_ERRADR);
+ erradr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_ERRADR);
errsyn = MIPS_PHYS_TO_KSEG1(KN02_SYS_CHKSYN);
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_ERRADR) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_ERRADR) = 0;
kn02_wbflush();
- csr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
+ csr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN02_SYS_CSR);
/* Send to kn02/kn03 memory subsystem handler */
dec_mtasic_err(erradr, errsyn, csr & KN02_CSR_BNK32M);
Index: src/sys/arch/pmax/pmax/dec_3maxplus.c
diff -u src/sys/arch/pmax/pmax/dec_3maxplus.c:1.62 src/sys/arch/pmax/pmax/dec_3maxplus.c:1.63
--- src/sys/arch/pmax/pmax/dec_3maxplus.c:1.62 Mon Jul 20 16:25:22 2009
+++ src/sys/arch/pmax/pmax/dec_3maxplus.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: dec_3maxplus.c,v 1.62 2009/07/20 16:25:22 tsutsui Exp $ */
+/* $NetBSD: dec_3maxplus.c,v 1.63 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -106,7 +106,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: dec_3maxplus.c,v 1.62 2009/07/20 16:25:22 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dec_3maxplus.c,v 1.63 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -147,8 +147,8 @@
/*
* Local declarations
*/
-static u_int32_t kn03_tc3_imask;
-static unsigned latched_cycle_cnt;
+static uint32_t kn03_tc3_imask;
+static unsigned int latched_cycle_cnt;
static const int dec_3maxplus_ipl2spl_table[] = {
[IPL_NONE] = 0,
@@ -165,9 +165,9 @@
};
void
-dec_3maxplus_init()
+dec_3maxplus_init(void)
{
- u_int32_t prodtype;
+ uint32_t prodtype;
platform.iobus = "tcbus";
platform.bus_reset = dec_3maxplus_bus_reset;
@@ -179,7 +179,7 @@
platform.tc_init = dec_3maxplus_tc_init;
/* clear any memory errors */
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRADR) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRADR) = 0;
kn03_wbflush();
ioasic_base = MIPS_PHYS_TO_KSEG1(KN03_SYS_ASIC);
@@ -189,24 +189,24 @@
/* calibrate cpu_mhz value */
mc_cpuspeed(ioasic_base+IOASIC_SLOT_8_START, MIPS_INT_MASK_1);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_LANCE_DECODE) = 0x3;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_SCSI_DECODE) = 0xe;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_LANCE_DECODE) = 0x3;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_SCSI_DECODE) = 0xe;
#if 0
- *(volatile u_int32_t *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_SCC1_DECODE) = (0x10|6);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_CSR) = 0x00000f00;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_SCC1_DECODE) = (0x10|6);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_CSR) = 0x00000f00;
#endif
/* XXX hard-reset LANCE */
- *(volatile u_int32_t *)(ioasic_base + IOASIC_CSR) |= 0x100;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_CSR) |= 0x100;
/* sanitize interrupt mask */
kn03_tc3_imask = KN03_INTR_PSWARN;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR) = 0;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK) = kn03_tc3_imask;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = kn03_tc3_imask;
kn03_wbflush();
- prodtype = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN03_REG_INTR);
+ prodtype = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN03_REG_INTR);
prodtype &= KN03_INTR_PROD_JUMPER;
/* the bit persists even if INTR register is assigned value 0 */
if (prodtype)
@@ -221,21 +221,22 @@
* Initialize the memory system and I/O buses.
*/
static void
-dec_3maxplus_bus_reset()
+dec_3maxplus_bus_reset(void)
{
+
/*
* Reset interrupts, clear any errors from newconf probes
*/
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRADR) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRADR) = 0;
kn03_wbflush();
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR) = 0;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;
kn03_wbflush();
}
static void
-dec_3maxplus_cons_init()
+dec_3maxplus_cons_init(void)
{
int kbd, crt, screen;
@@ -263,34 +264,35 @@
}
static void
-dec_3maxplus_intr_establish(struct device *dev, void *cookie, int level, int (*handler)(void *), void *arg)
+dec_3maxplus_intr_establish(struct device *dev, void *cookie, int level,
+ int (*handler)(void *), void *arg)
{
- unsigned mask;
+ uint32_t mask;
switch ((int)cookie) {
- case SYS_DEV_OPT0:
+ case SYS_DEV_OPT0:
mask = KN03_INTR_TC_0;
break;
- case SYS_DEV_OPT1:
+ case SYS_DEV_OPT1:
mask = KN03_INTR_TC_1;
break;
- case SYS_DEV_OPT2:
+ case SYS_DEV_OPT2:
mask = KN03_INTR_TC_2;
break;
- case SYS_DEV_SCSI:
+ case SYS_DEV_SCSI:
mask = (IOASIC_INTR_SCSI | IOASIC_INTR_SCSI_PTR_LOAD |
IOASIC_INTR_SCSI_OVRUN | IOASIC_INTR_SCSI_READ_E);
break;
- case SYS_DEV_LANCE:
+ case SYS_DEV_LANCE:
mask = KN03_INTR_LANCE | IOASIC_INTR_LANCE_READ_E;
break;
- case SYS_DEV_SCC0:
+ case SYS_DEV_SCC0:
mask = KN03_INTR_SCC_0;
break;
- case SYS_DEV_SCC1:
+ case SYS_DEV_SCC1:
mask = KN03_INTR_SCC_1;
break;
- default:
+ default:
#ifdef DIAGNOSTIC
printf("warning: enabling unknown intr %x\n", (int)cookie);
#endif
@@ -301,7 +303,7 @@
intrtab[(int)cookie].ih_func = handler;
intrtab[(int)cookie].ih_arg = arg;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK) = kn03_tc3_imask;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = kn03_tc3_imask;
kn03_wbflush();
}
@@ -312,13 +314,14 @@
intrtab[vvv].ih_count.ev_count++; \
(*intrtab[vvv].ih_func)(intrtab[vvv].ih_arg); \
} \
- } while (0)
+ } while (/*CONSTCOND*/0)
static void
-dec_3maxplus_intr(unsigned status, unsigned cause, unsigned pc, unsigned ipending)
+dec_3maxplus_intr(uint32_t status, uint32_t cause, uint32_t pc,
+ uint32_t ipending)
{
static int warned = 0;
- unsigned old_buscycle;
+ unsigned int old_buscycle;
if (ipending & MIPS_INT_MASK_4)
prom_haltbutton();
@@ -358,14 +361,14 @@
#endif
if (ipending & MIPS_INT_MASK_0) {
int ifound;
- u_int32_t imsk, intr, can_serve, xxxintr;
+ uint32_t imsk, intr, can_serve, xxxintr;
do {
ifound = 0;
imsk =
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK);
intr =
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR);
can_serve = intr & imsk;
CHECKINTR(SYS_DEV_SCC0, IOASIC_INTR_SCC_0);
@@ -407,7 +410,7 @@
xxxintr = can_serve & (ERRORS | PTRLOAD);
if (xxxintr) {
ifound = 1;
- *(volatile u_int32_t *)
+ *(volatile uint32_t *)
(ioasic_base + IOASIC_INTR)
= intr &~ xxxintr;
}
@@ -427,24 +430,25 @@
* XXX on double-error on clean user page, mark bad and reload frame?
*/
static void
-dec_3maxplus_errintr()
+dec_3maxplus_errintr(void)
{
- u_int32_t erradr, errsyn, csr;
+ uint32_t erradr, errsyn, csr;
/* Fetch error address, ECC chk/syn bits, clear interrupt */
- erradr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRADR);
+ erradr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRADR);
errsyn = MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRSYN);
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRADR) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_ERRADR) = 0;
kn03_wbflush();
- csr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_CSR);
+ csr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN03_SYS_CSR);
/* Send to kn02/kn03 memory subsystem handler */
dec_mtasic_err(erradr, errsyn, csr & KN03_CSR_BNK32M);
}
static void
-kn03_wbflush()
+kn03_wbflush(void)
{
+
/* read once IOASIC SLOT 0 */
__asm volatile("lw $0,%0" :: "i"(0xbf840000));
}
@@ -453,10 +457,11 @@
* TURBOchannel bus-cycle counter provided by IOASIC; 25 MHz
*/
-static unsigned
+static u_int
dec_3maxplus_get_timecount(struct timecounter *tc)
{
- return *(volatile u_int32_t *)(ioasic_base + IOASIC_CTR);
+
+ return *(volatile uint32_t *)(ioasic_base + IOASIC_CTR);
}
static void
Index: src/sys/arch/pmax/pmax/dec_3min.c
diff -u src/sys/arch/pmax/pmax/dec_3min.c:1.64 src/sys/arch/pmax/pmax/dec_3min.c:1.65
--- src/sys/arch/pmax/pmax/dec_3min.c:1.64 Mon Jul 20 16:25:22 2009
+++ src/sys/arch/pmax/pmax/dec_3min.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: dec_3min.c,v 1.64 2009/07/20 16:25:22 tsutsui Exp $ */
+/* $NetBSD: dec_3min.c,v 1.65 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -106,7 +106,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: dec_3min.c,v 1.64 2009/07/20 16:25:22 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dec_3min.c,v 1.65 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -147,7 +147,7 @@
/*
* Local declarations.
*/
-static u_int32_t kmin_tc3_imask;
+static uint32_t kmin_tc3_imask;
static const int dec_3min_ipl2spl_table[] = {
[IPL_NONE] = 0,
@@ -165,8 +165,9 @@
};
void
-dec_3min_init()
+dec_3min_init(void)
{
+
platform.iobus = "tcbus";
platform.bus_reset = dec_3min_bus_reset;
platform.cons_init = dec_3min_cons_init;
@@ -176,7 +177,7 @@
platform.tc_init = dec_3min_tc_init;
/* clear any memory errors */
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_TIMEOUT) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_TIMEOUT) = 0;
kn02ba_wbflush();
ioasic_base = MIPS_PHYS_TO_KSEG1(KMIN_SYS_ASIC);
@@ -184,22 +185,22 @@
ipl2spl_table = dec_3min_ipl2spl_table;
/* enable posting of MIPS_INT_MASK_3 to CAUSE register */
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK) = KMIN_INTR_CLOCK;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = KMIN_INTR_CLOCK;
/* calibrate cpu_mhz value */
mc_cpuspeed(ioasic_base+IOASIC_SLOT_8_START, MIPS_INT_MASK_3);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_LANCE_DECODE) = 0x3;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_SCSI_DECODE) = 0xe;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_LANCE_DECODE) = 0x3;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_SCSI_DECODE) = 0xe;
#if 0
- *(volatile u_int32_t *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_SCC1_DECODE) = (0x10|6);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_CSR) = 0x00000f00;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_SCC1_DECODE) = (0x10|6);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_CSR) = 0x00000f00;
#endif
/* sanitize interrupt mask */
kmin_tc3_imask = (KMIN_INTR_CLOCK|KMIN_INTR_PSWARN|KMIN_INTR_TIMEOUT);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR) = 0;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK) = kmin_tc3_imask;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = kmin_tc3_imask;
/*
* The kmin memory hardware seems to wrap memory addresses
@@ -210,7 +211,7 @@
*/
physmem_boardmax = KMIN_PHYS_MEMORY_END + 1;
if ((KMIN_MSR_SIZE_16Mb & *(int *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MSR))
- == 0)
+ == 0)
physmem_boardmax = physmem_boardmax >> 2;
physmem_boardmax = MIPS_PHYS_TO_KSEG1(physmem_boardmax);
@@ -221,22 +222,22 @@
* Initialize the memory system and I/O buses.
*/
static void
-dec_3min_bus_reset()
+dec_3min_bus_reset(void)
{
/*
* Reset interrupts, clear any errors from newconf probes
*/
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_TIMEOUT) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_TIMEOUT) = 0;
kn02ba_wbflush();
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR) = 0;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;
kn02ba_wbflush();
}
static void
-dec_3min_cons_init()
+dec_3min_cons_init(void)
{
int kbd, crt, screen;
@@ -264,36 +265,37 @@
}
static void
-dec_3min_intr_establish(struct device *dev, void *cookie, int level, int (*handler)(void *), void *arg)
+dec_3min_intr_establish(struct device *dev, void *cookie, int level,
+ int (*handler)(void *), void *arg)
{
- unsigned mask;
+ uint32_t mask;
switch ((int)cookie) {
/* slots 0-2 don't interrupt through the IOASIC. */
- case SYS_DEV_OPT0:
+ case SYS_DEV_OPT0:
mask = MIPS_INT_MASK_0;
break;
- case SYS_DEV_OPT1:
+ case SYS_DEV_OPT1:
mask = MIPS_INT_MASK_1;
break;
- case SYS_DEV_OPT2:
+ case SYS_DEV_OPT2:
mask = MIPS_INT_MASK_2;
break;
- case SYS_DEV_SCSI:
+ case SYS_DEV_SCSI:
mask = (IOASIC_INTR_SCSI | IOASIC_INTR_SCSI_PTR_LOAD |
IOASIC_INTR_SCSI_OVRUN | IOASIC_INTR_SCSI_READ_E);
break;
- case SYS_DEV_LANCE:
+ case SYS_DEV_LANCE:
mask = KMIN_INTR_LANCE;
break;
- case SYS_DEV_SCC0:
+ case SYS_DEV_SCC0:
mask = KMIN_INTR_SCC_0;
break;
- case SYS_DEV_SCC1:
+ case SYS_DEV_SCC1:
mask = KMIN_INTR_SCC_1;
break;
- default:
+ default:
#ifdef DIAGNOSTIC
printf("warning: enabling unknown intr %x\n", (int)cookie);
#endif
@@ -335,7 +337,7 @@
break;
}
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK) = kmin_tc3_imask;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = kmin_tc3_imask;
kn02ba_wbflush();
}
@@ -346,17 +348,17 @@
intrtab[slot].ih_count.ev_count++; \
(*intrtab[slot].ih_func)(intrtab[slot].ih_arg); \
} \
- } while (0)
+ } while (/*CONSTCOND*/0)
static void
-dec_3min_intr(unsigned status, unsigned cause, unsigned pc, unsigned ipending)
+dec_3min_intr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
{
static int user_warned = 0;
static int intr_depth = 0;
- u_int32_t old_mask;
+ uint32_t old_mask;
intr_depth++;
- old_mask = *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK);
+ old_mask = *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK);
if (ipending & MIPS_INT_MASK_4)
prom_haltbutton();
@@ -364,11 +366,11 @@
if (ipending & MIPS_INT_MASK_3) {
/* NB: status & MIPS_INT_MASK3 must also be set */
/* masked interrupts are still observable */
- u_int32_t intr, imsk, can_serve, turnoff;
+ uint32_t intr, imsk, can_serve, turnoff;
turnoff = 0;
- intr = *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR);
- imsk = *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK);
+ intr = *(volatile uint32_t *)(ioasic_base + IOASIC_INTR);
+ imsk = *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK);
can_serve = intr & imsk;
if (intr & IOASIC_INTR_SCSI_PTR_LOAD) {
@@ -379,13 +381,15 @@
}
if (intr & (IOASIC_INTR_SCSI_OVRUN | IOASIC_INTR_SCSI_READ_E))
- turnoff |= IOASIC_INTR_SCSI_OVRUN | IOASIC_INTR_SCSI_READ_E;
+ turnoff |=
+ IOASIC_INTR_SCSI_OVRUN | IOASIC_INTR_SCSI_READ_E;
if (intr & IOASIC_INTR_LANCE_READ_E)
turnoff |= IOASIC_INTR_LANCE_READ_E;
if (turnoff)
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR) = ~turnoff;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR) =
+ ~turnoff;
if (intr & KMIN_INTR_TIMEOUT) {
kn02ba_errintr();
@@ -407,7 +411,7 @@
/* If clock interrupts were enabled, re-enable them ASAP. */
if (old_mask & KMIN_INTR_CLOCK) {
/* ioctl interrupt mask to splclock and higher */
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK)
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK)
= old_mask &
~(KMIN_INTR_SCC_0|KMIN_INTR_SCC_1 |
IOASIC_INTR_LANCE|IOASIC_INTR_SCSI);
@@ -465,7 +469,7 @@
/* restore entry state */
splhigh();
intr_depth--;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK) = old_mask;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = old_mask;
_splset(MIPS_SR_INT_IE | (status & ~cause & MIPS_HARD_INT_MASK));
}
@@ -479,8 +483,9 @@
*/
static void
-kn02ba_wbflush()
+kn02ba_wbflush(void)
{
+
/* read twice IOASIC_IMSK */
__asm volatile("lw $0,%0; lw $0,%0" ::
"i"(MIPS_PHYS_TO_KSEG1(KMIN_REG_IMSK)));
Index: src/sys/arch/pmax/pmax/dec_5100.c
diff -u src/sys/arch/pmax/pmax/dec_5100.c:1.43 src/sys/arch/pmax/pmax/dec_5100.c:1.44
--- src/sys/arch/pmax/pmax/dec_5100.c:1.43 Mon Mar 16 23:11:14 2009
+++ src/sys/arch/pmax/pmax/dec_5100.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: dec_5100.c,v 1.43 2009/03/16 23:11:14 dsl Exp $ */
+/* $NetBSD: dec_5100.c,v 1.44 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: dec_5100.c,v 1.43 2009/03/16 23:11:14 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dec_5100.c,v 1.44 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -73,8 +73,9 @@
};
void
-dec_5100_init()
+dec_5100_init(void)
{
+
platform.iobus = "baseboard";
platform.bus_reset = dec_5100_bus_reset;
platform.cons_init = dec_5100_cons_init;
@@ -98,22 +99,23 @@
* Initialize the memory system and I/O buses.
*/
static void
-dec_5100_bus_reset()
+dec_5100_bus_reset(void)
{
- u_int32_t icsr;
+ uint32_t icsr;
/* clear any memory error condition */
- icsr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR);
+ icsr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR);
icsr |= KN230_CSR_INTR_WMERR;
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR) = icsr;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR) = icsr;
/* nothing else to do */
kn230_wbflush();
}
static void
-dec_5100_cons_init()
+dec_5100_cons_init(void)
{
+
/*
* Delay to allow PROM putchars to complete.
* FIFO depth * character time,
@@ -126,7 +128,8 @@
}
static void
-dec_5100_intr_establish(struct device *dev, void *cookie, int level, int (*handler)(void *), void *arg)
+dec_5100_intr_establish(struct device *dev, void *cookie, int level,
+ int (*handler)(void *), void *arg)
{
intrtab[(int)cookie].ih_func = handler;
@@ -140,12 +143,12 @@
(*intrtab[vvv].ih_func)(intrtab[vvv].ih_arg); \
intrtab[vvv].ih_count.ev_count++; \
} \
- } while (0)
+ } while (/*CONSTCOND*/0)
static void
-dec_5100_intr(unsigned status, unsigned cause, unsigned pc, unsigned ipending)
+dec_5100_intr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
{
- u_int32_t icsr;
+ uint32_t icsr;
if (ipending & MIPS_INT_MASK_4) {
#ifdef DDB
@@ -155,7 +158,7 @@
#endif
}
- icsr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR);
+ icsr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR);
/* handle clock interrupts ASAP */
if (ipending & MIPS_INT_MASK_2) {
@@ -203,14 +206,14 @@
* XXX drain writebuffer on contextswitch to avoid panic?
*/
static void
-dec_5100_memintr()
+dec_5100_memintr(void)
{
- u_int32_t icsr;
+ uint32_t icsr;
/* read icsr and clear error */
- icsr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR);
+ icsr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR);
icsr |= KN230_CSR_INTR_WMERR;
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR) = icsr;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KN230_SYS_ICSR) = icsr;
kn230_wbflush();
#ifdef DIAGNOSTIC
@@ -223,8 +226,7 @@
if (icsr & KN230_CSR_INTR_WMERR) {
panic("write to non-existent memory");
- }
- else {
+ } else {
panic("stray memory error interrupt");
}
}
Index: src/sys/arch/pmax/pmax/dec_maxine.c
diff -u src/sys/arch/pmax/pmax/dec_maxine.c:1.57 src/sys/arch/pmax/pmax/dec_maxine.c:1.58
--- src/sys/arch/pmax/pmax/dec_maxine.c:1.57 Mon Jul 20 16:25:22 2009
+++ src/sys/arch/pmax/pmax/dec_maxine.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: dec_maxine.c,v 1.57 2009/07/20 16:25:22 tsutsui Exp $ */
+/* $NetBSD: dec_maxine.c,v 1.58 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -106,7 +106,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: dec_maxine.c,v 1.57 2009/07/20 16:25:22 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dec_maxine.c,v 1.58 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -145,7 +145,7 @@
/*
* local declarations
*/
-static u_int32_t xine_tc3_imask;
+static uint32_t xine_tc3_imask;
static const int dec_maxine_ipl2spl_table[] = {
[IPL_NONE] = 0,
@@ -164,6 +164,7 @@
void
dec_maxine_init(void)
{
+
platform.iobus = "tcbus";
platform.bus_reset = dec_maxine_bus_reset;
platform.cons_init = dec_maxine_cons_init;
@@ -174,7 +175,7 @@
/* MAXINE has 1 microsec. free-running high resolution timer */
/* clear any memory errors */
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(XINE_REG_TIMEOUT) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(XINE_REG_TIMEOUT) = 0;
kn02ca_wbflush();
ioasic_base = MIPS_PHYS_TO_KSEG1(XINE_SYS_ASIC);
@@ -184,19 +185,19 @@
/* calibrate cpu_mhz value */
mc_cpuspeed(ioasic_base+IOASIC_SLOT_8_START, MIPS_INT_MASK_1);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_LANCE_DECODE) = 0x3;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_SCSI_DECODE) = 0xe;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_LANCE_DECODE) = 0x3;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_SCSI_DECODE) = 0xe;
#if 0
- *(volatile u_int32_t *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
- *(volatile u_int32_t *)(ioasic_base + IOASIC_DTOP_DECODE) = 10;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_FLOPPY_DECODE) = 13;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_CSR) = 0x00001fc1;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_SCC0_DECODE) = (0x10|4);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_DTOP_DECODE) = 10;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_FLOPPY_DECODE) = 13;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_CSR) = 0x00001fc1;
#endif
/* sanitize interrupt mask */
xine_tc3_imask = 0;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR) = 0;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK) = xine_tc3_imask;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = xine_tc3_imask;
kn02ca_wbflush();
sprintf(cpu_model, "Personal DECstation 5000/%d (MAXINE)", cpu_mhz);
@@ -208,14 +209,15 @@
static void
dec_maxine_bus_reset(void)
{
+
/*
* Reset interrupts, clear any errors from newconf probes
*/
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(XINE_REG_TIMEOUT) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(XINE_REG_TIMEOUT) = 0;
kn02ca_wbflush();
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR) = 0;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;
kn02ca_wbflush();
}
@@ -256,38 +258,39 @@
}
static void
-dec_maxine_intr_establish(struct device *dev, void *cookie, int level, int (*handler)(void *), void *arg)
+dec_maxine_intr_establish(struct device *dev, void *cookie, int level,
+ int (*handler)(void *), void *arg)
{
- unsigned mask;
+ uint32_t mask;
switch ((int)cookie) {
- case SYS_DEV_OPT0:
+ case SYS_DEV_OPT0:
mask = XINE_INTR_TC_0;
break;
- case SYS_DEV_OPT1:
+ case SYS_DEV_OPT1:
mask = XINE_INTR_TC_1;
break;
- case SYS_DEV_FDC:
+ case SYS_DEV_FDC:
mask = XINE_INTR_FLOPPY;
break;
- case SYS_DEV_SCSI:
+ case SYS_DEV_SCSI:
mask = (IOASIC_INTR_SCSI | IOASIC_INTR_SCSI_PTR_LOAD |
IOASIC_INTR_SCSI_OVRUN | IOASIC_INTR_SCSI_READ_E);
break;
- case SYS_DEV_LANCE:
+ case SYS_DEV_LANCE:
mask = IOASIC_INTR_LANCE;
break;
- case SYS_DEV_SCC0:
+ case SYS_DEV_SCC0:
mask = IOASIC_INTR_SCC_0;
break;
- case SYS_DEV_DTOP:
+ case SYS_DEV_DTOP:
mask = XINE_INTR_DTOP_RX;
break;
- case SYS_DEV_ISDN:
+ case SYS_DEV_ISDN:
mask = (IOASIC_INTR_ISDN_TXLOAD | IOASIC_INTR_ISDN_RXLOAD |
IOASIC_INTR_ISDN_OVRUN);
break;
- default:
+ default:
#ifdef DIAGNOSTIC
printf("warning: enabling unknown intr %x\n", (int)cookie);
#endif
@@ -298,7 +301,7 @@
intrtab[(int)cookie].ih_func = handler;
intrtab[(int)cookie].ih_arg = arg;
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK) = xine_tc3_imask;
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK) = xine_tc3_imask;
kn02ca_wbflush();
}
@@ -309,11 +312,12 @@
intrtab[vvv].ih_count.ev_count++; \
(*intrtab[vvv].ih_func)(intrtab[vvv].ih_arg); \
} \
- } while (0)
+ } while (/*CONSTCOND*/0)
static void
-dec_maxine_intr(unsigned status, unsigned cause, unsigned pc, unsigned ipending)
+dec_maxine_intr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
{
+
if (ipending & MIPS_INT_MASK_4)
prom_haltbutton();
@@ -336,14 +340,14 @@
if (ipending & MIPS_INT_MASK_3) {
int ifound;
- u_int32_t imsk, intr, can_serve, xxxintr;
+ uint32_t imsk, intr, can_serve, xxxintr;
do {
ifound = 0;
intr =
- *(volatile u_int32_t *)(ioasic_base + IOASIC_INTR);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_INTR);
imsk =
- *(volatile u_int32_t *)(ioasic_base + IOASIC_IMSK);
+ *(volatile uint32_t *)(ioasic_base + IOASIC_IMSK);
can_serve = intr & imsk;
CHECKINTR(SYS_DEV_DTOP, XINE_INTR_DTOP);
@@ -351,7 +355,8 @@
CHECKINTR(SYS_DEV_LANCE, IOASIC_INTR_LANCE);
CHECKINTR(SYS_DEV_SCSI, IOASIC_INTR_SCSI);
/* CHECKINTR(SYS_DEV_OPT2, XINE_INTR_VINT); */
- CHECKINTR(SYS_DEV_ISDN, (IOASIC_INTR_ISDN_TXLOAD | IOASIC_INTR_ISDN_RXLOAD));
+ CHECKINTR(SYS_DEV_ISDN,
+ IOASIC_INTR_ISDN_TXLOAD | IOASIC_INTR_ISDN_RXLOAD);
/* CHECKINTR(SYS_DEV_FDC, IOASIC_INTR_FDC); */
CHECKINTR(SYS_DEV_OPT1, XINE_INTR_TC_1);
CHECKINTR(SYS_DEV_OPT0, XINE_INTR_TC_0);
@@ -379,7 +384,7 @@
xxxintr = can_serve & (ERRORS | PTRLOAD);
if (xxxintr) {
ifound = 1;
- *(volatile u_int32_t *)
+ *(volatile uint32_t *)
(ioasic_base + IOASIC_INTR)
= intr &~ xxxintr;
}
@@ -394,17 +399,19 @@
}
static void
-kn02ca_wbflush()
+kn02ca_wbflush(void)
{
+
/* read once IOASIC_IMSK */
__asm volatile("lw $0,%0" ::
"i"(MIPS_PHYS_TO_KSEG1(XINE_REG_IMSK)));
}
-static uint32_t
+static u_int
dec_maxine_get_timecount(struct timecounter *tc)
{
- return *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(XINE_REG_FCTR);
+
+ return *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(XINE_REG_FCTR);
}
static void
Index: src/sys/arch/pmax/pmax/disksubr.c
diff -u src/sys/arch/pmax/pmax/disksubr.c:1.52 src/sys/arch/pmax/pmax/disksubr.c:1.53
--- src/sys/arch/pmax/pmax/disksubr.c:1.52 Mon Mar 16 23:11:14 2009
+++ src/sys/arch/pmax/pmax/disksubr.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: disksubr.c,v 1.52 2009/03/16 23:11:14 dsl Exp $ */
+/* $NetBSD: disksubr.c,v 1.53 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1982, 1986, 1988 Regents of the University of California.
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: disksubr.c,v 1.52 2009/03/16 23:11:14 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disksubr.c,v 1.53 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -56,7 +56,8 @@
* Returns null on success and an error string on failure.
*/
const char *
-readdisklabel(dev_t dev, void (*strat)(struct buf *bp), struct disklabel *lp, struct cpu_disklabel *osdep)
+readdisklabel(dev_t dev, void (*strat)(struct buf *bp), struct disklabel *lp,
+ struct cpu_disklabel *osdep)
{
struct buf *bp;
struct disklabel *dlp;
@@ -107,7 +108,7 @@
}
}
/* XXX If no NetBSD label or Ultrix label found, generate default label here */
- return (msg);
+ return msg;
}
/*
@@ -115,7 +116,8 @@
* putting the partition info into a native NetBSD label
*/
const char *
-compat_label(dev_t dev, void (*strat)(struct buf *bp), struct disklabel *lp, struct cpu_disklabel *osdep)
+compat_label(dev_t dev, void (*strat)(struct buf *bp), struct disklabel *lp,
+ struct cpu_disklabel *osdep)
{
dec_disklabel *dlp;
struct buf *bp = NULL;
@@ -163,8 +165,10 @@
part <((MAXPARTITIONS<DEC_NUM_DISK_PARTS) ?
MAXPARTITIONS : DEC_NUM_DISK_PARTS);
part++) {
- lp->d_partitions[part].p_size = dlp->map[part].num_blocks;
- lp->d_partitions[part].p_offset = dlp->map[part].start_block;
+ lp->d_partitions[part].p_size =
+ dlp->map[part].num_blocks;
+ lp->d_partitions[part].p_offset =
+ dlp->map[part].start_block;
lp->d_partitions[part].p_fsize = 1024;
lp->d_partitions[part].p_fstype =
(part==1) ? FS_SWAP : FS_BSDFFS;
@@ -182,7 +186,7 @@
done:
brelse(bp, 0);
- return (msg);
+ return msg;
}
/*
@@ -190,23 +194,24 @@
* before setting it.
*/
int
-setdisklabel(struct disklabel *olp, struct disklabel *nlp, u_long openmask, struct cpu_disklabel *osdep)
+setdisklabel(struct disklabel *olp, struct disklabel *nlp, u_long openmask,
+ struct cpu_disklabel *osdep)
{
int i;
struct partition *opp, *npp;
if (nlp->d_magic != DISKMAGIC || nlp->d_magic2 != DISKMAGIC ||
dkcksum(nlp) != 0)
- return (EINVAL);
+ return EINVAL;
while ((i = ffs(openmask)) != 0) {
i--;
openmask &= ~(1 << i);
if (nlp->d_npartitions <= i)
- return (EBUSY);
+ return EBUSY;
opp = &olp->d_partitions[i];
npp = &nlp->d_partitions[i];
if (npp->p_offset != opp->p_offset || npp->p_size < opp->p_size)
- return (EBUSY);
+ return EBUSY;
/*
* Copy internally-set partition information
* if new label doesn't include it. XXX
@@ -221,14 +226,15 @@
nlp->d_checksum = 0;
nlp->d_checksum = dkcksum(nlp);
*olp = *nlp;
- return (0);
+ return 0;
}
/*
* Write disk label back to device after modification.
*/
int
-writedisklabel(dev_t dev, void (*strat)(struct buf *bp), struct disklabel *lp, struct cpu_disklabel *osdep)
+writedisklabel(dev_t dev, void (*strat)(struct buf *bp), struct disklabel *lp,
+ struct cpu_disklabel *osdep)
{
struct buf *bp;
struct disklabel *dlp;
@@ -238,7 +244,7 @@
labelpart = DISKPART(dev);
if (lp->d_partitions[labelpart].p_offset != 0) {
if (lp->d_partitions[0].p_offset != 0)
- return (EXDEV); /* not quite right */
+ return EXDEV; /* not quite right */
labelpart = 0;
}
bp = geteblk((int)lp->d_secsize);
@@ -267,5 +273,5 @@
error = ESRCH;
done:
brelse(bp, 0);
- return (error);
+ return error;
}
Index: src/sys/arch/pmax/pmax/mainbus.c
diff -u src/sys/arch/pmax/pmax/mainbus.c:1.38 src/sys/arch/pmax/pmax/mainbus.c:1.39
--- src/sys/arch/pmax/pmax/mainbus.c:1.38 Sat Mar 14 15:36:11 2009
+++ src/sys/arch/pmax/pmax/mainbus.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: mainbus.c,v 1.38 2009/03/14 15:36:11 dsl Exp $ */
+/* $NetBSD: mainbus.c,v 1.39 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.38 2009/03/14 15:36:11 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.39 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -53,9 +53,9 @@
{
if (mainbus_found)
- return (0);
+ return 0;
- return (1);
+ return 1;
}
int ncpus = 0; /* only support uniprocessors, for now */
@@ -90,6 +90,6 @@
{
if (pnp)
- return (QUIET);
- return (UNCONF);
+ return QUIET;
+ return UNCONF;
}
Index: src/sys/arch/pmax/pmax/memc.h
diff -u src/sys/arch/pmax/pmax/memc.h:1.4 src/sys/arch/pmax/pmax/memc.h:1.5
--- src/sys/arch/pmax/pmax/memc.h:1.4 Sat Mar 14 14:46:04 2009
+++ src/sys/arch/pmax/pmax/memc.h Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: memc.h,v 1.4 2009/03/14 14:46:04 dsl Exp $ */
+/* $NetBSD: memc.h,v 1.5 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -35,8 +35,7 @@
#ifndef __PMAX_MEMC_H
#define __PMAX_MEMC_H
-void dec_mtasic_err(u_int32_t erradr, u_int32_t errsyn,
- u_int32_t bnk32m);
+void dec_mtasic_err(uint32_t erradr, uint32_t errsyn, uint32_t bnk32m);
void kn02ba_errintr(void);
#endif
Index: src/sys/arch/pmax/pmax/memc_3max.c
diff -u src/sys/arch/pmax/pmax/memc_3max.c:1.14 src/sys/arch/pmax/pmax/memc_3max.c:1.15
--- src/sys/arch/pmax/pmax/memc_3max.c:1.14 Sat Mar 14 21:04:14 2009
+++ src/sys/arch/pmax/pmax/memc_3max.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: memc_3max.c,v 1.14 2009/03/14 21:04:14 dsl Exp $ */
+/* $NetBSD: memc_3max.c,v 1.15 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -32,7 +32,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: memc_3max.c,v 1.14 2009/03/14 21:04:14 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: memc_3max.c,v 1.15 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -49,9 +49,9 @@
void
-dec_mtasic_err(u_int32_t erradr, u_int32_t errsyn, u_int32_t bnk32m)
+dec_mtasic_err(uint32_t erradr, uint32_t errsyn, uint32_t bnk32m)
{
- u_int32_t physadr;
+ uint32_t physadr;
int module;
if (!(erradr & KN02_ERR_VALID))
@@ -79,8 +79,8 @@
}
printf("\n");
if (erradr & KN02_ERR_ECCERR) {
- u_int32_t errsyn_value = *(u_int32_t *)errsyn;
- *(u_int32_t *)errsyn = 0;
+ uint32_t errsyn_value = *(uint32_t *)errsyn;
+ *(uint32_t *)errsyn = 0;
wbflush();
printf(" ECC 0x%08x\n", errsyn_value);
Index: src/sys/arch/pmax/pmax/memc_3min.c
diff -u src/sys/arch/pmax/pmax/memc_3min.c:1.11 src/sys/arch/pmax/pmax/memc_3min.c:1.12
--- src/sys/arch/pmax/pmax/memc_3min.c:1.11 Mon Jul 20 16:45:50 2009
+++ src/sys/arch/pmax/pmax/memc_3min.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: memc_3min.c,v 1.11 2009/07/20 16:45:50 tsutsui Exp $ */
+/* $NetBSD: memc_3min.c,v 1.12 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -79,7 +79,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: memc_3min.c,v 1.11 2009/07/20 16:45:50 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: memc_3min.c,v 1.12 2009/07/20 17:05:13 tsutsui Exp $");
/*
* Motherboard memory error contoller used in both
@@ -105,12 +105,12 @@
int mer, adr, siz, err;
static int errintr_cnt = 0;
- siz = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MSR);
- mer = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MER);
- adr = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_AER);
+ siz = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MSR);
+ mer = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MER);
+ adr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_AER);
/* clear interrupt bit */
- *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_TIMEOUT) = 0;
+ *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_TIMEOUT) = 0;
err = 0; /* XXX gcc */
switch (mer & KMIN_MER_LASTBYTE) {
Index: src/sys/arch/pmax/pmax/promcall.c
diff -u src/sys/arch/pmax/pmax/promcall.c:1.16 src/sys/arch/pmax/pmax/promcall.c:1.17
--- src/sys/arch/pmax/pmax/promcall.c:1.16 Wed Mar 18 17:06:46 2009
+++ src/sys/arch/pmax/pmax/promcall.c Mon Jul 20 17:05:13 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: promcall.c,v 1.16 2009/03/18 17:06:46 cegger Exp $ */
+/* $NetBSD: promcall.c,v 1.17 2009/07/20 17:05:13 tsutsui Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -77,7 +77,7 @@
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: promcall.c,v 1.16 2009/03/18 17:06:46 cegger Exp $");
+__KERNEL_RCSID(0, "$NetBSD: promcall.c,v 1.17 2009/07/20 17:05:13 tsutsui Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -194,15 +194,16 @@
char *
prom_getenv(const char *name)
{
+
return (*callv->_getenv)(name);
}
/*
* Get 32bit system type of Digital hardware.
- * cputype, u_int8_t [3]
- * systype, u_int8_t [2]
- * firmware revision, u_int8_t [1]
- * hardware revision. u_int8_t [0]
+ * cputype, uint8_t [3]
+ * systype, uint8_t [2]
+ * firmware revision, uint8_t [1]
+ * hardware revision. uint8_t [0]
*/
int
prom_systype(void)
@@ -221,19 +222,21 @@
void
prom_haltbutton(void)
{
+
(*callv->_halt)((int *)0, 0);
}
/*
* Halt/reboot machine.
*/
-void __attribute__((__noreturn__))
+void __dead
prom_halt(int howto, char *bootstr)
{
+
if (callv != &callvec)
(*callv->_rex)((howto & RB_HALT) ? 'h' : 'b');
else {
- void __attribute__((__noreturn__)) (*f)(void);
+ void __dead (*f)(void);
f = (howto & RB_HALT)
? (void *)DEC_PROM_REINIT
@@ -269,18 +272,18 @@
int len;
if (callv->_getbitmap != NULL)
- return (callv->_getbitmap(map));
+ return callv->_getbitmap(map);
/*
* See if we can get the bitmap from the environment variables
*/
cp = prom_getenv("bitmaplen");
if (cp == NULL)
- return (0);
+ return 0;
len = (int)strtoul(cp, NULL, 0) * 4;
cp = prom_getenv("bitmap");
if (cp == NULL)
- return (0);
- memcpy( &map->bitmap, (char *)strtoul(cp, NULL, 0), len);
+ return 0;
+ memcpy(&map->bitmap, (char *)strtoul(cp, NULL, 0), len);
map->pagesize = 4096;
- return (len);
+ return len;
}
