Module Name: src Committed By: riastradh Date: Mon Aug 27 07:28:57 UTC 2018
Modified Files: src/sys/external/bsd/drm2/dist/drm/i915: intel_psr.c Log Message: Do not meddle in the affairs of strict aliasing, for it is quick to anger and you are tasty with a bit of mustard on your undefined behaviour. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/external/bsd/drm2/dist/drm/i915/intel_psr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/external/bsd/drm2/dist/drm/i915/intel_psr.c diff -u src/sys/external/bsd/drm2/dist/drm/i915/intel_psr.c:1.4 src/sys/external/bsd/drm2/dist/drm/i915/intel_psr.c:1.5 --- src/sys/external/bsd/drm2/dist/drm/i915/intel_psr.c:1.4 Mon Aug 27 07:28:41 2018 +++ src/sys/external/bsd/drm2/dist/drm/i915/intel_psr.c Mon Aug 27 07:28:57 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: intel_psr.c,v 1.4 2018/08/27 07:28:41 riastradh Exp $ */ +/* $NetBSD: intel_psr.c,v 1.5 2018/08/27 07:28:57 riastradh Exp $ */ /* * Copyright © 2014 Intel Corporation @@ -54,7 +54,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: intel_psr.c,v 1.4 2018/08/27 07:28:41 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: intel_psr.c,v 1.5 2018/08/27 07:28:57 riastradh Exp $"); #include <drm/drmP.h> @@ -86,7 +86,8 @@ static void intel_psr_write_vsc(struct i struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc); enum transcoder cpu_transcoder = crtc->config->cpu_transcoder; u32 ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); - uint32_t *data = (uint32_t *) vsc_psr; + uint32_t data; + const char *ptr = (const char *)vsc_psr; unsigned int i; /* As per BSPec (Pipe Video Data Island Packet), we need to disable @@ -96,9 +97,9 @@ static void intel_psr_write_vsc(struct i POSTING_READ(ctl_reg); for (i = 0; i < sizeof(*vsc_psr); i += 4) { - I915_WRITE(HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, - i >> 2), *data); - data++; + memcpy(&data, &ptr[i], 4); + I915_WRITE(HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i >> 2), + data); } for (; i < VIDEO_DIP_VSC_DATA_SIZE; i += 4) I915_WRITE(HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder,