Module Name: src
Committed By: skrll
Date: Sun Sep 30 10:34:38 UTC 2018
Modified Files:
src/sys/arch/arm/cortex: gtmr.c
Log Message:
If we're going to allow pl0 to access virtual and physical counters then
we should allow it from all CPUs.
kern/53630 (openssl fallout on arm)
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/cortex/gtmr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gtmr.c
diff -u src/sys/arch/arm/cortex/gtmr.c:1.35 src/sys/arch/arm/cortex/gtmr.c:1.36
--- src/sys/arch/arm/cortex/gtmr.c:1.35 Sun Sep 16 13:21:36 2018
+++ src/sys/arch/arm/cortex/gtmr.c Sun Sep 30 10:34:38 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: gtmr.c,v 1.35 2018/09/16 13:21:36 jmcneill Exp $ */
+/* $NetBSD: gtmr.c,v 1.36 2018/09/30 10:34:38 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.35 2018/09/16 13:21:36 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.36 2018/09/30 10:34:38 skrll Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -120,12 +120,6 @@ gtmr_attach(device_t parent, device_t se
aprint_debug_dev(self, "enabling Allwinner A64 timer workaround\n");
}
- /*
- * Enable the virtual counter to be accessed from usermode.
- */
- gtmr_cntk_ctl_write(gtmr_cntk_ctl_read() |
- CNTKCTL_PL0VCTEN | CNTKCTL_PL0PCTEN);
-
self->dv_private = sc;
sc->sc_dev = self;
@@ -195,6 +189,13 @@ gtmr_init_cpu_clock(struct cpu_info *ci)
int s = splsched();
/*
+ * Allow the virtual and physical counters to be accessed from
+ * usermode. (PL0)
+ */
+ gtmr_cntk_ctl_write(gtmr_cntk_ctl_read() |
+ CNTKCTL_PL0VCTEN | CNTKCTL_PL0PCTEN);
+
+ /*
* enable timer and stop masking the timer.
*/
gtmr_cntv_ctl_write(CNTCTL_ENABLE);
