CVS commit: src/sys/dev/pci

[Nick Hudson]

Module Name:    src
Committed By:   skrll
Date:           Sat Nov 24 15:35:45 UTC 2018

Modified Files:
        src/sys/dev/pci: ahcisata_pci.c

Log Message:
Handle Cavium AHCI/RAID controller BAR weirdness.

Support 64bit BARs as well.


To generate a diff of this commit:
cvs rdiff -u -r1.45 -r1.46 src/sys/dev/pci/ahcisata_pci.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/dev/pci/ahcisata_pci.c
diff -u src/sys/dev/pci/ahcisata_pci.c:1.45 src/sys/dev/pci/ahcisata_pci.c:1.46
--- src/sys/dev/pci/ahcisata_pci.c:1.45	Tue Nov 20 15:16:43 2018
+++ src/sys/dev/pci/ahcisata_pci.c	Sat Nov 24 15:35:45 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: ahcisata_pci.c,v 1.45 2018/11/20 15:16:43 prlw1 Exp $	*/
+/*	$NetBSD: ahcisata_pci.c,v 1.46 2018/11/24 15:35:45 skrll Exp $	*/
 
 /*
  * Copyright (c) 2006 Manuel Bouyer.
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.45 2018/11/20 15:16:43 prlw1 Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.46 2018/11/24 15:35:45 skrll Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_ahcisata_pci.h"
@@ -220,6 +220,8 @@ CFATTACH_DECL3_NEW(ahcisata_pci, sizeof(
     ahci_pci_match, ahci_pci_attach, ahci_pci_detach, NULL,
     NULL, ahci_pci_childdetached, DVF_DETACH_SHUTDOWN);
 
+#define	AHCI_PCI_ABAR_CAVIUM	0x10
+
 static int
 ahci_pci_has_quirk(pci_vendor_id_t vendor, pci_product_id_t product)
 {
@@ -233,6 +235,20 @@ ahci_pci_has_quirk(pci_vendor_id_t vendo
 }
 
 static int
+ahci_pci_abar(struct pci_attach_args *pa)
+{
+	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CAVIUM) {
+		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CAVIUM_THUNDERX_AHCI ||
+		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CAVIUM_THUNDERX_RAID) {
+			return AHCI_PCI_ABAR_CAVIUM;
+		}
+	}
+
+	return AHCI_PCI_ABAR;
+}
+
+
+static int
 ahci_pci_match(device_t parent, cfdata_t match, void *aux)
 {
 	struct pci_attach_args *pa = aux;
@@ -253,9 +269,9 @@ ahci_pci_match(device_t parent, cfdata_t
 	    (force == false))
 		return 0;
 
-	if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
-	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
-	    &regt, &regh, NULL, &size) != 0)
+	int bar = ahci_pci_abar(pa);
+	pcireg_t memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, bar);
+	if (pci_mapreg_map(pa, bar, memtype, 0, &regt, &regh, NULL, &size) != 0)
 		return 0;
 
 	if ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
@@ -281,9 +297,10 @@ ahci_pci_attach(device_t parent, device_
 
 	sc->sc_atac.atac_dev = self;
 
-	if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
-	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
-	    &sc->sc_ahcit, &sc->sc_ahcih, NULL, &sc->sc_ahcis) != 0) {
+	int bar = ahci_pci_abar(pa);
+	pcireg_t memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, bar);
+	if (pci_mapreg_map(pa, bar, memtype, 0, &sc->sc_ahcit, &sc->sc_ahcih,
+	    NULL, &sc->sc_ahcis) != 0) {
 		aprint_error_dev(self, "can't map ahci registers\n");
 		return;
 	}