Module Name: src
Committed By: jmcneill
Date: Thu Jan 31 01:49:28 UTC 2019
Modified Files:
src/sys/arch/arm/sunxi: sun8i_h3_ccu.c sunxi_de2_ccu.c sunxi_drm.c
sunxi_dwhdmi.c sunxi_hdmiphy.c sunxi_lcdc.c sunxi_mixer.c
Log Message:
Add support for Allwinner H3/H5 display pipeline.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/sunxi/sun8i_h3_ccu.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/sunxi/sunxi_de2_ccu.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/sunxi/sunxi_drm.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/sunxi/sunxi_dwhdmi.c \
src/sys/arch/arm/sunxi/sunxi_hdmiphy.c \
src/sys/arch/arm/sunxi/sunxi_lcdc.c src/sys/arch/arm/sunxi/sunxi_mixer.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sun8i_h3_ccu.c
diff -u src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.15 src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.16
--- src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.15 Fri Jan 12 18:22:35 2018
+++ src/sys/arch/arm/sunxi/sun8i_h3_ccu.c Thu Jan 31 01:49:28 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_h3_ccu.c,v 1.15 2018/01/12 18:22:35 jakllsch Exp $ */
+/* $NetBSD: sun8i_h3_ccu.c,v 1.16 2019/01/31 01:49:28 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.15 2018/01/12 18:22:35 jakllsch Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.16 2019/01/31 01:49:28 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -43,13 +43,16 @@ __KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu
#define PLL_CPUX_CTRL_REG 0x000
#define PLL_AUDIO_CTRL_REG 0x008
+#define PLL_VIDEO_CTRL_REG 0x010
#define PLL_PERIPH0_CTRL_REG 0x028
+#define PLL_DE_CTRL_REG 0x048
#define AHB1_APB1_CFG_REG 0x054
#define APB2_CFG_REG 0x058
#define AHB2_CFG_REG 0x05c
#define AHB2_CLK_CFG __BITS(1,0)
#define AHB2_CLK_CFG_PLL_PERIPH0_2 1
#define BUS_CLK_GATING_REG0 0x060
+#define BUS_CLK_GATING_REG1 0x064
#define BUS_CLK_GATING_REG2 0x068
#define BUS_CLK_GATING_REG3 0x06c
#define BUS_CLK_GATING_REG4 0x070
@@ -61,7 +64,11 @@ __KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu
#define SPI1_CLK_REG 0x0a4
#define USBPHY_CFG_REG 0x0cc
#define MBUS_RST_REG 0x0fc
+#define DE_CLK_REG 0x104
+#define TCON0_CLK_REG 0x118
#define AC_DIG_CLK_REG 0x140
+#define HDMI_CLK_REG 0x150
+#define HDMI_SLOW_CLK_REG 0x154
#define BUS_SOFT_RST_REG0 0x2c0
#define BUS_SOFT_RST_REG1 0x2c4
#define BUS_SOFT_RST_REG2 0x2c8
@@ -149,6 +156,9 @@ static const char *apb1_parents[] = { "a
static const char *apb2_parents[] = { "losc", "hosc", "pll_periph0" };
static const char *mod_parents[] = { "hosc", "pll_periph0", "pll_periph1" };
static const char *ths_parents[] = { "hosc" };
+static const char *de_parents[] = { "pll_periph0_2x", "pll_de" };
+static const char *hdmi_parents[] = { "pll_video" };
+static const char *tcon0_parents[] = { "pll_video" };
static const struct sunxi_ccu_nkmp_tbl sun8i_h3_cpux_table[] = {
{ 60000000, 9, 0, 0, 2 },
@@ -250,6 +260,21 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
__BIT(31), /* enable */
SUNXI_CCU_NKMP_DIVIDE_BY_TWO),
+ SUNXI_CCU_FIXED_FACTOR(H3_CLK_PLL_PERIPH0_2X, "pll_periph0_2x", "pll_periph0", 1, 2),
+
+ SUNXI_CCU_FRACTIONAL(H3_CLK_PLL_VIDEO, "pll_video", "hosc",
+ PLL_VIDEO_CTRL_REG, /* reg */
+ __BITS(14,8), /* m */
+ 16, /* m_min */
+ 50, /* m_max */
+ __BIT(24), /* div_en */
+ __BIT(25), /* frac_sel */
+ 270000000, 297000000, /* frac values */
+ __BITS(3,0), /* prediv */
+ 4, /* prediv_val */
+ __BIT(31), /* enable */
+ SUNXI_CCU_FRACTIONAL_PLUSONE | SUNXI_CCU_FRACTIONAL_SET_ENABLE),
+
SUNXI_CCU_NKMP_TABLE(H3_CLK_PLL_AUDIO_BASE, "pll_audio", "hosc",
PLL_AUDIO_CTRL_REG, /* reg */
__BITS(14,8), /* n */
@@ -261,6 +286,19 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
sun8i_h3_ac_dig_table, /* table */
0),
+ SUNXI_CCU_FRACTIONAL(H3_CLK_PLL_DE, "pll_de", "hosc",
+ PLL_DE_CTRL_REG, /* reg */
+ __BITS(14,8), /* m */
+ 16, /* m_min */
+ 50, /* m_max */
+ __BIT(24), /* div_en */
+ __BIT(25), /* frac_sel */
+ 270000000, 297000000, /* frac values */
+ __BITS(3,0), /* prediv */
+ 2, /* prediv_val */
+ __BIT(31), /* enable */
+ SUNXI_CCU_FRACTIONAL_PLUSONE | SUNXI_CCU_FRACTIONAL_SET_ENABLE),
+
SUNXI_CCU_PREDIV(H3_CLK_AHB1, "ahb1", ahb1_parents,
AHB1_APB1_CFG_REG, /* reg */
__BITS(7,6), /* prediv */
@@ -298,6 +336,13 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
__BIT(31), /* enable */
SUNXI_CCU_DIV_TIMES_TWO),
+ SUNXI_CCU_DIV_GATE(H3_CLK_DE, "de", de_parents,
+ DE_CLK_REG, /* reg */
+ __BITS(3,0), /* div */
+ __BITS(26,24), /* sel */
+ __BIT(31), /* enable */
+ 0),
+
SUNXI_CCU_NM(H3_CLK_MMC0, "mmc0", mod_parents,
SDMMC0_CLK_REG, __BITS(17, 16), __BITS(3,0), __BITS(25, 24), __BIT(31),
SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
@@ -338,6 +383,23 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
SUNXI_CCU_GATE(H3_CLK_AC_DIG, "ac_dig", "pll_audio",
AC_DIG_CLK_REG, 31),
+ SUNXI_CCU_DIV_GATE(H3_CLK_HDMI, "hdmi", hdmi_parents,
+ HDMI_CLK_REG, /* reg */
+ __BITS(3,0), /* div */
+ __BITS(25,24), /* sel */
+ __BIT(31), /* enable */
+ 0),
+
+ SUNXI_CCU_GATE(H3_CLK_HDMI_DDC, "hdmi-ddc", "hosc",
+ HDMI_SLOW_CLK_REG, 31),
+
+ SUNXI_CCU_DIV_GATE(H3_CLK_TCON0, "tcon0", tcon0_parents,
+ TCON0_CLK_REG, /* reg */
+ __BITS(3,0), /* div */
+ __BITS(26,24), /* sel */
+ __BIT(31), /* enable */
+ 0),
+
SUNXI_CCU_GATE(H3_CLK_BUS_DMA, "bus-dma", "ahb1",
BUS_CLK_GATING_REG0, 6),
SUNXI_CCU_GATE(H3_CLK_BUS_MMC0, "bus-mmc0", "ahb1",
@@ -371,6 +433,21 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
SUNXI_CCU_GATE(H3_CLK_BUS_OHCI3, "bus-ohci3", "ahb2",
BUS_CLK_GATING_REG0, 31),
+ SUNXI_CCU_GATE(H3_CLK_BUS_GPU, "bus-gpu", "ahb1",
+ BUS_CLK_GATING_REG1, 20),
+ SUNXI_CCU_GATE(H3_CLK_BUS_DE, "bus-de", "ahb1",
+ BUS_CLK_GATING_REG1, 12),
+ SUNXI_CCU_GATE(H3_CLK_BUS_HDMI, "bus-hdmi", "ahb1",
+ BUS_CLK_GATING_REG1, 11),
+ SUNXI_CCU_GATE(H3_CLK_BUS_TVE, "bus-tve", "ahb1",
+ BUS_CLK_GATING_REG1, 9),
+ SUNXI_CCU_GATE(H3_CLK_BUS_DEINTERLACE, "bus-deinterlace", "ahb1",
+ BUS_CLK_GATING_REG1, 5),
+ SUNXI_CCU_GATE(H3_CLK_BUS_TCON1, "bus-tcon1", "ahb1",
+ BUS_CLK_GATING_REG1, 4),
+ SUNXI_CCU_GATE(H3_CLK_BUS_TCON0, "bus-tcon0", "ahb1",
+ BUS_CLK_GATING_REG1, 3),
+
SUNXI_CCU_GATE(H3_CLK_BUS_CODEC, "bus-codec", "apb1",
BUS_CLK_GATING_REG2, 0),
SUNXI_CCU_GATE(H3_CLK_BUS_PIO, "bus-pio", "apb1",
Index: src/sys/arch/arm/sunxi/sunxi_de2_ccu.c
diff -u src/sys/arch/arm/sunxi/sunxi_de2_ccu.c:1.2 src/sys/arch/arm/sunxi/sunxi_de2_ccu.c:1.3
--- src/sys/arch/arm/sunxi/sunxi_de2_ccu.c:1.2 Tue Jan 22 21:45:39 2019
+++ src/sys/arch/arm/sunxi/sunxi_de2_ccu.c Thu Jan 31 01:49:28 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_de2_ccu.c,v 1.2 2019/01/22 21:45:39 jmcneill Exp $ */
+/* $NetBSD: sunxi_de2_ccu.c,v 1.3 2019/01/31 01:49:28 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sunxi_de2_ccu.c,v 1.2 2019/01/22 21:45:39 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sunxi_de2_ccu.c,v 1.3 2019/01/31 01:49:28 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -46,6 +46,11 @@ static void sunxi_de2_ccu_attach(device_
CFATTACH_DECL_NEW(sunxi_de2ccu, sizeof(struct sunxi_ccu_softc),
sunxi_de2_ccu_match, sunxi_de2_ccu_attach, NULL, NULL);
+static struct sunxi_ccu_reset sun8i_h3_de2_ccu_resets[] = {
+ SUNXI_CCU_RESET(DE2_RST_MIXER0, 0x08, 0),
+ SUNXI_CCU_RESET(DE2_RST_WB, 0x08, 2),
+};
+
static struct sunxi_ccu_reset sun50i_a64_de2_ccu_resets[] = {
SUNXI_CCU_RESET(DE2_RST_MIXER0, 0x08, 0),
SUNXI_CCU_RESET(DE2_RST_MIXER1, 0x08, 1),
@@ -54,7 +59,7 @@ static struct sunxi_ccu_reset sun50i_a64
static const char *mod_parents[] = { "mod" };
-static struct sunxi_ccu_clk sun50i_a64_de2_ccu_clks[] = {
+static struct sunxi_ccu_clk sun8i_h3_de2_ccu_clks[] = {
SUNXI_CCU_GATE(DE2_CLK_BUS_MIXER0, "bus-mixer0", "bus", 0x04, 0),
SUNXI_CCU_GATE(DE2_CLK_BUS_MIXER1, "bus-mixer1", "bus", 0x04, 1),
SUNXI_CCU_GATE(DE2_CLK_BUS_WB, "bus-wb", "bus", 0x04, 2),
@@ -78,15 +83,24 @@ struct sunxi_de2_ccu_config {
u_int nclks;
};
+static const struct sunxi_de2_ccu_config sun8i_h3_de2_config = {
+ .resets = sun8i_h3_de2_ccu_resets,
+ .nresets = __arraycount(sun8i_h3_de2_ccu_resets),
+ .clks = sun8i_h3_de2_ccu_clks,
+ .nclks = __arraycount(sun8i_h3_de2_ccu_clks),
+};
+
static const struct sunxi_de2_ccu_config sun50i_a64_de2_config = {
.resets = sun50i_a64_de2_ccu_resets,
.nresets = __arraycount(sun50i_a64_de2_ccu_resets),
- .clks = sun50i_a64_de2_ccu_clks,
- .nclks = __arraycount(sun50i_a64_de2_ccu_clks),
+ .clks = sun8i_h3_de2_ccu_clks,
+ .nclks = __arraycount(sun8i_h3_de2_ccu_clks),
};
static const struct of_compat_data compat_data[] = {
+ { "allwinner,sun8i-h3-de2-clk", (uintptr_t)&sun8i_h3_de2_config },
{ "allwinner,sun50i-a64-de2-clk", (uintptr_t)&sun50i_a64_de2_config },
+ { "allwinner,sun50i-h5-de2-clk", (uintptr_t)&sun50i_a64_de2_config },
{ NULL }
};
Index: src/sys/arch/arm/sunxi/sunxi_drm.c
diff -u src/sys/arch/arm/sunxi/sunxi_drm.c:1.3 src/sys/arch/arm/sunxi/sunxi_drm.c:1.4
--- src/sys/arch/arm/sunxi/sunxi_drm.c:1.3 Wed Jan 30 10:55:44 2019
+++ src/sys/arch/arm/sunxi/sunxi_drm.c Thu Jan 31 01:49:28 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_drm.c,v 1.3 2019/01/30 10:55:44 jmcneill Exp $ */
+/* $NetBSD: sunxi_drm.c,v 1.4 2019/01/31 01:49:28 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_drm.c,v 1.3 2019/01/30 10:55:44 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_drm.c,v 1.4 2019/01/31 01:49:28 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -54,6 +54,7 @@ static TAILQ_HEAD(, sunxi_drm_endpoint)
TAILQ_HEAD_INITIALIZER(sunxi_drm_endpoints);
static const char * const compatible[] = {
+ "allwinner,sun8i-h3-display-engine",
"allwinner,sun50i-a64-display-engine",
NULL
};
Index: src/sys/arch/arm/sunxi/sunxi_dwhdmi.c
diff -u src/sys/arch/arm/sunxi/sunxi_dwhdmi.c:1.1 src/sys/arch/arm/sunxi/sunxi_dwhdmi.c:1.2
--- src/sys/arch/arm/sunxi/sunxi_dwhdmi.c:1.1 Wed Jan 30 01:24:00 2019
+++ src/sys/arch/arm/sunxi/sunxi_dwhdmi.c Thu Jan 31 01:49:28 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_dwhdmi.c,v 1.1 2019/01/30 01:24:00 jmcneill Exp $ */
+/* $NetBSD: sunxi_dwhdmi.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_dwhdmi.c,v 1.1 2019/01/30 01:24:00 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_dwhdmi.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -52,6 +52,7 @@ enum {
};
static const char * const compatible[] = {
+ "allwinner,sun8i-h3-dw-hdmi",
"allwinner,sun50i-a64-dw-hdmi",
NULL
};
Index: src/sys/arch/arm/sunxi/sunxi_hdmiphy.c
diff -u src/sys/arch/arm/sunxi/sunxi_hdmiphy.c:1.1 src/sys/arch/arm/sunxi/sunxi_hdmiphy.c:1.2
--- src/sys/arch/arm/sunxi/sunxi_hdmiphy.c:1.1 Wed Jan 30 01:24:00 2019
+++ src/sys/arch/arm/sunxi/sunxi_hdmiphy.c Thu Jan 31 01:49:28 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_hdmiphy.c,v 1.1 2019/01/30 01:24:00 jmcneill Exp $ */
+/* $NetBSD: sunxi_hdmiphy.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_hdmiphy.c,v 1.1 2019/01/30 01:24:00 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_hdmiphy.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -102,21 +102,22 @@ struct sunxi_hdmiphy_softc;
static int sunxi_hdmiphy_match(device_t, cfdata_t, void *);
static void sunxi_hdmiphy_attach(device_t, device_t, void *);
-static void sun50i_a64_hdmiphy_init(struct sunxi_hdmiphy_softc *);
-static int sun50i_a64_hdmiphy_config(struct sunxi_hdmiphy_softc *, u_int);
+static void sun8i_h3_hdmiphy_init(struct sunxi_hdmiphy_softc *);
+static int sun8i_h3_hdmiphy_config(struct sunxi_hdmiphy_softc *, u_int);
struct sunxi_hdmiphy_data {
void (*init)(struct sunxi_hdmiphy_softc *);
int (*config)(struct sunxi_hdmiphy_softc *, u_int);
};
-static const struct sunxi_hdmiphy_data sun50i_a64_hdmiphy_data = {
- .init = sun50i_a64_hdmiphy_init,
- .config = sun50i_a64_hdmiphy_config,
+static const struct sunxi_hdmiphy_data sun8i_h3_hdmiphy_data = {
+ .init = sun8i_h3_hdmiphy_init,
+ .config = sun8i_h3_hdmiphy_config,
};
static const struct of_compat_data compat_data[] = {
- { "allwinner,sun50i-a64-hdmi-phy", (uintptr_t)&sun50i_a64_hdmiphy_data },
+ { "allwinner,sun8i-h3-hdmi-phy", (uintptr_t)&sun8i_h3_hdmiphy_data },
+ { "allwinner,sun50i-a64-hdmi-phy", (uintptr_t)&sun8i_h3_hdmiphy_data },
{ NULL }
};
@@ -201,7 +202,7 @@ sunxi_hdmiphy_dump(struct sunxi_hdmiphy_
#endif
static void
-sun50i_a64_hdmiphy_init(struct sunxi_hdmiphy_softc *sc)
+sun8i_h3_hdmiphy_init(struct sunxi_hdmiphy_softc *sc)
{
uint32_t val;
int retry;
@@ -266,7 +267,7 @@ sun50i_a64_hdmiphy_init(struct sunxi_hdm
/*
* The following table is based on data from the "HDMI TX PHY S40 Specification".
*/
-static const struct sun50i_a64_hdmiphy_init {
+static const struct sun8i_h3_hdmiphy_init {
/* PLL Recommended Configuration */
uint32_t pll_cfg1;
uint32_t pll_cfg2;
@@ -277,7 +278,7 @@ static const struct sun50i_a64_hdmiphy_i
uint32_t ana_cfg3;
bool ana_cfg2_rcal_200;
u_int b_offset;
-} sun50i_a64_hdmiphy_inittab[] = {
+} sun8i_h3_hdmiphy_inittab[] = {
/* 27 MHz */
[0] = {
.pll_cfg1 = 0x3ddc5040, .pll_cfg2 = 0x8008430a, .pll_cfg3 = 0x1,
@@ -304,9 +305,9 @@ static const struct sun50i_a64_hdmiphy_i
};
static int
-sun50i_a64_hdmiphy_config(struct sunxi_hdmiphy_softc *sc, u_int rate)
+sun8i_h3_hdmiphy_config(struct sunxi_hdmiphy_softc *sc, u_int rate)
{
- const struct sun50i_a64_hdmiphy_init *inittab;
+ const struct sun8i_h3_hdmiphy_init *inittab;
u_int init_index, b_out, prediv;
uint32_t val, rcalib;
@@ -324,7 +325,7 @@ sun50i_a64_hdmiphy_config(struct sunxi_h
init_index++;
if (rate > 148500000)
init_index++;
- inittab = &sun50i_a64_hdmiphy_inittab[init_index];
+ inittab = &sun8i_h3_hdmiphy_inittab[init_index];
val = PHY_READ(sc, PLL_CFG2);
prediv = val & PLL_CFG2_PREDIV;
Index: src/sys/arch/arm/sunxi/sunxi_lcdc.c
diff -u src/sys/arch/arm/sunxi/sunxi_lcdc.c:1.1 src/sys/arch/arm/sunxi/sunxi_lcdc.c:1.2
--- src/sys/arch/arm/sunxi/sunxi_lcdc.c:1.1 Wed Jan 30 01:24:00 2019
+++ src/sys/arch/arm/sunxi/sunxi_lcdc.c Thu Jan 31 01:49:28 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_lcdc.c,v 1.1 2019/01/30 01:24:00 jmcneill Exp $ */
+/* $NetBSD: sunxi_lcdc.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_lcdc.c,v 1.1 2019/01/30 01:24:00 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_lcdc.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -77,6 +77,7 @@ enum {
};
static const char * const compatible[] = {
+ "allwinner,sun8i-h3-tcon-tv",
"allwinner,sun50i-a64-tcon-lcd",
"allwinner,sun50i-a64-tcon-tv",
NULL
Index: src/sys/arch/arm/sunxi/sunxi_mixer.c
diff -u src/sys/arch/arm/sunxi/sunxi_mixer.c:1.1 src/sys/arch/arm/sunxi/sunxi_mixer.c:1.2
--- src/sys/arch/arm/sunxi/sunxi_mixer.c:1.1 Wed Jan 30 01:24:00 2019
+++ src/sys/arch/arm/sunxi/sunxi_mixer.c Thu Jan 31 01:49:28 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_mixer.c,v 1.1 2019/01/30 01:24:00 jmcneill Exp $ */
+/* $NetBSD: sunxi_mixer.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_mixer.c,v 1.1 2019/01/30 01:24:00 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_mixer.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -90,6 +90,7 @@ enum {
};
static const char * const compatible[] = {
+ "allwinner,sun8i-h3-de2-mixer-0",
"allwinner,sun50i-a64-de2-mixer-0",
"allwinner,sun50i-a64-de2-mixer-1",
NULL
