Module Name:    src
Committed By:   skrll
Date:           Thu Jan 31 13:06:10 UTC 2019

Modified Files:
        src/sys/arch/arm/altera: cycv_platform.c
        src/sys/arch/arm/amlogic: meson_platform.c
        src/sys/arch/arm/fdt: arm_fdtvar.h cpu_fdt.c
        src/sys/arch/arm/nvidia: soc_tegra124.c tegra_var.h
        src/sys/arch/arm/samsung: exynos_platform.c
        src/sys/arch/arm/vexpress: vexpress_platform.c
        src/sys/arch/evbarm/zynq: zynq_machdep.c

Log Message:
Change ap_mpstart to return non-zero value if any/all APs don't start.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/altera/cycv_platform.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/amlogic/meson_platform.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/fdt/arm_fdtvar.h
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/fdt/cpu_fdt.c
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/nvidia/soc_tegra124.c
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/arm/nvidia/tegra_var.h
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/samsung/exynos_platform.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/vexpress/vexpress_platform.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/evbarm/zynq/zynq_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/altera/cycv_platform.c
diff -u src/sys/arch/arm/altera/cycv_platform.c:1.9 src/sys/arch/arm/altera/cycv_platform.c:1.10
--- src/sys/arch/arm/altera/cycv_platform.c:1.9	Fri Nov  2 18:13:11 2018
+++ src/sys/arch/arm/altera/cycv_platform.c	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: cycv_platform.c,v 1.9 2018/11/02 18:13:11 aymeric Exp $ */
+/* $NetBSD: cycv_platform.c,v 1.10 2019/01/31 13:06:10 skrll Exp $ */
 
 /* This file is in the public domain. */
 
@@ -7,7 +7,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.9 2018/11/02 18:13:11 aymeric Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.10 2019/01/31 13:06:10 skrll Exp $");
 
 #define	_ARM32_BUS_DMA_PRIVATE
 #include <sys/param.h>
@@ -76,12 +76,13 @@ cycv_platform_bootstrap(void)
 	arm_fdt_cpu_bootstrap();
 }
 
-static void
+static int
 cycv_mpstart(void)
 {
 	bus_space_tag_t bst = &armv7_generic_bs_tag;
 	bus_space_handle_t bsh_rst;
 	bus_space_handle_t bsh_scu;
+	int ret = 0;
 
 	bus_space_map(bst, CYCV_RSTMGR_BASE, CYCV_RSTMGR_SIZE, 0, &bsh_rst);
 	bus_space_map(bst, CYCV_SCU_BASE, CYCV_SCU_SIZE, 0, &bsh_scu);
@@ -110,11 +111,18 @@ cycv_mpstart(void)
 			~CYCV_RSTMGR_MPUMODRST_CPU1);
 
 	/* Wait for secondary processor to start */
-	for (int i = 0x10000000; i > 0; i--) {
+	int i;
+	for (i = 0x10000000; i > 0; i--) {
 		membar_consumer();
 		if (arm_cpu_hatched == (1 << 1))
 			break;
 	}
+	if (i == 0) {
+		aprint_error("cpu%d: WARNING: AP failed to start\n", 1);
+		ret++;
+	}
+
+	return ret;
 }
 
 static void

Index: src/sys/arch/arm/amlogic/meson_platform.c
diff -u src/sys/arch/arm/amlogic/meson_platform.c:1.3 src/sys/arch/arm/amlogic/meson_platform.c:1.4
--- src/sys/arch/arm/amlogic/meson_platform.c:1.3	Mon Jan 21 16:27:48 2019
+++ src/sys/arch/arm/amlogic/meson_platform.c	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: meson_platform.c,v 1.3 2019/01/21 16:27:48 jmcneill Exp $ */
+/* $NetBSD: meson_platform.c,v 1.4 2019/01/31 13:06:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill <[email protected]>
@@ -33,7 +33,7 @@
 #include "arml2cc.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: meson_platform.c,v 1.3 2019/01/21 16:27:48 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: meson_platform.c,v 1.4 2019/01/31 13:06:10 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -397,15 +397,16 @@ cpu_enable_meson8b(int phandle)
 ARM_CPU_METHOD(meson8b, "amlogic,meson8b-smp", cpu_enable_meson8b);
 #endif
 
-static void
+static int
 meson_mpstart(void)
 {
+	int ret = 0;
 #ifdef MULTIPROCESSOR
 	const bus_addr_t cbar = armreg_cbar_read();
 	bus_space_tag_t bst = &arm_generic_bs_tag;
 
 	if (cbar == 0)
-		return;
+		return ret;
 
 	const bus_space_handle_t scu_bsh =
 	    cbar - MESON8B_ARM_PBASE + MESON8B_ARM_VBASE;
@@ -414,7 +415,7 @@ meson_mpstart(void)
 	const u_int ncpus = (scu_cfg & SCU_CFG_CPUMAX) + 1;
 
 	if (ncpus < 2)
-		return;
+		return ret;
 
 	/*
 	 * Invalidate all SCU cache tags. That is, for all cores (0-3)
@@ -427,8 +428,9 @@ meson_mpstart(void)
 
 	armv7_dcache_wbinv_all();
 
-	arm_fdt_cpu_mpstart();
+	ret = arm_fdt_cpu_mpstart();
 #endif
+	return ret;
 }
 
 

Index: src/sys/arch/arm/fdt/arm_fdtvar.h
diff -u src/sys/arch/arm/fdt/arm_fdtvar.h:1.14 src/sys/arch/arm/fdt/arm_fdtvar.h:1.15
--- src/sys/arch/arm/fdt/arm_fdtvar.h:1.14	Thu Jan  3 12:54:25 2019
+++ src/sys/arch/arm/fdt/arm_fdtvar.h	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_fdtvar.h,v 1.14 2019/01/03 12:54:25 jmcneill Exp $ */
+/* $NetBSD: arm_fdtvar.h,v 1.15 2019/01/31 13:06:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared D. McNeill <[email protected]>
@@ -38,7 +38,7 @@ struct fdt_attach_args;
 struct arm_platform {
 	const struct pmap_devmap * (*ap_devmap)(void);
 	void			(*ap_bootstrap)(void);
-	void			(*ap_mpstart)(void);
+	int			(*ap_mpstart)(void);
 	void			(*ap_startup)(void);
 	void			(*ap_init_attach_args)(struct fdt_attach_args *);
 	void			(*ap_device_register)(device_t, void *);
@@ -84,7 +84,7 @@ static const struct arm_cpu_method __CON
 _ARM_CPU_METHOD_REGISTER(_name)
 
 void	arm_fdt_cpu_bootstrap(void);
-void	arm_fdt_cpu_mpstart(void);
+int	arm_fdt_cpu_mpstart(void);
 void    arm_fdt_cpu_hatch_register(void *, void (*)(void *, struct cpu_info *));
 void    arm_fdt_cpu_hatch(struct cpu_info *);
 

Index: src/sys/arch/arm/fdt/cpu_fdt.c
diff -u src/sys/arch/arm/fdt/cpu_fdt.c:1.21 src/sys/arch/arm/fdt/cpu_fdt.c:1.22
--- src/sys/arch/arm/fdt/cpu_fdt.c:1.21	Sat Jan 19 20:56:03 2019
+++ src/sys/arch/arm/fdt/cpu_fdt.c	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_fdt.c,v 1.21 2019/01/19 20:56:03 jmcneill Exp $ */
+/* $NetBSD: cpu_fdt.c,v 1.22 2019/01/31 13:06:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <[email protected]>
@@ -30,7 +30,7 @@
 #include "psci_fdt.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.21 2019/01/19 20:56:03 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.22 2019/01/31 13:06:10 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/atomic.h>
@@ -272,9 +272,10 @@ arm_fdt_cpu_enable(int phandle, const ch
 }
 #endif
 
-void
+int
 arm_fdt_cpu_mpstart(void)
 {
+	int ret = 0;
 #ifdef MULTIPROCESSOR
 	uint64_t mpidr, bp_mpidr;
 	u_int cpuindex, i;
@@ -284,7 +285,7 @@ arm_fdt_cpu_mpstart(void)
 	const int cpus = OF_finddevice("/cpus");
 	if (cpus == -1) {
 		aprint_error("%s: no /cpus node found\n", __func__);
-		return;
+		return 0;
 	}
 
 	/* MPIDR affinity levels of boot processor. */
@@ -323,12 +324,16 @@ arm_fdt_cpu_mpstart(void)
 			if (arm_cpu_hatched & __BIT(cpuindex))
 				break;
 		}
-		if (i == 0)
+
+		if (i == 0) {
+			ret++;
 			aprint_error("cpu%d: WARNING: AP failed to start\n", cpuindex);
+		}
 
 		cpuindex++;
 	}
 #endif /* MULTIPROCESSOR */
+	return ret;
 }
 
 static int

Index: src/sys/arch/arm/nvidia/soc_tegra124.c
diff -u src/sys/arch/arm/nvidia/soc_tegra124.c:1.19 src/sys/arch/arm/nvidia/soc_tegra124.c:1.20
--- src/sys/arch/arm/nvidia/soc_tegra124.c:1.19	Thu Oct 18 09:01:53 2018
+++ src/sys/arch/arm/nvidia/soc_tegra124.c	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: soc_tegra124.c,v 1.19 2018/10/18 09:01:53 skrll Exp $ */
+/* $NetBSD: soc_tegra124.c,v 1.20 2019/01/31 13:06:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <[email protected]>
@@ -30,7 +30,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.19 2018/10/18 09:01:53 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.20 2019/01/31 13:06:10 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -51,9 +51,11 @@ __KERNEL_RCSID(0, "$NetBSD: soc_tegra124
 
 #define EVP_RESET_VECTOR_0_REG	0x100
 
-void
+int
 tegra124_mpstart(void)
 {
+	int ret = 0;
+
 #if defined(MULTIPROCESSOR)
 	bus_space_tag_t bst = &arm_generic_bs_tag;
 	bus_space_handle_t bsh;
@@ -74,10 +76,16 @@ tegra124_mpstart(void)
 	tegra_pmc_power(PMC_PARTID_CPU2, true); started |= __BIT(2);
 	tegra_pmc_power(PMC_PARTID_CPU3, true); started |= __BIT(3);
 
-	for (u_int i = 0x10000000; i > 0; i--) {
+	u_int i;
+	for (i = 0x10000000; i > 0; i--) {
 		arm_dmb();
 		if (arm_cpu_hatched == started)
 			break;
 	}
+	if (i == 0) {
+		ret++;
+		aprint_error("cpu%d: WARNING: AP failed to start\n", i;
+	}
 #endif
+	return ret;
 }

Index: src/sys/arch/arm/nvidia/tegra_var.h
diff -u src/sys/arch/arm/nvidia/tegra_var.h:1.45 src/sys/arch/arm/nvidia/tegra_var.h:1.46
--- src/sys/arch/arm/nvidia/tegra_var.h:1.45	Fri Dec 14 12:29:22 2018
+++ src/sys/arch/arm/nvidia/tegra_var.h	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_var.h,v 1.45 2018/12/14 12:29:22 skrll Exp $ */
+/* $NetBSD: tegra_var.h,v 1.46 2019/01/31 13:06:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <[email protected]>
@@ -77,10 +77,7 @@ struct tegra_cpufreq_func {
 void	tegra_cpufreq_register(const struct tegra_cpufreq_func *);
 
 #if defined(SOC_TEGRA124)
-void	tegra124_mpstart(void);
-#endif
-#if defined(SOC_TEGRA210)
-void	tegra210_mpstart(void);
+int	tegra124_mpstart(void);
 #endif
 
 static void inline

Index: src/sys/arch/arm/samsung/exynos_platform.c
diff -u src/sys/arch/arm/samsung/exynos_platform.c:1.24 src/sys/arch/arm/samsung/exynos_platform.c:1.25
--- src/sys/arch/arm/samsung/exynos_platform.c:1.24	Sun Jan 27 04:53:59 2019
+++ src/sys/arch/arm/samsung/exynos_platform.c	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_platform.c,v 1.24 2019/01/27 04:53:59 dholland Exp $ */
+/* $NetBSD: exynos_platform.c,v 1.25 2019/01/31 13:06:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared D. McNeill <[email protected]>
@@ -35,7 +35,7 @@
 #include "ukbd.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.24 2019/01/27 04:53:59 dholland Exp $");
+__KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.25 2019/01/31 13:06:10 skrll Exp $");
 
 /* XXXJDM
  * Booting a CA7 core on Exynos5422 is currently broken, disable starting CA7 secondaries.
@@ -91,9 +91,10 @@ void exynos_platform_early_putchar(char)
 #define	EXYNOS5800_SYSRAM_SIZE		0x1000
 #define	 EXYNOS5800_SYSRAM_HOTPLUG		0x001c
 
-static void
+static int
 exynos5800_mpstart(void)
 {
+	int ret = 0;
 #if defined(MULTIPROCESSOR)
 	bus_space_tag_t bst = &armv7_generic_bs_tag;
 	bus_space_handle_t pmu_bsh, sysram_bsh;
@@ -108,7 +109,7 @@ exynos5800_mpstart(void)
 	const int cpus = OF_finddevice("/cpus");
 	if (cpus == -1) {
 		aprint_error("%s: no /cpus node found\n", __func__);
-		return;
+		return ret;
 	}
 
 	/* MPIDR affinity levels of boot processor. */
@@ -180,8 +181,10 @@ exynos5800_mpstart(void)
 			if (arm_cpu_hatched & __BIT(cpuindex))
 				break;
 		}
-		if (n == 0)
+		if (n == 0) {
+			ret++;
 			aprint_error("cpu%d: WARNING: AP failed to start\n", cpuindex);
+		}
 
 		cpuindex++;
 	}
@@ -189,6 +192,7 @@ exynos5800_mpstart(void)
 	bus_space_unmap(bst, sysram_bsh, EXYNOS5800_SYSRAM_SIZE);
 	bus_space_unmap(bst, pmu_bsh, EXYNOS5800_PMU_SIZE);
 #endif
+	return ret;
 }
 
 static struct of_compat_data mp_compat_data[] = {
@@ -196,18 +200,20 @@ static struct of_compat_data mp_compat_d
 	{ NULL }
 };
 
-static void
+static int
 exynos_platform_mpstart(void)
 {
 
-	void (*mp_start)(void) = NULL;
+	int (*mp_start)(void) = NULL;
 
 	const struct of_compat_data *cd = of_search_compatible(OF_finddevice("/"), mp_compat_data);
 	if (cd)
-		mp_start = (void (*)(void))cd->data;
+		mp_start = (int (*)(void))cd->data;
 
 	if (mp_start)
-		mp_start();
+		return mp_start();
+
+	return 0;
 }
 
 static void

Index: src/sys/arch/arm/vexpress/vexpress_platform.c
diff -u src/sys/arch/arm/vexpress/vexpress_platform.c:1.12 src/sys/arch/arm/vexpress/vexpress_platform.c:1.13
--- src/sys/arch/arm/vexpress/vexpress_platform.c:1.12	Tue Oct 30 16:41:52 2018
+++ src/sys/arch/arm/vexpress/vexpress_platform.c	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: vexpress_platform.c,v 1.12 2018/10/30 16:41:52 skrll Exp $ */
+/* $NetBSD: vexpress_platform.c,v 1.13 2019/01/31 13:06:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <[email protected]>
@@ -30,7 +30,7 @@
 #include "opt_console.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: vexpress_platform.c,v 1.12 2018/10/30 16:41:52 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vexpress_platform.c,v 1.13 2019/01/31 13:06:10 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -115,9 +115,10 @@ vexpress_platform_early_putchar(char c)
 }
 
 
-static void
+static int
 vexpress_a15_smp_init(void)
 {
+	int ret = 0;
 #ifdef MULTIPROCESSOR
 	bus_space_tag_t gicd_bst = &armv7_generic_bs_tag;
 	bus_space_handle_t gicd_bsh;
@@ -144,15 +145,21 @@ vexpress_a15_smp_init(void)
 	bus_space_write_4(gicd_bst, gicd_bsh, GICD_SGIR, sgir);
 
 	/* Wait for APs to start */
-	for (u_int i = 0x10000000; i > 0; i--) {
+	u_int i;
+	for (i = 0x10000000; i > 0; i--) {
 		arm_dmb();
 		if (arm_cpu_hatched == started)
 			break;
 	}
+	if (i == 0) {
+		aprint_error("cpu%d: WARNING: AP failed to start\n", cpuindex);
+		ret++;
+	}
 
 	/* Disable GIC distributor */
 	bus_space_write_4(gicd_bst, gicd_bsh, GICD_CTRL, 0);
 #endif
+	return ret;
 }
 
 

Index: src/sys/arch/evbarm/zynq/zynq_machdep.c
diff -u src/sys/arch/evbarm/zynq/zynq_machdep.c:1.7 src/sys/arch/evbarm/zynq/zynq_machdep.c:1.8
--- src/sys/arch/evbarm/zynq/zynq_machdep.c:1.7	Tue Jan 22 07:51:25 2019
+++ src/sys/arch/evbarm/zynq/zynq_machdep.c	Thu Jan 31 13:06:10 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: zynq_machdep.c,v 1.7 2019/01/22 07:51:25 skrll Exp $	*/
+/*	$NetBSD: zynq_machdep.c,v 1.8 2019/01/31 13:06:10 skrll Exp $	*/
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -29,7 +29,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: zynq_machdep.c,v 1.7 2019/01/22 07:51:25 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_machdep.c,v 1.8 2019/01/31 13:06:10 skrll Exp $");
 
 #include "opt_evbarm_boardtype.h"
 #include "opt_arm_debug.h"
@@ -189,9 +189,10 @@ zynq_platform_early_putchar(char c)
 	}
 }
 
-static void
+static int
 zynq_mpstart(void)
 {
+	int ret = 0;
 #ifdef MULTIPROCESSOR
 	/*
 	 * Invalidate all SCU cache tags. That is, for all cores (0-3)
@@ -234,6 +235,7 @@ zynq_mpstart(void)
 	}
 	for (size_t i = 1; i < arm_cpu_max; i++) {
 		if ((arm_cpu_hatched & __BIT(i)) == 0) {
+			ret++;
 			printf("%s: warning: cpu%zu failed to hatch\n",
 			    __func__, i);
 		}
@@ -243,6 +245,7 @@ zynq_mpstart(void)
 	    arm_cpu_max, arm_cpu_max ? "s" : "",
 	    arm_cpu_hatched);
 #endif /* MULTIPROCESSOR */
+	return ret;
 }
 
 

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