Module Name: src
Committed By: msaitoh
Date: Wed Feb 27 07:16:00 UTC 2019
Modified Files:
src/sys/arch/arm/rockchip: rk_gmac.c
Log Message:
Fix RGMII clock 25MHz setting (for 100Mbps).
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/rockchip/rk_gmac.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_gmac.c
diff -u src/sys/arch/arm/rockchip/rk_gmac.c:1.9 src/sys/arch/arm/rockchip/rk_gmac.c:1.10
--- src/sys/arch/arm/rockchip/rk_gmac.c:1.9 Sat Feb 23 17:18:38 2019
+++ src/sys/arch/arm/rockchip/rk_gmac.c Wed Feb 27 07:16:00 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_gmac.c,v 1.9 2019/02/23 17:18:38 martin Exp $ */
+/* $NetBSD: rk_gmac.c,v 1.10 2019/02/27 07:16:00 msaitoh Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <[email protected]>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rk_gmac.c,v 1.9 2019/02/23 17:18:38 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_gmac.c,v 1.10 2019/02/27 07:16:00 msaitoh Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -152,7 +152,7 @@ rk3328_gmac_set_speed_rgmii(struct dwc_g
#define RK3399_GRF_SOC_CON5_RMII_MODE __BIT(6)
#define RK3399_GRF_SOC_CON5_GMAC_CLK_SEL __BITS(5,4)
#define RK3399_GRF_SOC_CON5_GMAC_CLK_SEL_125M 0
-#define RK3399_GRF_SOC_CON5_GMAC_CLK_SEL_25M 1
+#define RK3399_GRF_SOC_CON5_GMAC_CLK_SEL_25M 3
#define RK3399_GRF_SOC_CON5_GMAC_CLK_SEL_2_5M 2
#define RK3399_GRF_SOC_CON5_RMII_CLK_SEL __BIT(3)
#define RK3399_GRF_SOC_CON6 0x0c218
