Module Name: src
Committed By: jmcneill
Date: Thu May 2 23:07:40 UTC 2019
Modified Files:
src/sys/arch/arm/cortex: gic_reg.h
Log Message:
Fix definition of GICD_IROUTER; the input to this macro is the INTID,
which can be a value between 32 and 1019.
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/cortex/gic_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic_reg.h
diff -u src/sys/arch/arm/cortex/gic_reg.h:1.10 src/sys/arch/arm/cortex/gic_reg.h:1.11
--- src/sys/arch/arm/cortex/gic_reg.h:1.10 Sat Nov 24 15:40:57 2018
+++ src/sys/arch/arm/cortex/gic_reg.h Thu May 2 23:07:40 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: gic_reg.h,v 1.10 2018/11/24 15:40:57 skrll Exp $ */
+/* $NetBSD: gic_reg.h,v 1.11 2019/05/02 23:07:40 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -138,7 +138,7 @@
#define GICD_SGIR 0xF00 // Software Generated Interrupt Register
#define GICD_CPENDSGIR(n) (0xF10+4*(n)) // SGI Clear-Pending Registers
#define GICD_SPENDSGIR(n) (0xF20+4*(n)) // SGI Set-Pending Registers
-#define GICD_IROUTER(n) (0x6100+8*(n)) // Interrupt Routing Registers
+#define GICD_IROUTER(n) (0x6000+8*(n)) // Interrupt Routing Registers
#define GICD_CTRL_RWP __BIT(31) // GICv3
#define GICD_CTRL_E1NWF __BIT(7) // GICv3
