Module Name:    src
Committed By:   jmcneill
Date:           Sun Dec  8 18:13:24 UTC 2019

Modified Files:
        src/sys/arch/arm/sunxi: sun50i_a64_ccu.c

Log Message:
Add SUNXI_CCU_NM_ROUND_DOWN to CE clock, fix pll parents to use 2X outputs


To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/sunxi/sun50i_a64_ccu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sunxi/sun50i_a64_ccu.c
diff -u src/sys/arch/arm/sunxi/sun50i_a64_ccu.c:1.21 src/sys/arch/arm/sunxi/sun50i_a64_ccu.c:1.22
--- src/sys/arch/arm/sunxi/sun50i_a64_ccu.c:1.21	Sun Dec  8 00:12:20 2019
+++ src/sys/arch/arm/sunxi/sun50i_a64_ccu.c	Sun Dec  8 18:13:24 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i_a64_ccu.c,v 1.21 2019/12/08 00:12:20 jmcneill Exp $ */
+/* $NetBSD: sun50i_a64_ccu.c,v 1.22 2019/12/08 18:13:24 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <[email protected]>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.21 2019/12/08 00:12:20 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.22 2019/12/08 18:13:24 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -157,7 +157,7 @@ static const char *ahb1_parents[] = { "l
 static const char *ahb2_parents[] = { "ahb1", "pll_periph0" };
 static const char *apb1_parents[] = { "ahb1" };
 static const char *apb2_parents[] = { "losc", "hosc", "pll_periph0" };
-static const char *ce_parents[] = { "hosc", "pll_periph0", "pll_periph1", NULL };
+static const char *ce_parents[] = { "hosc", "pll_periph0_2x", "pll_periph1_2x" };
 static const char *mmc_parents[] = { "hosc", "pll_periph0_2x", "pll_periph1_2x" };
 static const char *ths_parents[] = { "hosc", NULL, NULL, NULL };
 static const char *de_parents[] = { "pll_periph0_2x", "pll_de" };
@@ -405,7 +405,7 @@ static struct sunxi_ccu_clk sun50i_a64_c
 	    __BITS(3,0),	/* m */
 	    __BITS(25,24),	/* sel */
 	    __BIT(31),		/* enable */
-	    SUNXI_CCU_NM_POWER_OF_TWO),
+	    SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
 
 	SUNXI_CCU_DIV_GATE(A64_CLK_THS, "ths", ths_parents,
 	    THS_CLK_REG,	/* reg */

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