Module Name: src
Committed By: thorpej
Date: Fri Jan 3 03:44:42 UTC 2020
Modified Files:
src/sys/arch/evbarm/conf: DNS323 IQ31244
src/sys/arch/evbmips/conf: GDIUM LOONGSON
src/sys/arch/sandpoint/conf: GENERIC KUROBOX
src/sys/dev/i2c: files.i2c m41st84.c
Log Message:
Eliminate all of the #ifdefs for the "strtc" driver. Define model
properties (similar to what the "dsrtc" driver does), and provide
DT compat strings corresponding to those models. Allow config flags
to specify the model for non-FDT platforms (also like "dsrtc").
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/evbarm/conf/DNS323
cvs rdiff -u -r1.74 -r1.75 src/sys/arch/evbarm/conf/IQ31244
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/evbmips/conf/GDIUM
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/evbmips/conf/LOONGSON
cvs rdiff -u -r1.102 -r1.103 src/sys/arch/sandpoint/conf/GENERIC
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/sandpoint/conf/KUROBOX
cvs rdiff -u -r1.105 -r1.106 src/sys/dev/i2c/files.i2c
cvs rdiff -u -r1.26 -r1.27 src/sys/dev/i2c/m41st84.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/conf/DNS323
diff -u src/sys/arch/evbarm/conf/DNS323:1.12 src/sys/arch/evbarm/conf/DNS323:1.13
--- src/sys/arch/evbarm/conf/DNS323:1.12 Thu Jul 12 10:46:43 2018
+++ src/sys/arch/evbarm/conf/DNS323 Fri Jan 3 03:44:42 2020
@@ -1,4 +1,4 @@
-# $NetBSD: DNS323,v 1.12 2018/07/12 10:46:43 maxv Exp $
+# $NetBSD: DNS323,v 1.13 2020/01/03 03:44:42 thorpej Exp $
#
# DNS323 -- D-Link. DNS-323 platform kernel
#
@@ -32,5 +32,3 @@ makeoptions COPY_SYMTAB=1
g760a* at iic? addr 0x3e # G760a fan speed controller
lmtemp* at iic? addr 0x48 # LM75 temperature sensor
strtc* at iic? addr 0x68 # ST M41T80 Real-Time Clock
-options STRTC_NO_USERRAM
-options STRTC_NO_WATCHDOG
Index: src/sys/arch/evbarm/conf/IQ31244
diff -u src/sys/arch/evbarm/conf/IQ31244:1.74 src/sys/arch/evbarm/conf/IQ31244:1.75
--- src/sys/arch/evbarm/conf/IQ31244:1.74 Thu Jul 12 10:46:43 2018
+++ src/sys/arch/evbarm/conf/IQ31244 Fri Jan 3 03:44:42 2020
@@ -1,4 +1,4 @@
-# $NetBSD: IQ31244,v 1.74 2018/07/12 10:46:43 maxv Exp $
+# $NetBSD: IQ31244,v 1.75 2020/01/03 03:44:42 thorpej Exp $
#
# IQ31244 -- Intel IQ31244 Evaluation Board Kernel
#
@@ -151,7 +151,7 @@ lmtemp0 at iic0 addr 0x48 # LM75 tempe
lmtemp1 at iic0 addr 0x49 # LM75 temperature sensor
# RTC
-strtc0 at iic0 addr 0x68 # M41ST84 RTC & watchdog
+strtc0 at iic0 addr 0x68 flags 84 # M41ST84 RTC & watchdog
# PCI-PCI bridges
ppb* at pci? dev ? function ?
Index: src/sys/arch/evbmips/conf/GDIUM
diff -u src/sys/arch/evbmips/conf/GDIUM:1.36 src/sys/arch/evbmips/conf/GDIUM:1.37
--- src/sys/arch/evbmips/conf/GDIUM:1.36 Fri Apr 26 21:40:29 2019
+++ src/sys/arch/evbmips/conf/GDIUM Fri Jan 3 03:44:42 2020
@@ -1,4 +1,4 @@
-# $NetBSD: GDIUM,v 1.36 2019/04/26 21:40:29 sevan Exp $
+# $NetBSD: GDIUM,v 1.37 2020/01/03 03:44:42 thorpej Exp $
#
# GDIUM machine description file
#
@@ -22,7 +22,7 @@ include "arch/evbmips/conf/std.gdium"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "GDIUM-$Revision: 1.36 $"
+#ident "GDIUM-$Revision: 1.37 $"
maxusers 16
@@ -149,8 +149,7 @@ pci0 at bonito0
voyager0 at pci0 dev ? function ?
voyagerfb0 at voyager0
iic* at voyager0
-strtc* at iic? addr 0x68
-options STRTC_NO_USERRAM
+strtc* at iic? addr 0x68 # ST M41T80/81?
lmtemp* at iic? addr 0x48
#stvii* at iic? addr 0x40
#genfb0 at pci0 dev ? function ?
Index: src/sys/arch/evbmips/conf/LOONGSON
diff -u src/sys/arch/evbmips/conf/LOONGSON:1.42 src/sys/arch/evbmips/conf/LOONGSON:1.43
--- src/sys/arch/evbmips/conf/LOONGSON:1.42 Fri Apr 26 21:40:29 2019
+++ src/sys/arch/evbmips/conf/LOONGSON Fri Jan 3 03:44:42 2020
@@ -1,4 +1,4 @@
-# $NetBSD: LOONGSON,v 1.42 2019/04/26 21:40:29 sevan Exp $
+# $NetBSD: LOONGSON,v 1.43 2020/01/03 03:44:42 thorpej Exp $
#
# LOONGSON machine description file
#
@@ -22,7 +22,7 @@ include "arch/evbmips/conf/std.loongson
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "LOONGSON-$Revision: 1.42 $"
+#ident "LOONGSON-$Revision: 1.43 $"
maxusers 16
@@ -165,8 +165,7 @@ voyager0 at pci0 dev ? function ? # SM50
voyagerfb0 at voyager0 # framebuffer portion
pwmclock0 at voyager0 # clock and CPU freq scaling
iic* at voyager0
-strtc* at iic? addr 0x68 # GDIUM's real time clock
-options STRTC_NO_USERRAM
+strtc* at iic? addr 0x68 # GDIUM's real time clock (M41T80/81 ?)
lmtemp* at iic? addr 0x48 # GDIUM's temperature sensor
stvii* at iic? addr 0x40 # GDIUM's onboard microcontroller
lynxfb0 at pci0 dev ? function ? # SM712 on Yeeloong Notebook
Index: src/sys/arch/sandpoint/conf/GENERIC
diff -u src/sys/arch/sandpoint/conf/GENERIC:1.102 src/sys/arch/sandpoint/conf/GENERIC:1.103
--- src/sys/arch/sandpoint/conf/GENERIC:1.102 Fri Apr 26 21:40:32 2019
+++ src/sys/arch/sandpoint/conf/GENERIC Fri Jan 3 03:44:42 2020
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC,v 1.102 2019/04/26 21:40:32 sevan Exp $
+# $NetBSD: GENERIC,v 1.103 2020/01/03 03:44:42 thorpej Exp $
#
# machine description file for GENERIC NAS
#
@@ -22,7 +22,7 @@ include "arch/sandpoint/conf/std.sandpo
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "GENERIC-$Revision: 1.102 $"
+#ident "GENERIC-$Revision: 1.103 $"
maxusers 32
@@ -176,9 +176,7 @@ rs5c372rtc* at iic? addr 0x32
s390rtc* at iic? addr 0x30
pcf8563rtc* at iic? addr 0x51
dsrtc* at iic? addr 0x68
-strtc* at iic? addr 0x68
-options STRTC_NO_WATCHDOG
-options STRTC_NO_USERRAM
+strtc* at iic? addr 0x68 # ST M41T80 (or compat) RTC
# PCI IDE controllers - see pciide(4) for supported hardware.
acardide* at pci? dev ? function ? # Acard IDE controllers
Index: src/sys/arch/sandpoint/conf/KUROBOX
diff -u src/sys/arch/sandpoint/conf/KUROBOX:1.7 src/sys/arch/sandpoint/conf/KUROBOX:1.8
--- src/sys/arch/sandpoint/conf/KUROBOX:1.7 Mon Sep 21 23:34:21 2015
+++ src/sys/arch/sandpoint/conf/KUROBOX Fri Jan 3 03:44:42 2020
@@ -1,4 +1,4 @@
-# $NetBSD: KUROBOX,v 1.7 2015/09/21 23:34:21 phx Exp $
+# $NetBSD: KUROBOX,v 1.8 2020/01/03 03:44:42 thorpej Exp $
#
# KuroBox/LinkStation support
#
@@ -18,8 +18,6 @@ no s390rtc*
no pcf8563rtc*
no dsrtc*
no strtc*
-no options STRTC_NO_WATCHDOG
-no options STRTC_NO_USERRAM
no acardide*
no viaide*
Index: src/sys/dev/i2c/files.i2c
diff -u src/sys/dev/i2c/files.i2c:1.105 src/sys/dev/i2c/files.i2c:1.106
--- src/sys/dev/i2c/files.i2c:1.105 Thu Jan 2 22:06:59 2020
+++ src/sys/dev/i2c/files.i2c Fri Jan 3 03:44:42 2020
@@ -1,4 +1,4 @@
-# $NetBSD: files.i2c,v 1.105 2020/01/02 22:06:59 jmcneill Exp $
+# $NetBSD: files.i2c,v 1.106 2020/01/03 03:44:42 thorpej Exp $
obsolete defflag opt_i2cbus.h I2C_SCAN
define i2cbus { }
@@ -70,8 +70,6 @@ file dev/i2c/m41t00.c m41trtc
device strtc
attach strtc at iic
file dev/i2c/m41st84.c strtc
-defflag opt_strtc.h STRTC_NO_USERRAM
- STRTC_NO_WATCHDOG
# MAX6900 Real Time Clock
device maxrtc
Index: src/sys/dev/i2c/m41st84.c
diff -u src/sys/dev/i2c/m41st84.c:1.26 src/sys/dev/i2c/m41st84.c:1.27
--- src/sys/dev/i2c/m41st84.c:1.26 Thu Jan 2 19:24:48 2020
+++ src/sys/dev/i2c/m41st84.c Fri Jan 3 03:44:42 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: m41st84.c,v 1.26 2020/01/02 19:24:48 thorpej Exp $ */
+/* $NetBSD: m41st84.c,v 1.27 2020/01/03 03:44:42 thorpej Exp $ */
/*
* Copyright (c) 2003 Wasabi Systems, Inc.
@@ -36,9 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: m41st84.c,v 1.26 2020/01/02 19:24:48 thorpej Exp $");
-
-#include "opt_strtc.h"
+__KERNEL_RCSID(0, "$NetBSD: m41st84.c,v 1.27 2020/01/03 03:44:42 thorpej Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -57,11 +55,44 @@ __KERNEL_RCSID(0, "$NetBSD: m41st84.c,v
#include "ioconf.h"
+struct strtc_model {
+ uint16_t sm_model;
+ uint8_t sm_nvram_start;
+ uint8_t sm_nvram_size;
+ uint32_t sm_flags;
+};
+
+#define STRTC_F_HAS_WDOG __BIT(0)
+
+static const struct strtc_model m41t80_model = {
+ .sm_model = 80,
+};
+
+static const struct strtc_model m41t81_model = {
+ .sm_model = 81,
+ .sm_flags = STRTC_F_HAS_WDOG,
+};
+
+static const struct strtc_model m48t84_model = {
+ .sm_model = 84,
+ .sm_nvram_start = M41ST84_USER_RAM,
+ .sm_nvram_size = M41ST84_USER_RAM_SIZE,
+ .sm_flags = STRTC_F_HAS_WDOG,
+};
+
+static const struct device_compatible_entry compat_data[] = {
+ { "st,m41t80", (uintptr_t)&m41t80_model },
+ { "st,m41t81", (uintptr_t)&m41t81_model },
+ { "st,m41t84", (uintptr_t)&m48t84_model },
+ { NULL, 0 },
+};
+
struct strtc_softc {
device_t sc_dev;
i2c_tag_t sc_tag;
int sc_address;
int sc_open;
+ const struct strtc_model *sc_model;
struct todr_chip_handle sc_todr;
};
@@ -71,7 +102,6 @@ static int strtc_match(device_t, cfdata_
CFATTACH_DECL_NEW(strtc, sizeof(struct strtc_softc),
strtc_match, strtc_attach, NULL, NULL);
-#ifndef STRTC_NO_USERRAM
dev_type_open(strtc_open);
dev_type_close(strtc_close);
dev_type_read(strtc_read);
@@ -91,7 +121,6 @@ const struct cdevsw strtc_cdevsw = {
.d_discard = nodiscard,
.d_flag = D_OTHER
};
-#endif
static int strtc_clock_read(struct strtc_softc *sc, struct clock_ymdhms *);
static int strtc_gettime_ymdhms(struct todr_chip_handle *,
@@ -99,15 +128,48 @@ static int strtc_gettime_ymdhms(struct t
static int strtc_settime_ymdhms(struct todr_chip_handle *,
struct clock_ymdhms *);
+static const struct strtc_model *
+strtc_model_by_number(u_int model)
+{
+ const struct device_compatible_entry *dce;
+ const struct strtc_model *sm;
+
+ /* no model given; assume it's a 41T80 */
+ if (model == 0)
+ return &m41t80_model;
+
+ for (dce = compat_data; dce->compat != NULL; dce++) {
+ sm = (void *)dce->data;
+ if (sm->sm_model == model)
+ return sm;
+ }
+ return NULL;
+}
+
+static const struct strtc_model *
+strtc_model_by_compat(const struct i2c_attach_args *ia)
+{
+ const struct device_compatible_entry *dce;
+ const struct strtc_model *sm = NULL;
+
+ if (iic_compatible_match(ia, compat_data, &dce))
+ sm = (void *)dce->data;
+
+ return sm;
+}
+
static int
strtc_match(device_t parent, cfdata_t cf, void *arg)
{
struct i2c_attach_args *ia = arg;
int match_result;
- if (iic_use_direct_match(ia, cf, NULL, &match_result))
+ if (iic_use_direct_match(ia, cf, compat_data, &match_result))
return match_result;
+ if (strtc_model_by_number(cf->cf_flags & 0xffff) == NULL)
+ return 0;
+
/* indirect config - check typical address */
if (ia->ia_addr == M41ST84_ADDR)
return I2C_MATCH_ADDRESS_ONLY;
@@ -120,16 +182,24 @@ strtc_attach(device_t parent, device_t s
{
struct strtc_softc *sc = device_private(self);
struct i2c_attach_args *ia = arg;
+ const struct strtc_model *sm;
+
+ if ((sm = strtc_model_by_compat(ia)) == NULL)
+ sm = strtc_model_by_number(device_cfdata(self)->cf_flags);
+
+ if (sm == NULL) {
+ aprint_error(": unable to determine model!\n");
+ return;
+ }
+
+ aprint_naive(": Real-time Clock%s\n",
+ sm->sm_nvram_size ? "/NVRAM" : "");
+ aprint_normal(": M41T%d Real-time Clock%s", sm->sm_model,
+ sm->sm_nvram_size ? "/NVRAM" : "");
-#ifndef STRTC_NO_USERRAM
- aprint_naive(": Real-time Clock/NVRAM\n");
- aprint_normal(": M41ST84 Real-time Clock/NVRAM\n");
-#else
- aprint_naive(": Real-time Clock\n");
- aprint_normal(": M41T8x Real-time Clock\n");
-#endif
sc->sc_tag = ia->ia_tag;
sc->sc_address = ia->ia_addr;
+ sc->sc_model = sm;
sc->sc_dev = self;
sc->sc_open = 0;
sc->sc_todr.cookie = sc;
@@ -142,7 +212,6 @@ strtc_attach(device_t parent, device_t s
todr_attach(&sc->sc_todr);
}
-#ifndef STRTC_NO_USERRAM
/*ARGSUSED*/
int
strtc_open(dev_t dev, int flag, int fmt, struct lwp *l)
@@ -185,15 +254,17 @@ strtc_read(dev_t dev, struct uio *uio, i
if ((sc = device_lookup_private(&strtc_cd, minor(dev))) == NULL)
return (ENXIO);
- if (uio->uio_offset >= M41ST84_USER_RAM_SIZE)
+ const struct strtc_model * const sm = sc->sc_model;
+
+ if (uio->uio_offset >= sm->sm_nvram_size)
return (EINVAL);
if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
return (error);
- while (uio->uio_resid && uio->uio_offset < M41ST84_USER_RAM_SIZE) {
+ while (uio->uio_resid && uio->uio_offset < sm->sm_nvram_size) {
a = (int)uio->uio_offset;
- cmdbuf[0] = a + M41ST84_USER_RAM;
+ cmdbuf[0] = a + sm->sm_nvram_start;
if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc->sc_address, cmdbuf, 1,
&ch, 1, 0)) != 0) {
@@ -224,15 +295,17 @@ strtc_write(dev_t dev, struct uio *uio,
if ((sc = device_lookup_private(&strtc_cd, minor(dev))) == NULL)
return (ENXIO);
- if (uio->uio_offset >= M41ST84_USER_RAM_SIZE)
+ const struct strtc_model * const sm = sc->sc_model;
+
+ if (uio->uio_offset >= sm->sm_nvram_size)
return (EINVAL);
if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
return (error);
- while (uio->uio_resid && uio->uio_offset < M41ST84_USER_RAM_SIZE) {
+ while (uio->uio_resid && uio->uio_offset < sm->sm_nvram_size) {
a = (int)uio->uio_offset;
- cmdbuf[0] = a + M41ST84_USER_RAM;
+ cmdbuf[0] = a + sm->sm_nvram_start;
if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
break;
@@ -249,7 +322,6 @@ strtc_write(dev_t dev, struct uio *uio,
return (error);
}
-#endif /* STRTC_NO_USERRAM */
static int
strtc_gettime_ymdhms(struct todr_chip_handle *ch, struct clock_ymdhms *dt)
@@ -431,13 +503,18 @@ strtc_settime_ymdhms(struct todr_chip_ha
return (0);
}
-#ifndef STRTC_NO_WATCHDOG
void
strtc_wdog_config(void *arg, uint8_t wd)
{
struct strtc_softc *sc = arg;
uint8_t cmdbuf[2];
+ if ((sc->sc_model->sm_flags & STRTC_F_HAS_WDOG) == 0) {
+ aprint_error_dev(sc->sc_dev,
+ "strtc_wdog_config: watchdog timer not present\n");
+ return;
+ }
+
if (iic_acquire_bus(sc->sc_tag, 0)) {
aprint_error_dev(sc->sc_dev,
"strtc_wdog_config: failed to acquire I2C bus\n");
@@ -456,4 +533,3 @@ strtc_wdog_config(void *arg, uint8_t wd)
iic_release_bus(sc->sc_tag, 0);
}
-#endif /* STRTC_NO_WATCHDOG */
