Module Name: src
Committed By: maxv
Date: Tue Jan 28 17:47:51 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
src/sys/arch/aarch64/include: armreg.h
Log Message:
Fetch ID_AA64MMFR2_EL1. Okayed by Nick the other day.
To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/aarch64/include/armreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.38 src/sys/arch/aarch64/aarch64/cpu.c:1.39
--- src/sys/arch/aarch64/aarch64/cpu.c:1.38 Mon Jan 27 16:25:08 2020
+++ src/sys/arch/aarch64/aarch64/cpu.c Tue Jan 28 17:47:50 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.38 2020/01/27 16:25:08 skrll Exp $ */
+/* $NetBSD: cpu.c,v 1.39 2020/01/28 17:47:50 maxv Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <[email protected]>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.38 2020/01/27 16:25:08 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.39 2020/01/28 17:47:50 maxv Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -460,8 +460,7 @@ cpu_setup_id(struct cpu_info *ci)
id->ac_aa64mmfr0 = reg_id_aa64mmfr0_el1_read();
id->ac_aa64mmfr1 = reg_id_aa64mmfr1_el1_read();
- /* Only in ARMv8.2. */
- id->ac_aa64mmfr2 = 0 /* reg_id_aa64mmfr2_el1_read() */;
+ id->ac_aa64mmfr2 = reg_id_aa64mmfr2_el1_read();
id->ac_mvfr0 = reg_mvfr0_el1_read();
id->ac_mvfr1 = reg_mvfr1_el1_read();
Index: src/sys/arch/aarch64/include/armreg.h
diff -u src/sys/arch/aarch64/include/armreg.h:1.32 src/sys/arch/aarch64/include/armreg.h:1.33
--- src/sys/arch/aarch64/include/armreg.h:1.32 Tue Jan 28 17:33:07 2020
+++ src/sys/arch/aarch64/include/armreg.h Tue Jan 28 17:47:51 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.32 2020/01/28 17:33:07 maxv Exp $ */
+/* $NetBSD: armreg.h,v 1.33 2020/01/28 17:47:51 maxv Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -35,8 +35,8 @@
#include <arm/cputypes.h>
#include <sys/types.h>
-#define AARCH64REG_READ_INLINE2(regname, regdesc) \
-static __inline uint64_t \
+#define AARCH64REG_READ_INLINE3(regname, regdesc, fnattrs) \
+static __inline uint64_t fnattrs \
reg_##regname##_read(void) \
{ \
uint64_t __rv; \
@@ -44,13 +44,19 @@ reg_##regname##_read(void) \
return __rv; \
}
-#define AARCH64REG_WRITE_INLINE2(regname, regdesc) \
-static __inline void \
+#define AARCH64REG_READ_INLINE2(regname, regdesc) \
+ AARCH64REG_READ_INLINE3(regname, regdesc, )
+
+#define AARCH64REG_WRITE_INLINE3(regname, regdesc, fnattrs) \
+static __inline void fnattrs \
reg_##regname##_write(uint64_t __val) \
{ \
__asm __volatile("msr " #regdesc ", %0" :: "r"(__val)); \
}
+#define AARCH64REG_WRITE_INLINE2(regname, regdesc) \
+ AARCH64REG_WRITE_INLINE3(regname, regdesc, )
+
#define AARCH64REG_WRITEIMM_INLINE2(regname, regdesc) \
static __inline void \
reg_##regname##_write(uint64_t __val) \
@@ -329,7 +335,8 @@ AARCH64REG_READ_INLINE(id_aa64mmfr1_el1)
#define ID_AA64MMFR1_EL1_HAFDBS_A 1
#define ID_AA64MMFR1_EL1_HAFDBS_AD 2
-AARCH64REG_READ_INLINE(id_aa64mmfr2_el1)
+AARCH64REG_READ_INLINE3(id_aa64mmfr2_el1, id_aa64mmfr2_el1,
+ __attribute__((target("arch=armv8.2-a"))))
#define ID_AA64MMFR2_EL1_E0PD __BITS(63,60)
#define ID_AA64MMFR2_EL1_E0PD_NONE 0
