Module Name: src Committed By: skrll Date: Sat Feb 15 16:56:15 UTC 2020
Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: typo in comment To generate a diff of this commit: cvs rdiff -u -r1.105 -r1.106 src/sys/arch/mips/mips/mipsX_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/mips/mips/mipsX_subr.S diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.105 src/sys/arch/mips/mips/mipsX_subr.S:1.106 --- src/sys/arch/mips/mips/mipsX_subr.S:1.105 Tue Jun 25 21:26:04 2019 +++ src/sys/arch/mips/mips/mipsX_subr.S Sat Feb 15 16:56:15 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: mipsX_subr.S,v 1.105 2019/06/25 21:26:04 skrll Exp $ */ +/* $NetBSD: mipsX_subr.S,v 1.106 2020/02/15 16:56:15 skrll Exp $ */ /* * Copyright 2002 Wasabi Systems, Inc. @@ -1826,7 +1826,7 @@ END(MIPSX(cache_exception)) * virtual address. * * If we are page sizes which use both TLB LO entries, either both - * are valid or neither are. So this expection should never happen. + * are valid or neither are. So this exception should never happen. * * Results: * None.