Module Name:    src
Committed By:   maxv
Date:           Sat Apr 11 09:02:04 UTC 2020

Modified Files:
        src/sys/arch/aarch64/aarch64: vectors.S

Log Message:
The vectors allow for up to 0x80 bytes of instructions, but we've reached
this limit already, so implement the handler functions outside, and jump
to them. This allows to add instructions in the future.

Sent to ryo@ and skrll@.


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/aarch64/aarch64/vectors.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/vectors.S
diff -u src/sys/arch/aarch64/aarch64/vectors.S:1.11 src/sys/arch/aarch64/aarch64/vectors.S:1.12
--- src/sys/arch/aarch64/aarch64/vectors.S:1.11	Wed Feb 12 07:02:08 2020
+++ src/sys/arch/aarch64/aarch64/vectors.S	Sat Apr 11 09:02:04 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: vectors.S,v 1.11 2020/02/12 07:02:08 skrll Exp $	*/
+/*	$NetBSD: vectors.S,v 1.12 2020/04/11 09:02:04 maxv Exp $	*/
 
 #include <aarch64/asm.h>
 #include "assym.h"
@@ -16,11 +16,12 @@
 #define	TRAP_FRAMESIZE	TF_SIZE
 #endif
 
-	/*
-	 * vector_entry macro must be small enough to fit 0x80 bytes!
-	 */
-	.macro	vector_entry, el, label, tpidr
-	.align 7	/* aligned 0x80 */
+/*
+ * Template for the handler functions.
+ */
+.macro	vector_func, func, el, label, tpidr
+ENTRY_NP(\func)
+	.align 7	/* cacheline-aligned */
 
 	.if \el == 1
 	/* need to allocate stack on el1 */
@@ -88,44 +89,79 @@
 	mov	x29, sp			/* for backtrace */
 #endif
 	b	\label
-	.endm
-
+END(\func)
+.endm
 
-	.align 11	/* vector table must be aligned 2048 */
-ENTRY_NP(el1_vectors)
 /*
- * Exception taken from current Exception Level with SP_EL0.
- * (These shouldn't happen)
+ * The vector_entry macro must be small enough to fit 0x80 bytes! We just jump
+ * into the proper function, so this constraint is always respected.
  */
-	vector_entry	1, trap_el1t_sync
-	vector_entry	1, trap_el1t_irq
-	vector_entry	1, trap_el1t_fiq
-	vector_entry	1, trap_el1t_error
+.macro	vector_entry, func
+	.align 7	/* aligned 0x80 */
+	b	\func
+.endm
 
 /*
- * Exception taken from current Exception Level with SP_EL1.
- * There are entries for exceptions caused in EL1 (kernel exceptions).
+ * The functions.
  */
-	vector_entry	1, trap_el1h_sync
-	vector_entry	1, interrupt
-	vector_entry	1, trap_el1h_fiq
-	vector_entry	1, trap_el1h_error
+vector_func	el1t_sync_handler,  1, trap_el1t_sync
+vector_func	el1t_irq_handler,   1, trap_el1t_irq
+vector_func	el1t_fiq_handler,   1, trap_el1t_fiq
+vector_func	el1t_error_handler, 1, trap_el1t_error
+
+vector_func	el1h_sync_handler,  1, trap_el1h_sync
+vector_func	el1h_intr_handler,  1, interrupt
+vector_func	el1h_fiq_handler,   1, trap_el1h_fiq
+vector_func	el1h_error_handler, 1, trap_el1h_error
+
+vector_func	el0_sync_handler,  0, trap_el0_sync
+vector_func	el0_intr_handler,  0, interrupt
+vector_func	el0_fiq_handler,   0, trap_el0_fiq
+vector_func	el0_error_handler, 0, trap_el0_error
+
+vector_func	el0_32sync_handler,  0, trap_el0_32sync, ro
+vector_func	el0_32intr_handler,  0, interrupt, ro
+vector_func	el0_32fiq_handler,   0, trap_el0_32fiq, ro
+vector_func	el0_32error_handler, 0, trap_el0_32error, ro
 
 /*
- * Exception taken from lower Exception Level which is using AArch64
- * There are entries for exceptions caused in EL0 (native user exceptions).
+ * The vector table. Must be aligned to 2048.
  */
-	vector_entry	0, trap_el0_sync
-	vector_entry	0, interrupt
-	vector_entry	0, trap_el0_fiq
-	vector_entry	0, trap_el0_error
+	.align 11
+ENTRY_NP(el1_vectors)
+	/*
+	 * Exception taken from current Exception Level with SP_EL0.
+	 * (These shouldn't happen)
+	 */
+	vector_entry	el1t_sync_handler
+	vector_entry	el1t_irq_handler
+	vector_entry	el1t_fiq_handler
+	vector_entry	el1t_error_handler
 
-/*
- * Exception taken from lower Exception Level which is using AArch32
- * There are entries for exceptions caused in EL0 (compat user exceptions).
- */
-	vector_entry	0, trap_el0_32sync, ro
-	vector_entry	0, interrupt, ro
-	vector_entry	0, trap_el0_32fiq, ro
-	vector_entry	0, trap_el0_32error, ro
+	/*
+	 * Exception taken from current Exception Level with SP_EL1.
+	 * There are entries for exceptions caused in EL1 (kernel exceptions).
+	 */
+	vector_entry	el1h_sync_handler
+	vector_entry	el1h_intr_handler
+	vector_entry	el1h_fiq_handler
+	vector_entry	el1h_error_handler
+
+	/*
+	 * Exception taken from lower Exception Level which is using AArch64.
+	 * There are entries for exceptions caused in EL0 (native user exceptions).
+	 */
+	vector_entry	el0_sync_handler
+	vector_entry	el0_intr_handler
+	vector_entry	el0_fiq_handler
+	vector_entry	el0_error_handler
+
+	/*
+	 * Exception taken from lower Exception Level which is using AArch32.
+	 * There are entries for exceptions caused in EL0 (compat user exceptions).
+	 */
+	vector_entry	el0_32sync_handler
+	vector_entry	el0_32intr_handler
+	vector_entry	el0_32fiq_handler
+	vector_entry	el0_32error_handler
 END(el1_vectors)

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