Module Name: src
Committed By: simonb
Date: Sat Jun 13 14:39:07 UTC 2020
Modified Files:
src/sys/arch/mips/include: mipsNN.h
src/sys/arch/mips/mips: mips_machdep.c
Log Message:
Use the correct config3 field name (ULRI) for UserLocal register is
implemented bit.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/include/mipsNN.h
cvs rdiff -u -r1.285 -r1.286 src/sys/arch/mips/mips/mips_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/mipsNN.h
diff -u src/sys/arch/mips/include/mipsNN.h:1.6 src/sys/arch/mips/include/mipsNN.h:1.7
--- src/sys/arch/mips/include/mipsNN.h:1.6 Mon Jul 11 16:15:35 2016
+++ src/sys/arch/mips/include/mipsNN.h Sat Jun 13 14:39:07 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsNN.h,v 1.6 2016/07/11 16:15:35 matt Exp $ */
+/* $NetBSD: mipsNN.h,v 1.7 2020/06/13 14:39:07 simonb Exp $ */
/*
* Copyright 2000, 2001
@@ -239,8 +239,8 @@
/* "CMGCR" (R): Coherency Manager memory-mapped Global Configuration Register Space is implemented. */
#define MIPSNN_CFG3_CMGCR 0x20000000
-/* "ULRP" (R): UserLocal register is implemented. */
-#define MIPSNN_CFG3_ULRP 0x00002000
+/* "ULRI" (R): UserLocal register is implemented. */
+#define MIPSNN_CFG3_ULRI 0x00002000
/* "IPLW" (R): Width of Status[IPL] and Cause[RIPL] fields. */
#define MIPSNN_CFG3_IPLW_MASK 0x00600000
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.285 src/sys/arch/mips/mips/mips_machdep.c:1.286
--- src/sys/arch/mips/mips/mips_machdep.c:1.285 Wed Jun 10 01:42:17 2020
+++ src/sys/arch/mips/mips/mips_machdep.c Sat Jun 13 14:39:07 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_machdep.c,v 1.285 2020/06/10 01:42:17 simonb Exp $ */
+/* $NetBSD: mips_machdep.c,v 1.286 2020/06/13 14:39:07 simonb Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -111,7 +111,7 @@
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.285 2020/06/10 01:42:17 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.286 2020/06/13 14:39:07 simonb Exp $");
#define __INTR_PRIVATE
#include "opt_cputype.h"
@@ -935,7 +935,7 @@ mips32r2_vector_init(const struct splsw
uint32_t cp0flags = mips_options.mips_cpu->cpu_cp0flags;
if (mipsNN_cp0_config2_read() & MIPSNN_CFG2_M) {
const uint32_t cfg3 = mipsNN_cp0_config3_read();
- if (cfg3 & MIPSNN_CFG3_ULRP) {
+ if (cfg3 & MIPSNN_CFG3_ULRI) {
cp0flags |= MIPS_CP0FL_USERLOCAL;
}
if (cfg3 & MIPSNN_CFG3_DSP2P) {
@@ -1081,7 +1081,7 @@ mips64r2_vector_init(const struct splsw
uint32_t cp0flags = mips_options.mips_cpu->cpu_cp0flags;
if (mipsNN_cp0_config2_read() & MIPSNN_CFG2_M) {
const uint32_t cfg3 = mipsNN_cp0_config3_read();
- if (cfg3 & MIPSNN_CFG3_ULRP) {
+ if (cfg3 & MIPSNN_CFG3_ULRI) {
cp0flags |= MIPS_CP0FL_USERLOCAL;
}
if (cfg3 & MIPSNN_CFG3_DSP2P) {
