Module Name: src
Committed By: riastradh
Date: Mon Jul 20 15:11:29 UTC 2020
Modified Files:
src/sys/arch/x86/x86: identcpu.c
Log Message:
Disable x86 in-kernel AES temporarily.
There's a bug in the FPU state handling that it triggers -- likely
limited to the softint path since I've only ever seen it on a system
using wifi configured with WPA2 and CCMP, which uses AES heavily in
softint.
This is to be reverted once we diagnose the bug. (There is also a
performance regression on wifi with WPA2 and CCMP, which I plan to
fix too once we figure out the FPU state handling bug.)
To generate a diff of this commit:
cvs rdiff -u -r1.111 -r1.112 src/sys/arch/x86/x86/identcpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/identcpu.c
diff -u src/sys/arch/x86/x86/identcpu.c:1.111 src/sys/arch/x86/x86/identcpu.c:1.112
--- src/sys/arch/x86/x86/identcpu.c:1.111 Mon Jun 29 23:51:35 2020
+++ src/sys/arch/x86/x86/identcpu.c Mon Jul 20 15:11:29 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu.c,v 1.111 2020/06/29 23:51:35 riastradh Exp $ */
+/* $NetBSD: identcpu.c,v 1.112 2020/07/20 15:11:29 riastradh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.111 2020/06/29 23:51:35 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.112 2020/07/20 15:11:29 riastradh Exp $");
#include "opt_xen.h"
@@ -1000,18 +1000,24 @@ cpu_probe(struct cpu_info *ci)
/* Early patch of text segment. */
x86_patch(true);
#endif
+ /*
+ * XXX There is a bug with FPU in kernel that we
+ * haven't been able to track down yet, and all of the
+ * accelerated AES code relies on that, so it is
+ * disabled temporarily while we diagnose the bug.
+ */
#ifdef __x86_64__ /* not yet implemented on i386 */
- if (cpu_feature[1] & CPUID2_AES)
+ if (0 & cpu_feature[1] & CPUID2_AES)
aes_md_init(&aes_ni_impl);
else
#endif
- if (cpu_feature[4] & CPUID_VIA_HAS_ACE)
+ if (0 & cpu_feature[4] & CPUID_VIA_HAS_ACE)
aes_md_init(&aes_via_impl);
- else if (i386_has_sse && i386_has_sse2 &&
+ else if (0 & i386_has_sse && i386_has_sse2 &&
(cpu_feature[1] & CPUID2_SSE3) &&
(cpu_feature[1] & CPUID2_SSSE3))
aes_md_init(&aes_ssse3_impl);
- else if (i386_has_sse && i386_has_sse2)
+ else if (0 & i386_has_sse && i386_has_sse2)
aes_md_init(&aes_sse2_impl);
} else {
/*
