Module Name: src
Committed By: skrll
Date: Sun Aug 9 08:48:25 UTC 2020
Modified Files:
src/sys/arch/mips/conf: files.mips
Log Message:
defflag foo on each line to make searching easier.
sort some lines and fix some indentation while I'm here.
To generate a diff of this commit:
cvs rdiff -u -r1.76 -r1.77 src/sys/arch/mips/conf/files.mips
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/conf/files.mips
diff -u src/sys/arch/mips/conf/files.mips:1.76 src/sys/arch/mips/conf/files.mips:1.77
--- src/sys/arch/mips/conf/files.mips:1.76 Sun Jan 27 02:08:38 2019
+++ src/sys/arch/mips/conf/files.mips Sun Aug 9 08:48:25 2020
@@ -1,12 +1,12 @@
-# $NetBSD: files.mips,v 1.76 2019/01/27 02:08:38 pgoyette Exp $
+# $NetBSD: files.mips,v 1.77 2020/08/09 08:48:25 skrll Exp $
#
defflag opt_cputype.h NOFPU FPEMUL
- MIPS64_SB1
- ENABLE_MIPS_16KB_PAGE
- ENABLE_MIPS_8KB_PAGE
- MIPS64_XLP MIPS64_XLR MIPS64_XLS
- MIPS64_OCTEON
+defflag opt_cputype.h ENABLE_MIPS_16KB_PAGE
+defflag opt_cputype.h ENABLE_MIPS_8KB_PAGE
+defflag opt_cputype.h MIPS64_OCTEON
+defflag opt_cputype.h MIPS64_SB1
+defflag opt_cputype.h MIPS64_XLP MIPS64_XLR MIPS64_XLS
# and the rest...
# MIPS1 MIPS2 MIPS3 MIPS4 MIPS5
# MIPS3_LOONGSON2
@@ -16,9 +16,10 @@ defflag opt_cputype.h NOFPU FPEMUL
# ENABLE_MIPS_TX3900
# ENABLE_MIPS_R4700
# ENABLE_MIPS_R3NKK
-defflag opt_mips_cache.h MIPS3_NO_PV_UNCACHED
- ENABLE_MIPS4_CACHE_R10K
-defflag opt_mips3_wired.h ENABLE_MIPS3_WIRED_MAP
+defflag opt_mips_cache.h MIPS3_NO_PV_UNCACHED
+defflag opt_mips_cache.h ENABLE_MIPS4_CACHE_R10K
+
+defflag opt_mips3_wired.h ENABLE_MIPS3_WIRED_MAP
defflag opt_ddb.h DDB_TRACE
