Module Name: src
Committed By: skrll
Date: Tue Dec 1 08:39:39 UTC 2020
Modified Files:
src/sys/arch/mips/rmi: rmixl_spl.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/rmi/rmixl_spl.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_spl.S
diff -u src/sys/arch/mips/rmi/rmixl_spl.S:1.5 src/sys/arch/mips/rmi/rmixl_spl.S:1.6
--- src/sys/arch/mips/rmi/rmixl_spl.S:1.5 Sun Jul 26 07:48:07 2020
+++ src/sys/arch/mips/rmi/rmixl_spl.S Tue Dec 1 08:39:39 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_spl.S,v 1.5 2020/07/26 07:48:07 simonb Exp $ */
+/* $NetBSD: rmixl_spl.S,v 1.6 2020/12/01 08:39:39 skrll Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include <mips/asm.h>
#include <mips/cpuregs.h>
-RCSID("$NetBSD: rmixl_spl.S,v 1.5 2020/07/26 07:48:07 simonb Exp $");
+RCSID("$NetBSD: rmixl_spl.S,v 1.6 2020/12/01 08:39:39 skrll Exp $");
#include "assym.h"
@@ -50,7 +50,7 @@ RCSID("$NetBSD: rmixl_spl.S,v 1.5 2020/0
.set noreorder
-/*
+/*
* Array of mask of bits to set in the EIMR when we go to a
* given hardware interrupt priority level.
* The softint bits in [IPL_NONE] and [IPL_SOFTCLOCK] should stay constant
