Module Name: src
Committed By: ryo
Date: Mon Jan 4 05:35:15 UTC 2021
Modified Files:
src/usr.sbin/cpuctl/arch: aarch64.c
Log Message:
sync cpuids[] of sys/arch/aarch64/aarch64/cpu.c r1.43
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/usr.sbin/cpuctl/arch/aarch64.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/usr.sbin/cpuctl/arch/aarch64.c
diff -u src/usr.sbin/cpuctl/arch/aarch64.c:1.12 src/usr.sbin/cpuctl/arch/aarch64.c:1.13
--- src/usr.sbin/cpuctl/arch/aarch64.c:1.12 Sat Oct 10 08:27:41 2020
+++ src/usr.sbin/cpuctl/arch/aarch64.c Mon Jan 4 05:35:14 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64.c,v 1.12 2020/10/10 08:27:41 jmcneill Exp $ */
+/* $NetBSD: aarch64.c,v 1.13 2021/01/04 05:35:14 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu <r...@nerv.org>
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: aarch64.c,v 1.12 2020/10/10 08:27:41 jmcneill Exp $");
+__RCSID("$NetBSD: aarch64.c,v 1.13 2021/01/04 05:35:14 ryo Exp $");
#endif /* no lint */
#include <sys/types.h>
@@ -72,17 +72,25 @@ struct fieldinfo {
#define CPU_PARTMASK (CPU_ID_IMPLEMENTOR_MASK | CPU_ID_PARTNO_MASK)
const struct cpuidtab cpuids[] = {
- { CPU_ID_CORTEXA53R0 & CPU_PARTMASK, "Cortex-A53", "Cortex", "V8-A" },
- { CPU_ID_CORTEXA57R0 & CPU_PARTMASK, "Cortex-A57", "Cortex", "V8-A" },
- { CPU_ID_CORTEXA72R0 & CPU_PARTMASK, "Cortex-A72", "Cortex", "V8-A" },
- { CPU_ID_CORTEXA73R0 & CPU_PARTMASK, "Cortex-A73", "Cortex", "V8-A" },
- { CPU_ID_CORTEXA55R1 & CPU_PARTMASK, "Cortex-A55", "Cortex", "V8.2-A" },
- { CPU_ID_CORTEXA75R2 & CPU_PARTMASK, "Cortex-A75", "Cortex", "V8.2-A" },
- { CPU_ID_CORTEXA76R3 & CPU_PARTMASK, "Cortex-A76", "Cortex", "V8.2-A" },
- { CPU_ID_THUNDERXRX, "Cavium ThunderX", "Cavium", "V8-A" },
- { CPU_ID_THUNDERX81XXRX, "Cavium ThunderX CN81XX", "Cavium", "V8-A" },
- { CPU_ID_THUNDERX83XXRX, "Cavium ThunderX CN83XX", "Cavium", "V8-A" },
- { CPU_ID_THUNDERX2RX, "Cavium ThunderX2", "Cavium", "V8.1-A" },
+ { CPU_ID_CORTEXA35R0 & CPU_PARTMASK, "Cortex-A35", "Arm", "v8-A" },
+ { CPU_ID_CORTEXA53R0 & CPU_PARTMASK, "Cortex-A53", "Arm", "v8-A" },
+ { CPU_ID_CORTEXA57R0 & CPU_PARTMASK, "Cortex-A57", "Arm", "v8-A" },
+ { CPU_ID_CORTEXA55R1 & CPU_PARTMASK, "Cortex-A55", "Arm", "v8.2-A+" },
+ { CPU_ID_CORTEXA65R0 & CPU_PARTMASK, "Cortex-A65", "Arm", "v8.2-A+" },
+ { CPU_ID_CORTEXA72R0 & CPU_PARTMASK, "Cortex-A72", "Arm", "v8-A" },
+ { CPU_ID_CORTEXA73R0 & CPU_PARTMASK, "Cortex-A73", "Arm", "v8-A" },
+ { CPU_ID_CORTEXA75R2 & CPU_PARTMASK, "Cortex-A75", "Arm", "v8.2-A+" },
+ { CPU_ID_CORTEXA76R3 & CPU_PARTMASK, "Cortex-A76", "Arm", "v8.2-A+" },
+ { CPU_ID_CORTEXA76AER1 & CPU_PARTMASK, "Cortex-A76AE", "Arm", "v8.2-A+" },
+ { CPU_ID_CORTEXA77R0 & CPU_PARTMASK, "Cortex-A77", "Arm", "v8.2-A+" },
+ { CPU_ID_NVIDIADENVER2 & CPU_PARTMASK, "Denver2", "NVIDIA", "v8-A" },
+ { CPU_ID_EMAG8180 & CPU_PARTMASK, "eMAG", "Ampere", "v8-A" },
+ { CPU_ID_NEOVERSEE1R1 & CPU_PARTMASK, "Neoverse E1", "Arm", "v8.2-A+" },
+ { CPU_ID_NEOVERSEN1R3 & CPU_PARTMASK, "Neoverse N1", "Arm", "v8.2-A+" },
+ { CPU_ID_THUNDERXRX, "ThunderX", "Cavium", "v8-A" },
+ { CPU_ID_THUNDERX81XXRX, "ThunderX CN81XX", "Cavium", "v8-A" },
+ { CPU_ID_THUNDERX83XXRX, "ThunderX CN83XX", "Cavium", "v8-A" },
+ { CPU_ID_THUNDERX2RX, "ThunderX2", "Marvell", "v8.1-A" },
};
const struct impltab implids[] = {
