Module Name: src
Committed By: skrll
Date: Mon Feb 1 19:31:34 UTC 2021
Modified Files:
src/sys/arch/arm/arm: ast.c compat_13_machdep.c compat_16_machdep.c
process_machdep.c sig_machdep.c syscall.c
src/sys/arch/arm/arm32: fault.c
src/sys/arch/arm/include: locore.h
src/sys/compat/linux/arch/arm: linux_machdep.c
Log Message:
G/C some old code that was for acorn26
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/arm/ast.c
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/arm/compat_13_machdep.c \
src/sys/arch/arm/arm/compat_16_machdep.c
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/arm/process_machdep.c
cvs rdiff -u -r1.51 -r1.52 src/sys/arch/arm/arm/sig_machdep.c
cvs rdiff -u -r1.67 -r1.68 src/sys/arch/arm/arm/syscall.c
cvs rdiff -u -r1.115 -r1.116 src/sys/arch/arm/arm32/fault.c
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/include/locore.h
cvs rdiff -u -r1.32 -r1.33 src/sys/compat/linux/arch/arm/linux_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/ast.c
diff -u src/sys/arch/arm/arm/ast.c:1.31 src/sys/arch/arm/arm/ast.c:1.32
--- src/sys/arch/arm/arm/ast.c:1.31 Thu Nov 21 19:23:59 2019
+++ src/sys/arch/arm/arm/ast.c Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: ast.c,v 1.31 2019/11/21 19:23:59 ad Exp $ */
+/* $NetBSD: ast.c,v 1.32 2021/02/01 19:31:34 skrll Exp $ */
/*
* Copyright (c) 1994,1995 Mark Brinicombe
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ast.c,v 1.31 2019/11/21 19:23:59 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ast.c,v 1.32 2021/02/01 19:31:34 skrll Exp $");
#include "opt_ddb.h"
@@ -91,8 +91,7 @@ userret(struct lwp *l)
/* Invoke MI userret code */
mi_userret(l);
- KASSERT(VALID_R15_PSR(lwp_trapframe(l)->tf_pc,
- lwp_trapframe(l)->tf_spsr));
+ KASSERT(VALID_PSR(lwp_trapframe(l)->tf_spsr));
}
@@ -109,7 +108,7 @@ ast(struct trapframe *tf)
/* Interrupts were restored by exception_exit. */
- KASSERT(VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
+ KASSERT(VALID_PSR(tf->tf_spsr));
#ifdef __HAVE_PREEMPTION
kpreempt_disable();
Index: src/sys/arch/arm/arm/compat_13_machdep.c
diff -u src/sys/arch/arm/arm/compat_13_machdep.c:1.18 src/sys/arch/arm/arm/compat_13_machdep.c:1.19
--- src/sys/arch/arm/arm/compat_13_machdep.c:1.18 Sun Aug 18 06:50:31 2013
+++ src/sys/arch/arm/arm/compat_13_machdep.c Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: compat_13_machdep.c,v 1.18 2013/08/18 06:50:31 matt Exp $ */
+/* $NetBSD: compat_13_machdep.c,v 1.19 2021/02/01 19:31:34 skrll Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -38,7 +38,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.18 2013/08/18 06:50:31 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.19 2021/02/01 19:31:34 skrll Exp $");
#include <sys/systm.h>
#include <sys/signalvar.h>
@@ -76,7 +76,7 @@ compat_13_sys_sigreturn(struct lwp *l, c
* Make sure the processor mode has not been tampered with and
* interrupts have not been disabled.
*/
- if (!VALID_R15_PSR(context.sc_pc, context.sc_spsr))
+ if (!VALID_PSR(context.sc_spsr))
return EINVAL;
/* Restore register context. */
Index: src/sys/arch/arm/arm/compat_16_machdep.c
diff -u src/sys/arch/arm/arm/compat_16_machdep.c:1.18 src/sys/arch/arm/arm/compat_16_machdep.c:1.19
--- src/sys/arch/arm/arm/compat_16_machdep.c:1.18 Wed Jan 24 09:04:44 2018
+++ src/sys/arch/arm/arm/compat_16_machdep.c Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: compat_16_machdep.c,v 1.18 2018/01/24 09:04:44 skrll Exp $ */
+/* $NetBSD: compat_16_machdep.c,v 1.19 2021/02/01 19:31:34 skrll Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -42,7 +42,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: compat_16_machdep.c,v 1.18 2018/01/24 09:04:44 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: compat_16_machdep.c,v 1.19 2021/02/01 19:31:34 skrll Exp $");
#ifdef _KERNEL_OPT
#include "opt_compat_netbsd.h"
@@ -233,7 +233,7 @@ compat_16_sys___sigreturn14(struct lwp *
* Make sure the processor mode has not been tampered with and
* interrupts have not been disabled.
*/
- if (!VALID_R15_PSR(context.sc_pc, context.sc_spsr))
+ if (!VALID_PSR(context.sc_spsr))
return EINVAL;
/* Restore register context. */
Index: src/sys/arch/arm/arm/process_machdep.c
diff -u src/sys/arch/arm/arm/process_machdep.c:1.34 src/sys/arch/arm/arm/process_machdep.c:1.35
--- src/sys/arch/arm/arm/process_machdep.c:1.34 Mon Oct 19 17:47:37 2020
+++ src/sys/arch/arm/arm/process_machdep.c Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: process_machdep.c,v 1.34 2020/10/19 17:47:37 christos Exp $ */
+/* $NetBSD: process_machdep.c,v 1.35 2021/02/01 19:31:34 skrll Exp $ */
/*
* Copyright (c) 1993 The Regents of the University of California.
@@ -135,7 +135,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.34 2020/10/19 17:47:37 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.35 2021/02/01 19:31:34 skrll Exp $");
#include <sys/proc.h>
#include <sys/ptrace.h>
@@ -160,7 +160,7 @@ process_read_regs(struct lwp *l, struct
regs->r_pc = tf->tf_pc;
regs->r_cpsr = tf->tf_spsr;
- KASSERT(VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
+ KASSERT(VALID_PSR(tf->tf_spsr));
#ifdef THUMB_CODE
if (tf->tf_spsr & PSR_T_bit)
@@ -202,7 +202,7 @@ process_write_regs(struct lwp *l, const
if ((regs->r_pc & 1) || (regs->r_cpsr & PSR_T_bit))
tf->tf_spsr |= PSR_T_bit;
#endif
- KASSERT(VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
+ KASSERT(VALID_PSR(tf->tf_spsr));
return 0;
}
Index: src/sys/arch/arm/arm/sig_machdep.c
diff -u src/sys/arch/arm/arm/sig_machdep.c:1.51 src/sys/arch/arm/arm/sig_machdep.c:1.52
--- src/sys/arch/arm/arm/sig_machdep.c:1.51 Tue Nov 27 14:09:53 2018
+++ src/sys/arch/arm/arm/sig_machdep.c Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sig_machdep.c,v 1.51 2018/11/27 14:09:53 maxv Exp $ */
+/* $NetBSD: sig_machdep.c,v 1.52 2021/02/01 19:31:34 skrll Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -44,7 +44,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: sig_machdep.c,v 1.51 2018/11/27 14:09:53 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sig_machdep.c,v 1.52 2021/02/01 19:31:34 skrll Exp $");
#include <sys/mount.h> /* XXX only needed by syscallargs.h */
#include <sys/cpu.h>
@@ -182,8 +182,7 @@ cpu_getmcontext(struct lwp *l, mcontext_
gr[_REG_PC] = tf->tf_pc;
gr[_REG_CPSR] = tf->tf_spsr;
- KASSERTMSG(VALID_R15_PSR(gr[_REG_PC], gr[_REG_CPSR]), "%#x %#x",
- gr[_REG_PC], gr[_REG_CPSR]);
+ KASSERTMSG(VALID_PSR(gr[_REG_CPSR]), "%#x", gr[_REG_CPSR]);
if ((ras_pc = (__greg_t)ras_lookup(l->l_proc,
(void *) gr[_REG_PC])) != -1)
@@ -208,7 +207,7 @@ cpu_mcontext_validate(struct lwp *l, con
const __greg_t * const gr = mcp->__gregs;
/* Make sure the processor mode has not been tampered with. */
- if (!VALID_R15_PSR(gr[_REG_PC], gr[_REG_CPSR]))
+ if (!VALID_PSR(gr[_REG_CPSR]))
return EINVAL;
return 0;
}
Index: src/sys/arch/arm/arm/syscall.c
diff -u src/sys/arch/arm/arm/syscall.c:1.67 src/sys/arch/arm/arm/syscall.c:1.68
--- src/sys/arch/arm/arm/syscall.c:1.67 Sat Apr 6 11:54:20 2019
+++ src/sys/arch/arm/arm/syscall.c Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: syscall.c,v 1.67 2019/04/06 11:54:20 kamil Exp $ */
+/* $NetBSD: syscall.c,v 1.68 2021/02/01 19:31:34 skrll Exp $ */
/*-
* Copyright (c) 2000, 2003 The NetBSD Foundation, Inc.
@@ -71,7 +71,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: syscall.c,v 1.67 2019/04/06 11:54:20 kamil Exp $");
+__KERNEL_RCSID(0, "$NetBSD: syscall.c,v 1.68 2021/02/01 19:31:34 skrll Exp $");
#include <sys/cpu.h>
#include <sys/device.h>
@@ -101,7 +101,7 @@ swi_handler(trapframe_t *tf)
* Since all syscalls *should* come from user mode it will always
* be safe to enable them, but check anyway.
*/
- KASSERT(VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
+ KASSERT(VALID_PSR(tf->tf_spsr));
restore_interrupts(tf->tf_spsr & IF32_bits);
#ifndef THUMB_CODE
Index: src/sys/arch/arm/arm32/fault.c
diff -u src/sys/arch/arm/arm32/fault.c:1.115 src/sys/arch/arm/arm32/fault.c:1.116
--- src/sys/arch/arm/arm32/fault.c:1.115 Fri Jan 29 07:58:57 2021
+++ src/sys/arch/arm/arm32/fault.c Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: fault.c,v 1.115 2021/01/29 07:58:57 skrll Exp $ */
+/* $NetBSD: fault.c,v 1.116 2021/02/01 19:31:34 skrll Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -82,7 +82,7 @@
#include "opt_multiprocessor.h"
#include <sys/types.h>
-__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.115 2021/01/29 07:58:57 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.116 2021/02/01 19:31:34 skrll Exp $");
#include <sys/param.h>
@@ -250,7 +250,7 @@ data_abort_handler(trapframe_t *tf)
ci->ci_data.cpu_ntrap++;
/* Re-enable interrupts if they were enabled previously */
- KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
+ KASSERT(!TRAP_USERMODE(tf) || VALID_PSR(tf->tf_spsr));
#ifdef __NO_FIQ
if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
restore_interrupts(tf->tf_spsr & IF32_bits);
@@ -830,7 +830,7 @@ prefetch_abort_handler(trapframe_t *tf)
* from user mode so we know interrupts were not disabled.
* But we check anyway.
*/
- KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
+ KASSERT(!TRAP_USERMODE(tf) || VALID_PSR(tf->tf_spsr));
#ifdef __NO_FIQ
if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
restore_interrupts(tf->tf_spsr & IF32_bits);
@@ -842,7 +842,7 @@ prefetch_abort_handler(trapframe_t *tf)
/* See if the CPU state needs to be fixed up */
switch (prefetch_abort_fixup(tf)) {
case ABORT_FIXUP_RETURN:
- KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
+ KASSERT(!TRAP_USERMODE(tf) || VALID_PSR(tf->tf_spsr));
return;
case ABORT_FIXUP_FAILED:
/* Deliver a SIGILL to the process */
@@ -941,7 +941,7 @@ out:
}
#endif /* THUMB_CODE */
- KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
+ KASSERT(!TRAP_USERMODE(tf) || VALID_PSR(tf->tf_spsr));
userret(l);
}
Index: src/sys/arch/arm/include/locore.h
diff -u src/sys/arch/arm/include/locore.h:1.35 src/sys/arch/arm/include/locore.h:1.36
--- src/sys/arch/arm/include/locore.h:1.35 Tue Dec 1 02:48:29 2020
+++ src/sys/arch/arm/include/locore.h Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.35 2020/12/01 02:48:29 rin Exp $ */
+/* $NetBSD: locore.h,v 1.36 2021/02/01 19:31:34 skrll Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -120,11 +120,11 @@
*/
#ifdef __NO_FIQ
-#define VALID_R15_PSR(r15,psr) \
- (((psr) & PSR_MODE) == PSR_USR32_MODE && ((psr) & I32_bit) == 0)
+#define VALID_PSR(psr) \
+ (((psr) & PSR_MODE) == PSR_USR32_MODE && ((psr) & I32_bit) == 0)
#else
-#define VALID_R15_PSR(r15,psr) \
- (((psr) & PSR_MODE) == PSR_USR32_MODE && ((psr) & IF32_bits) == 0)
+#define VALID_PSR(psr) \
+ (((psr) & PSR_MODE) == PSR_USR32_MODE && ((psr) & IF32_bits) == 0)
#endif
/*
Index: src/sys/compat/linux/arch/arm/linux_machdep.c
diff -u src/sys/compat/linux/arch/arm/linux_machdep.c:1.32 src/sys/compat/linux/arch/arm/linux_machdep.c:1.33
--- src/sys/compat/linux/arch/arm/linux_machdep.c:1.32 Sun Nov 9 17:48:07 2014
+++ src/sys/compat/linux/arch/arm/linux_machdep.c Mon Feb 1 19:31:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: linux_machdep.c,v 1.32 2014/11/09 17:48:07 maxv Exp $ */
+/* $NetBSD: linux_machdep.c,v 1.33 2021/02/01 19:31:34 skrll Exp $ */
/*-
* Copyright (c) 1995, 2000 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: linux_machdep.c,v 1.32 2014/11/09 17:48:07 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: linux_machdep.c,v 1.33 2021/02/01 19:31:34 skrll Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -214,7 +214,7 @@ linux_sys_sigreturn(struct lwp *l, const
* Make sure the processor mode has not been tampered with and
* interrupts have not been disabled.
*/
- if (!VALID_R15_PSR(frame.sf_sc.sc_pc, frame.sf_sc.sc_cpsr))
+ if (!VALID_PSR(frame.sf_sc.sc_cpsr))
return EINVAL;
/* Restore register context. */
