Module Name: src
Committed By: jmcneill
Date: Tue Feb 16 22:12:50 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic.c pic_splfuncs.c
Log Message:
pic: avoid pic_do_pending_ints if pic_mark_pending_* has never been called
To generate a diff of this commit:
cvs rdiff -u -r1.64 -r1.65 src/sys/arch/arm/pic/pic.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.64 src/sys/arch/arm/pic/pic.c:1.65
--- src/sys/arch/arm/pic/pic.c:1.64 Mon Feb 15 16:32:07 2021
+++ src/sys/arch/arm/pic/pic.c Tue Feb 16 22:12:49 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.64 2021/02/15 16:32:07 jmcneill Exp $ */
+/* $NetBSD: pic.c,v 1.65 2021/02/16 22:12:49 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -33,7 +33,7 @@
#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.64 2021/02/15 16:32:07 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.65 2021/02/16 22:12:49 jmcneill Exp $");
#include <sys/param.h>
#include <sys/atomic.h>
@@ -59,6 +59,9 @@ __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.64
#include <arm/pic/picvar.h>
#if defined(__HAVE_PIC_PENDING_INTRS)
+
+bool pic_pending_used __read_mostly = false;
+
/*
* This implementation of pending interrupts on a MULTIPROCESSOR system makes
* the assumption that a PIC (pic_softc) shall only have all its interrupts
@@ -279,6 +282,9 @@ pic_mark_pending_source(struct pic_softc
{
const uint32_t ipl_mask = __BIT(is->is_ipl);
+ if (!pic_pending_used)
+ pic_pending_used = true;
+
atomic_or_32(&pic->pic_pending_irqs[is->is_irq >> 5],
__BIT(is->is_irq & 0x1f));
@@ -309,6 +315,9 @@ pic_mark_pending_sources(struct pic_soft
volatile uint32_t *ipending = &pic->pic_pending_irqs[irq_base >> 5];
uint32_t ipl_mask = 0;
+ if (!pic_pending_used)
+ pic_pending_used = true;
+
if (pending == 0)
return ipl_mask;
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.12 src/sys/arch/arm/pic/pic_splfuncs.c:1.13
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.12 Mon Feb 15 16:32:07 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Tue Feb 16 22:12:50 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.12 2021/02/15 16:32:07 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.13 2021/02/16 22:12:50 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.12 2021/02/15 16:32:07 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.13 2021/02/16 22:12:50 jmcneill Exp $");
#define _INTR_PRIVATE
#include <sys/param.h>
@@ -46,6 +46,11 @@ __KERNEL_RCSID(0, "$NetBSD: pic_splfuncs
#include <arm/pic/picvar.h>
+#if defined(__HAVE_PIC_PENDING_INTRS)
+extern bool pic_pending_used;
+#else
+#define pic_pending_used false
+#endif
int
_splraise(int newipl)
@@ -65,12 +70,16 @@ _spllower(int newipl)
const int oldipl = ci->ci_cpl;
KASSERT(panicstr || newipl <= ci->ci_cpl);
if (newipl < ci->ci_cpl) {
- register_t psw = cpsid(I32_bit);
- ci->ci_intr_depth++;
- pic_do_pending_ints(psw, newipl, NULL);
- ci->ci_intr_depth--;
- if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
- cpsie(I32_bit);
+ if (__predict_false(pic_pending_used)) {
+ register_t psw = cpsid(I32_bit);
+ ci->ci_intr_depth++;
+ pic_do_pending_ints(psw, newipl, NULL);
+ ci->ci_intr_depth--;
+ if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
+ cpsie(I32_bit);
+ } else {
+ pic_set_priority(ci, newipl);
+ }
cpu_dosoftints();
}
return oldipl;
@@ -86,21 +95,26 @@ splx(int savedipl)
return;
}
- register_t psw = cpsid(I32_bit);
- KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
- "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
-
- if ((psw & I32_bit) == 0) {
- ci->ci_intr_depth++;
- pic_do_pending_ints(psw, savedipl, NULL);
- ci->ci_intr_depth--;
- KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
- ci->ci_cpl, savedipl);
+ if (__predict_false(pic_pending_used)) {
+ register_t psw = cpsid(I32_bit);
+ KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
+ "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
- cpsie(I32_bit);
- cpu_dosoftints();
+ if ((psw & I32_bit) == 0) {
+ ci->ci_intr_depth++;
+ pic_do_pending_ints(psw, savedipl, NULL);
+ ci->ci_intr_depth--;
+ KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
+ ci->ci_cpl, savedipl);
+
+ cpsie(I32_bit);
+ cpu_dosoftints();
+ } else {
+ pic_set_priority_psw(ci, psw, savedipl);
+ }
} else {
- pic_set_priority_psw(ci, psw, savedipl);
+ pic_set_priority(ci, savedipl);
+ cpu_dosoftints();
}
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
