Module Name: src
Committed By: ryo
Date: Tue Feb 23 14:50:33 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: idle_machdep.S
Log Message:
Just a few optimizations.
- in cpu_idle(), ci_intr_depth is always 0, so there is no need to fetch for
increment or conditional branch.
- curcpu() is immutable in idle lwp, there is no need to consider KPREEMPT.
Therefore, get curcpu() first and keep using it.
- add more comment.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/idle_machdep.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/idle_machdep.S
diff -u src/sys/arch/aarch64/aarch64/idle_machdep.S:1.8 src/sys/arch/aarch64/aarch64/idle_machdep.S:1.9
--- src/sys/arch/aarch64/aarch64/idle_machdep.S:1.8 Sun Feb 21 23:37:09 2021
+++ src/sys/arch/aarch64/aarch64/idle_machdep.S Tue Feb 23 14:50:33 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.S,v 1.8 2021/02/21 23:37:09 jmcneill Exp $ */
+/* $NetBSD: idle_machdep.S,v 1.9 2021/02/23 14:50:33 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include <aarch64/locore.h>
#include "assym.h"
-RCSID("$NetBSD: idle_machdep.S,v 1.8 2021/02/21 23:37:09 jmcneill Exp $");
+RCSID("$NetBSD: idle_machdep.S,v 1.9 2021/02/23 14:50:33 ryo Exp $");
#ifdef ARM_INTR_IMPL
#include ARM_INTR_IMPL
@@ -75,28 +75,34 @@ ENTRY(cpu_idle)
adr x0, 1f
str x0, [sp, #TF_PC] /* CLKF_PC refer to tf_pc */
+ /*
+ * "idle/N" lwp is allocated on a per-CPU basis,
+ * curcpu() always return the same, and there is no need to
+ * consider KPREEMPT. safe even with interrupt enabled.
+ */
mrs x1, tpidr_el1 /* get curlwp */
- ldr x1, [x1, #L_CPU] /* get curcpu */
- ldr w28, [x1, #CI_INTR_DEPTH] /* w28 = ci->ci_intr_depth */
- add w2, w28, #1 /* w2 = intr_depth + 1 */
+ ldr x28, [x1, #L_CPU] /* get curcpu */
+ mov w2, #1
mov x0, sp /* get pointer to trapframe */
DISABLE_INTERRUPT
- wfi
+ /*
+ * assert(ci->ci_intr_depth == 0),
+ * therefore, ci->ci_intr_depth++ would be definitely 1.
+ */
+ str w2, [x28, #CI_INTR_DEPTH] /* ci->ci_intr_depth = 1 */
- str w2, [x1, #CI_INTR_DEPTH] /* ci->ci_intr_depth++ */
+ wfi
bl ARM_IRQ_HANDLER /* irqhandler(trapframe) */
1:
- mrs x1, tpidr_el1 /* get curlwp */
- ldr x1, [x1, #L_CPU] /* get curcpu */
- str w28, [x1, #CI_INTR_DEPTH] /* ci->ci_intr_depth = old */
+ /* x28 is curcpu() */
+ str wzr, [x28, #CI_INTR_DEPTH] /* ci->ci_intr_depth = 0 */
#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
- cbnz w28, 1f /* Skip if intr_depth > 0 */
- ldr w3, [x1, #CI_SOFTINTS] /* Get pending softint mask */
+ ldr w3, [x28, #CI_SOFTINTS] /* Get pending softint mask */
/* CPL should be 0 */
- ldr w2, [x1, #CI_CPL] /* Get current priority level */
+ ldr w2, [x28, #CI_CPL] /* Get current priority level */
lsr w3, w3, w2 /* shift mask by cpl */
cbz w3, 1f
bl _C_LABEL(dosoftints) /* dosoftints() */
