Module Name: src
Committed By: skrll
Date: Sun Mar 28 09:11:38 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: gic.c
Log Message:
Only target the boot cpu for real with SPI interrupts. I tried to do
this back in 2014, but somehow I missed a spot.
This is a quick-and-dirty fix for the USB stack which expects transfer
completions to be in-order. If interrupts happen across the CPUs then
this isn't guaranteed (yet).
kern/55243 panic at usb_transfer_complete() on raspberry pi 4
To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/arm/cortex/gic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.46 src/sys/arch/arm/cortex/gic.c:1.47
--- src/sys/arch/arm/cortex/gic.c:1.46 Tue Feb 23 10:03:04 2021
+++ src/sys/arch/arm/cortex/gic.c Sun Mar 28 09:11:38 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.46 2021/02/23 10:03:04 jmcneill Exp $ */
+/* $NetBSD: gic.c,v 1.47 2021/03/28 09:11:38 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -34,7 +34,7 @@
#define _INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.46 2021/02/23 10:03:04 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.47 2021/03/28 09:11:38 skrll Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -517,7 +517,11 @@ armgic_cpu_init_targets(struct armgic_so
if (is != NULL && is->is_mpsafe) {
const u_int byte_shift = 8 * (irq & 3);
uint32_t targets = gicd_read(sc, targets_reg);
+#if 0
targets |= sc->sc_mptargets << byte_shift;
+#else
+ targets |= sc->sc_bptargets << byte_shift;
+#endif
gicd_write(sc, targets_reg, targets);
}
}
