Module Name: src
Committed By: martin
Date: Sun Apr 25 11:13:03 UTC 2021
Modified Files:
src/sys/arch/arm/dts [netbsd-9]: sun50i-h5.dtsi
src/sys/arch/arm/sunxi [netbsd-9]: sun8i_crypto.c sun8i_h3_ccu.c
Log Message:
Pull up following revision(s) (requested by riastradh in ticket #1252):
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.18 (patch)
sys/arch/arm/sunxi/sun8i_crypto.c: revision 1.24 (patch)
sys/arch/arm/dts/sun50i-h5.dtsi: revision 1.2 (patch)
arm/sunxi: Wire up sun8icrypto(4) on Allwinner H5.
Tested on NanoPi Neo PLUS2.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.1.8.1 src/sys/arch/arm/dts/sun50i-h5.dtsi
cvs rdiff -u -r1.14.2.2 -r1.14.2.3 src/sys/arch/arm/sunxi/sun8i_crypto.c
cvs rdiff -u -r1.16 -r1.16.4.1 src/sys/arch/arm/sunxi/sun8i_h3_ccu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/sun50i-h5.dtsi
diff -u src/sys/arch/arm/dts/sun50i-h5.dtsi:1.1 src/sys/arch/arm/dts/sun50i-h5.dtsi:1.1.8.1
--- src/sys/arch/arm/dts/sun50i-h5.dtsi:1.1 Sun Jan 28 18:31:15 2018
+++ src/sys/arch/arm/dts/sun50i-h5.dtsi Sun Apr 25 11:13:03 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-h5.dtsi,v 1.1 2018/01/28 18:31:15 jmcneill Exp $ */
+/* $NetBSD: sun50i-h5.dtsi,v 1.1.8.1 2021/04/25 11:13:03 martin Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcne...@invisible.ca>
@@ -28,6 +28,19 @@
#include "sun8i-h3.dtsi"
+/ {
+ soc {
+ crypto: crypto@1c15000 {
+ compatible = "allwinner,sun50i-h5-crypto";
+ reg = <0x01c15000 0x1000>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_CE>;
+ };
+ };
+};
+
&rtp {
compatible = "allwinner,sun50i-h5-ts";
};
Index: src/sys/arch/arm/sunxi/sun8i_crypto.c
diff -u src/sys/arch/arm/sunxi/sun8i_crypto.c:1.14.2.2 src/sys/arch/arm/sunxi/sun8i_crypto.c:1.14.2.3
--- src/sys/arch/arm/sunxi/sun8i_crypto.c:1.14.2.2 Mon May 18 18:45:40 2020
+++ src/sys/arch/arm/sunxi/sun8i_crypto.c Sun Apr 25 11:13:03 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_crypto.c,v 1.14.2.2 2020/05/18 18:45:40 martin Exp $ */
+/* $NetBSD: sun8i_crypto.c,v 1.14.2.3 2021/04/25 11:13:03 martin Exp $ */
/*-
* Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun8i_crypto.c,v 1.14.2.2 2020/05/18 18:45:40 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_crypto.c,v 1.14.2.3 2021/04/25 11:13:03 martin Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -209,6 +209,7 @@ CFATTACH_DECL_NEW(sun8i_crypto, sizeof(s
static const struct of_compat_data compat_data[] = {
{"allwinner,sun50i-a64-crypto", 0},
+ {"allwinner,sun50i-h5-crypto", 0},
{NULL}
};
Index: src/sys/arch/arm/sunxi/sun8i_h3_ccu.c
diff -u src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.16 src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.16.4.1
--- src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.16 Thu Jan 31 01:49:28 2019
+++ src/sys/arch/arm/sunxi/sun8i_h3_ccu.c Sun Apr 25 11:13:03 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_h3_ccu.c,v 1.16 2019/01/31 01:49:28 jmcneill Exp $ */
+/* $NetBSD: sun8i_h3_ccu.c,v 1.16.4.1 2021/04/25 11:13:03 martin Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.16 2019/01/31 01:49:28 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.16.4.1 2021/04/25 11:13:03 martin Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -60,6 +60,7 @@ __KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu
#define SDMMC0_CLK_REG 0x088
#define SDMMC1_CLK_REG 0x08c
#define SDMMC2_CLK_REG 0x090
+#define CE_CLK_REG 0x09c
#define SPI0_CLK_REG 0x0a0
#define SPI1_CLK_REG 0x0a4
#define USBPHY_CFG_REG 0x0cc
@@ -154,6 +155,7 @@ static const char *ahb1_parents[] = { "l
static const char *ahb2_parents[] = { "ahb1", "pll_periph0" };
static const char *apb1_parents[] = { "ahb1" };
static const char *apb2_parents[] = { "losc", "hosc", "pll_periph0" };
+static const char *ce_parents[] = { "hosc", "pll_periph0_2x", "pll_periph1_2x" };
static const char *mod_parents[] = { "hosc", "pll_periph0", "pll_periph1" };
static const char *ths_parents[] = { "hosc" };
static const char *de_parents[] = { "pll_periph0_2x", "pll_de" };
@@ -329,6 +331,14 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
0, /* enable */
SUNXI_CCU_NM_POWER_OF_TWO),
+ SUNXI_CCU_NM(H3_CLK_CE, "ce", ce_parents,
+ CE_CLK_REG, /* reg */
+ __BITS(17,16), /* n */
+ __BITS(3,0), /* m */
+ __BITS(25,24), /* sel */
+ __BIT(31), /* enable */
+ SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+
SUNXI_CCU_DIV_GATE(H3_CLK_THS, "ths", ths_parents,
THS_CLK_REG, /* reg */
__BITS(1,0), /* div */
@@ -400,6 +410,8 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
__BIT(31), /* enable */
0),
+ SUNXI_CCU_GATE(H3_CLK_BUS_CE, "bus-ce", "ahb1",
+ BUS_CLK_GATING_REG0, 5),
SUNXI_CCU_GATE(H3_CLK_BUS_DMA, "bus-dma", "ahb1",
BUS_CLK_GATING_REG0, 6),
SUNXI_CCU_GATE(H3_CLK_BUS_MMC0, "bus-mmc0", "ahb1",
