Module Name: src
Committed By: thorpej
Date: Fri Jun 25 13:41:34 UTC 2021
Modified Files:
src/sys/arch/alpha/pci: pci_2100_a50.c pci_axppci_33.c sio_pic.c
siovar.h
Log Message:
Reduce code duplication among platforms that use the i82378 SIO to
route PCI interrupts to the ISA PIC by refactoring it into a new
sio_pirq_intr_map() function.
To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/alpha/pci/pci_2100_a50.c
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/alpha/pci/pci_axppci_33.c
cvs rdiff -u -r1.48 -r1.49 src/sys/arch/alpha/pci/sio_pic.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/alpha/pci/siovar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/alpha/pci/pci_2100_a50.c
diff -u src/sys/arch/alpha/pci/pci_2100_a50.c:1.43 src/sys/arch/alpha/pci/pci_2100_a50.c:1.44
--- src/sys/arch/alpha/pci/pci_2100_a50.c:1.43 Sat Jun 19 16:59:07 2021
+++ src/sys/arch/alpha/pci/pci_2100_a50.c Fri Jun 25 13:41:33 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_2100_a50.c,v 1.43 2021/06/19 16:59:07 thorpej Exp $ */
+/* $NetBSD: pci_2100_a50.c,v 1.44 2021/06/25 13:41:33 thorpej Exp $ */
/*
* Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -29,7 +29,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.43 2021/06/19 16:59:07 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.44 2021/06/25 13:41:33 thorpej Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -57,21 +57,10 @@ __KERNEL_RCSID(0, "$NetBSD: pci_2100_a50
static int dec_2100_a50_intr_map(const struct pci_attach_args *,
pci_intr_handle_t *);
-#define APECS_SIO_DEVICE 7 /* XXX */
-
static void
pci_2100_a50_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt,
pci_chipset_tag_t pc)
{
- pcireg_t sioclass;
- int sioII;
-
- /* XXX MAGIC NUMBER */
- sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG);
- sioII = (sioclass & 0xff) >= 3;
-
- if (!sioII)
- printf("WARNING: SIO NOT SIO II... NO BETS...\n");
pc->pc_intr_v = core;
pc->pc_intr_map = dec_2100_a50_intr_map;
@@ -98,8 +87,6 @@ dec_2100_a50_intr_map(const struct pci_a
int buspin = pa->pa_intrpin;
pci_chipset_tag_t pc = pa->pa_pc;
int device, pirq;
- pcireg_t pirqreg;
- uint8_t pirqline;
#ifndef DIAGNOSTIC
pirq = 0; /* XXX gcc -Wuninitialized */
@@ -189,22 +176,10 @@ dec_2100_a50_intr_map(const struct pci_a
return 1;
}
- pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0),
- SIO_PCIREG_PIRQ_RTCTRL);
-#if 0
- printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d, reg = %x\n",
- device, '@' + buspin, pirq, pirqreg);
-#endif
- pirqline = (pirqreg >> (pirq * 8)) & 0xff;
- if ((pirqline & 0x80) != 0)
- return 1;
- pirqline &= 0xf;
-
#if 0
- printf("pci_2100_a50_intr_map: device %d pin %c: mapped to line %d\n",
- device, '@' + buspin, pirqline);
+ printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d\n",
+ device, '@' + buspin, pirq);
#endif
- alpha_pci_intr_handle_init(ihp, pirqline, 0);
- return (0);
+ return sio_pirq_intr_map(pc, pirq, ihp);
}
Index: src/sys/arch/alpha/pci/pci_axppci_33.c
diff -u src/sys/arch/alpha/pci/pci_axppci_33.c:1.40 src/sys/arch/alpha/pci/pci_axppci_33.c:1.41
--- src/sys/arch/alpha/pci/pci_axppci_33.c:1.40 Sat Jun 19 16:59:07 2021
+++ src/sys/arch/alpha/pci/pci_axppci_33.c Fri Jun 25 13:41:33 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_axppci_33.c,v 1.40 2021/06/19 16:59:07 thorpej Exp $ */
+/* $NetBSD: pci_axppci_33.c,v 1.41 2021/06/25 13:41:33 thorpej Exp $ */
/*
* Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -29,7 +29,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: pci_axppci_33.c,v 1.40 2021/06/19 16:59:07 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_axppci_33.c,v 1.41 2021/06/25 13:41:33 thorpej Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -57,22 +57,10 @@ __KERNEL_RCSID(0, "$NetBSD: pci_axppci_3
static int dec_axppci_33_intr_map(const struct pci_attach_args *,
pci_intr_handle_t *);
-#define LCA_SIO_DEVICE 7 /* XXX */
-
static void
pci_axppci_33_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt,
pci_chipset_tag_t pc)
{
- pcireg_t sioclass;
- int sioII;
-
- /* XXX MAGIC NUMBER */
- sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, LCA_SIO_DEVICE, 0),
- PCI_CLASS_REG);
- sioII = (sioclass & 0xff) >= 3;
-
- if (!sioII)
- printf("WARNING: SIO NOT SIO II... NO BETS...\n");
pc->pc_intr_v = core;
pc->pc_intr_map = dec_axppci_33_intr_map;
@@ -99,8 +87,6 @@ dec_axppci_33_intr_map(const struct pci_
int buspin = pa->pa_intrpin;
pci_chipset_tag_t pc = pa->pa_pc;
int device, pirq;
- pcireg_t pirqreg;
- uint8_t pirqline;
#ifndef DIAGNOSTIC
pirq = 0; /* XXX gcc -Wuninitialized */
@@ -189,22 +175,10 @@ dec_axppci_33_intr_map(const struct pci_
return 1;
}
- pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, LCA_SIO_DEVICE, 0),
- SIO_PCIREG_PIRQ_RTCTRL);
-#if 0
- printf("dec_axppci_33_intr_map: device %d pin %c: pirq %d, reg = %x\n",
- device, '@' + buspin, pirq, pirqreg);
-#endif
- pirqline = (pirqreg >> (pirq * 8)) & 0xff;
- if ((pirqline & 0x80) != 0)
- return 1; /* not routed? */
- pirqline &= 0xf;
-
#if 0
- printf("dec_axppci_33_intr_map: device %d pin %c: mapped to line %d\n",
- device, '@' + buspin, pirqline);
+ printf("dec_axppci_33_intr_map: device %d pin %c: pirq %d\n",
+ device, '@' + buspin, pirq);
#endif
- alpha_pci_intr_handle_init(ihp, pirqline, 0);
- return (0);
+ return sio_pirq_intr_map(pc, pirq, ihp);
}
Index: src/sys/arch/alpha/pci/sio_pic.c
diff -u src/sys/arch/alpha/pci/sio_pic.c:1.48 src/sys/arch/alpha/pci/sio_pic.c:1.49
--- src/sys/arch/alpha/pci/sio_pic.c:1.48 Sat May 8 00:08:43 2021
+++ src/sys/arch/alpha/pci/sio_pic.c Fri Jun 25 13:41:33 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sio_pic.c,v 1.48 2021/05/08 00:08:43 thorpej Exp $ */
+/* $NetBSD: sio_pic.c,v 1.49 2021/06/25 13:41:33 thorpej Exp $ */
/*-
* Copyright (c) 1998, 2000, 2020 The NetBSD Foundation, Inc.
@@ -59,7 +59,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: sio_pic.c,v 1.48 2021/05/08 00:08:43 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sio_pic.c,v 1.49 2021/06/25 13:41:33 thorpej Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -84,6 +84,7 @@ __KERNEL_RCSID(0, "$NetBSD: sio_pic.c,v
#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
+#include <alpha/pci/sioreg.h>
#include <alpha/pci/siovar.h>
#include "sio.h"
@@ -531,6 +532,36 @@ sio_intr_disestablish(void *v, void *coo
alpha_shared_intr_free_intrhand(cookie);
}
+/* XXX All known Alpha systems with Intel i82378 have it at device 7. */
+#define SIO_I82378_DEV 7
+
+int
+sio_pirq_intr_map(pci_chipset_tag_t pc, int pirq, pci_intr_handle_t *ihp)
+{
+ KASSERT(pirq >= 0 && pirq <= 3);
+ KASSERT(pc == sio_pc);
+
+ const pcireg_t rtctrl =
+ pci_conf_read(sio_pc, pci_make_tag(sio_pc, 0, SIO_I82378_DEV, 0),
+ SIO_PCIREG_PIRQ_RTCTRL);
+ const pcireg_t pirqreg = PIRQ_RTCTRL_PIRQx(rtctrl, pirq);
+
+ if (pirqreg & PIRQ_RTCTRL_NOT_ROUTED) {
+ /* not routed -> no mapping */
+ return 1;
+ }
+
+ const int irq = __SHIFTOUT(pirqreg, PIRQ_RTCTRL_IRQ);
+
+#if 0
+ printf("sio_pirq_intr_map: pirq %d -> ISA irq %d, rtctl = 0x%08x\n",
+ pirq, irq, rtctrl);
+#endif
+
+ alpha_pci_intr_handle_init(ihp, irq, 0);
+ return 0;
+}
+
const char *
sio_pci_intr_string(pci_chipset_tag_t const pc, pci_intr_handle_t const ih,
char * const buf, size_t const len)
Index: src/sys/arch/alpha/pci/siovar.h
diff -u src/sys/arch/alpha/pci/siovar.h:1.13 src/sys/arch/alpha/pci/siovar.h:1.14
--- src/sys/arch/alpha/pci/siovar.h:1.13 Tue Sep 22 15:24:02 2020
+++ src/sys/arch/alpha/pci/siovar.h Fri Jun 25 13:41:33 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: siovar.h,v 1.13 2020/09/22 15:24:02 thorpej Exp $ */
+/* $NetBSD: siovar.h,v 1.14 2021/06/25 13:41:33 thorpej Exp $ */
/*
* Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -37,6 +37,7 @@ void *sio_intr_establish(void *, int, in
void sio_intr_disestablish(void *, void *);
int sio_intr_alloc(void *, int, int, int *);
+int sio_pirq_intr_map(pci_chipset_tag_t, int, pci_intr_handle_t *);
const char *sio_pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t,
char *, size_t);
const struct evcnt *sio_pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
