Module Name: src
Committed By: phx
Date: Wed May 12 18:33:09 UTC 2010
Modified Files:
src/sys/arch/sandpoint/stand/netboot: brdsetup.c
Log Message:
Typo: DHB should be DMB (most significant bye, not high byte).
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/sandpoint/stand/netboot/brdsetup.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sandpoint/stand/netboot/brdsetup.c
diff -u src/sys/arch/sandpoint/stand/netboot/brdsetup.c:1.11 src/sys/arch/sandpoint/stand/netboot/brdsetup.c:1.12
--- src/sys/arch/sandpoint/stand/netboot/brdsetup.c:1.11 Sat May 8 19:41:07 2010
+++ src/sys/arch/sandpoint/stand/netboot/brdsetup.c Wed May 12 18:33:09 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: brdsetup.c,v 1.11 2010/05/08 19:41:07 phx Exp $ */
+/* $NetBSD: brdsetup.c,v 1.12 2010/05/12 18:33:09 phx Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -54,7 +54,7 @@
unsigned uart2base; /* optional satellite processor */
#define THR 0
#define DLB 0
-#define DHB 1
+#define DMB 1
#define IER 1
#define FCR 2
#define LCR 3
@@ -88,7 +88,7 @@
div = busclock / speed / 16;
UART_WRITE(base, LCR, 0x80); /* turn on DLAB bit */
UART_WRITE(base, FCR, 0x00);
- UART_WRITE(base, DHB, div >> 8); /* set speed */
+ UART_WRITE(base, DMB, div >> 8); /* set speed */
UART_WRITE(base, DLB, div & 0xff);
UART_WRITE(base, LCR, lcr);
UART_WRITE(base, FCR, 0x07); /* FIFO on, TXRX FIFO reset */
