Module Name:    src
Committed By:   tsutsui
Date:           Sun Jun 13 02:11:23 UTC 2010

Modified Files:
        src/sys/arch/acorn32/include: intr.h
        src/sys/arch/arm/arm32: intr.c
        src/sys/arch/arm/at91: at91aic.c
        src/sys/arch/arm/ep93xx: ep93xx_intr.c
        src/sys/arch/arm/footbridge/isa: isa_machdep.c
        src/sys/arch/arm/ixp12x0: ixp12x0_intr.c
        src/sys/arch/arm/xscale: i80321_icu.c ixp425_intr.c pxa2x0_intr.c
        src/sys/arch/evbarm/include: intr.h
        src/sys/arch/hpcarm/include: intr.h
        src/sys/arch/shark/include: intr.h

Log Message:
Apply fixes for PR port-arm/43339:
 Set proper IPL_SOFTfoo values even in FAST_SOFTINT case.
 Some assertions in MI code expect they have unique values,
 per comments from rm...@.

Also cleanup various "interrupt hierarchy" code since IPL_NONE and
IPL_SOFTfoo should not be set by any hardware interrupt establish functions.

Ok'ed by mrg@, tested on shark and hpcarm.


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/acorn32/include/intr.h
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/arm32/intr.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/at91/at91aic.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/ep93xx/ep93xx_intr.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/footbridge/isa/isa_machdep.c
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/ixp12x0/ixp12x0_intr.c
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/xscale/i80321_icu.c
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/xscale/ixp425_intr.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/xscale/pxa2x0_intr.c
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/evbarm/include/intr.h
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/hpcarm/include/intr.h
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/shark/include/intr.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/acorn32/include/intr.h
diff -u src/sys/arch/acorn32/include/intr.h:1.8 src/sys/arch/acorn32/include/intr.h:1.9
--- src/sys/arch/acorn32/include/intr.h:1.8	Sun Apr 27 18:58:43 2008
+++ src/sys/arch/acorn32/include/intr.h	Sun Jun 13 02:11:22 2010
@@ -1,4 +1,4 @@
-/* 	$NetBSD: intr.h,v 1.8 2008/04/27 18:58:43 matt Exp $	*/
+/* 	$NetBSD: intr.h,v 1.9 2010/06/13 02:11:22 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 1997 Mark Brinicombe.
@@ -41,7 +41,6 @@
 /* Hardware Interrupt Priority Levels are not mutually exclusive. */
 
 #define	IPL_NONE	0
-#ifdef __HAVE_FAST_SOFTINTS
 #define	IPL_SOFTCLOCK	1
 #define	IPL_SOFTBIO	2
 #define	IPL_SOFTNET	3
@@ -50,16 +49,6 @@
 #define	IPL_SCHED	6
 #define IPL_HIGH	7
 #define NIPL		8
-#else
-#define IPL_VM		1
-#define	IPL_SCHED	2
-#define IPL_HIGH	3
-#define	IPL_SOFTSERIAL	IPL_NONE
-#define	IPL_SOFTNET	IPL_NONE
-#define	IPL_SOFTBIO	IPL_NONE
-#define	IPL_SOFTCLOCK	IPL_NONE
-#define NIPL		4
-#endif
 
 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
 #define	IST_NONE	0	/* none (dummy) */

Index: src/sys/arch/arm/arm32/intr.c
diff -u src/sys/arch/arm/arm32/intr.c:1.30 src/sys/arch/arm/arm32/intr.c:1.31
--- src/sys/arch/arm/arm32/intr.c:1.30	Wed Nov 19 06:30:49 2008
+++ src/sys/arch/arm/arm32/intr.c	Sun Jun 13 02:11:22 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: intr.c,v 1.30 2008/11/19 06:30:49 matt Exp $	*/
+/*	$NetBSD: intr.c,v 1.31 2010/06/13 02:11:22 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 1994-1998 Mark Brinicombe.
@@ -36,7 +36,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.30 2008/11/19 06:30:49 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.31 2010/06/13 02:11:22 tsutsui Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -65,10 +65,14 @@
 		spl_masks[loop] = 0xffffffff;
 	}
 
-	spl_masks[IPL_VM]	= irqmasks[IPL_VM];
-	spl_masks[IPL_SCHED]	= irqmasks[IPL_SCHED];
-	spl_masks[IPL_HIGH]	= irqmasks[IPL_HIGH];
-	spl_masks[IPL_NONE]	= irqmasks[IPL_NONE];
+	spl_masks[IPL_VM]	  = irqmasks[IPL_VM];
+	spl_masks[IPL_SCHED]	  = irqmasks[IPL_SCHED];
+	spl_masks[IPL_HIGH]	  = irqmasks[IPL_HIGH];
+	spl_masks[IPL_SOFTSERIAL] = irqmasks[IPL_SOFTSERIAL];
+	spl_masks[IPL_SOFTNET]	  = irqmasks[IPL_SOFTNET];
+	spl_masks[IPL_SOFTBIO]	  = irqmasks[IPL_SOFTBIO];
+	spl_masks[IPL_SOFTCLOCK]  = irqmasks[IPL_SOFTCLOCK];
+	spl_masks[IPL_NONE]	  = irqmasks[IPL_NONE];
 
 }
 

Index: src/sys/arch/arm/at91/at91aic.c
diff -u src/sys/arch/arm/at91/at91aic.c:1.3 src/sys/arch/arm/at91/at91aic.c:1.4
--- src/sys/arch/arm/at91/at91aic.c:1.3	Fri Oct 23 06:53:12 2009
+++ src/sys/arch/arm/at91/at91aic.c	Sun Jun 13 02:11:22 2010
@@ -1,5 +1,5 @@
-/*	$Id: at91aic.c,v 1.3 2009/10/23 06:53:12 snj Exp $	*/
-/*	$NetBSD: at91aic.c,v 1.3 2009/10/23 06:53:12 snj Exp $	*/
+/*	$Id: at91aic.c,v 1.4 2010/06/13 02:11:22 tsutsui Exp $	*/
+/*	$NetBSD: at91aic.c,v 1.4 2010/06/13 02:11:22 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 2007 Embedtronics Oy.
@@ -145,23 +145,20 @@
 		aic_imask[ipl] = aic_irqs;
 	}
 
-	aic_imask[IPL_NONE] = 0;
+	/* IPL_NONE must open up all interrupts */
+	KASSERT(aic_imask[IPL_NONE] == 0);
+	KASSERT(aic_imask[IPL_SOFTCLOCK] == 0);
+	KASSERT(aic_imask[IPL_SOFTBIO] == 0);
+	KASSERT(aic_imask[IPL_SOFTNET] == 0);
+	KASSERT(aic_imask[IPL_SOFTSERIAL] == 0);
 
 	/*
-	 * splvm() blocks all interrupts that use the kernel memory
-	 * allocation facilities.
+	 * Enforce a hierarchy that gives "slow" device (or devices with
+	 * limited input buffer space/"real-time" requirements) a better
+	 * chance at not dropping data.
 	 */
-	aic_imask[IPL_VM] |= aic_imask[IPL_NONE];
-
-	/*
-	 * splclock() must block anything that uses the scheduler.
-	 */
-	aic_imask[IPL_CLOCK] |= aic_imask[IPL_VM];
-
-	/*
-	 * splhigh() must block "everything".
-	 */
-	aic_imask[IPL_HIGH] |= aic_imask[IPL_CLOCK];
+	aic_imask[IPL_SCHED] |= aic_imask[IPL_VM];
+	aic_imask[IPL_HIGH] |= aic_imask[IPL_SCHED];
 
 	/*
 	 * Now compute which IRQs must be blocked when servicing any

Index: src/sys/arch/arm/ep93xx/ep93xx_intr.c
diff -u src/sys/arch/arm/ep93xx/ep93xx_intr.c:1.13 src/sys/arch/arm/ep93xx/ep93xx_intr.c:1.14
--- src/sys/arch/arm/ep93xx/ep93xx_intr.c:1.13	Mon Apr 28 20:23:14 2008
+++ src/sys/arch/arm/ep93xx/ep93xx_intr.c	Sun Jun 13 02:11:22 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: ep93xx_intr.c,v 1.13 2008/04/28 20:23:14 martin Exp $ */
+/* $NetBSD: ep93xx_intr.c,v 1.14 2010/06/13 02:11:22 tsutsui Exp $ */
 
 /*
  * Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ep93xx_intr.c,v 1.13 2008/04/28 20:23:14 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ep93xx_intr.c,v 1.14 2010/06/13 02:11:22 tsutsui Exp $");
 
 /*
  * Interrupt support for the Cirrus Logic EP93XX
@@ -150,9 +150,17 @@
 
 	KASSERT(vic1_imask[IPL_NONE] == 0);
 	KASSERT(vic2_imask[IPL_NONE] == 0);
+	KASSERT(vic1_imask[IPL_SOFTCLOCK] == 0);
+	KASSERT(vic2_imask[IPL_SOFTCLOCK] == 0);
+	KASSERT(vic1_imask[IPL_SOFTBIO] == 0);
+	KASSERT(vic2_imask[IPL_SOFTBIO] == 0);
+	KASSERT(vic1_imask[IPL_SOFTNET] == 0);
+	KASSERT(vic2_imask[IPL_SOFTNET] == 0);
+	KASSERT(vic1_imask[IPL_SOFTSERIAL] == 0);
+	KASSERT(vic2_imask[IPL_SOFTSERIAL] == 0);
 
 	/*
-	 * splclock() must block anything that uses the scheduler.
+	 * splsched() must block anything that uses the scheduler.
 	 */
 	vic1_imask[IPL_SCHED] |= vic1_imask[IPL_VM];
 	vic2_imask[IPL_SCHED] |= vic2_imask[IPL_VM];

Index: src/sys/arch/arm/footbridge/isa/isa_machdep.c
diff -u src/sys/arch/arm/footbridge/isa/isa_machdep.c:1.16 src/sys/arch/arm/footbridge/isa/isa_machdep.c:1.17
--- src/sys/arch/arm/footbridge/isa/isa_machdep.c:1.16	Thu Aug 20 12:51:28 2009
+++ src/sys/arch/arm/footbridge/isa/isa_machdep.c	Sun Jun 13 02:11:22 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: isa_machdep.c,v 1.16 2009/08/20 12:51:28 he Exp $	*/
+/*	$NetBSD: isa_machdep.c,v 1.17 2010/06/13 02:11:22 tsutsui Exp $	*/
 
 /*-
  * Copyright (c) 1996-1998 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.16 2009/08/20 12:51:28 he Exp $");
+__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.17 2010/06/13 02:11:22 tsutsui Exp $");
 
 #include "opt_irqstats.h"
 
@@ -203,12 +203,6 @@
 		imask[level] = irqs;
 	}
 
-	imask[IPL_NONE] = 0;
-	imask[IPL_SOFTCLOCK] |= imask[IPL_NONE];
-	imask[IPL_SOFTBIO] |= imask[IPL_SOFTCLOCK];
-	imask[IPL_SOFTNET] |= imask[IPL_SOFTBIO];
-	imask[IPL_SOFTSERIAL] |= imask[IPL_SOFTNET];
-	imask[IPL_VM] |= imask[IPL_SOFTSERIAL];
 	imask[IPL_SCHED] |= imask[IPL_VM];
 	imask[IPL_HIGH] |= imask[IPL_SCHED];
 

Index: src/sys/arch/arm/ixp12x0/ixp12x0_intr.c
diff -u src/sys/arch/arm/ixp12x0/ixp12x0_intr.c:1.19 src/sys/arch/arm/ixp12x0/ixp12x0_intr.c:1.20
--- src/sys/arch/arm/ixp12x0/ixp12x0_intr.c:1.19	Mon Apr 28 20:23:14 2008
+++ src/sys/arch/arm/ixp12x0/ixp12x0_intr.c	Sun Jun 13 02:11:23 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp12x0_intr.c,v 1.19 2008/04/28 20:23:14 martin Exp $ */
+/* $NetBSD: ixp12x0_intr.c,v 1.20 2010/06/13 02:11:23 tsutsui Exp $ */
 
 /*
  * Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp12x0_intr.c,v 1.19 2008/04/28 20:23:14 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixp12x0_intr.c,v 1.20 2010/06/13 02:11:23 tsutsui Exp $");
 
 /*
  * Interrupt support for the Intel ixp12x0
@@ -206,21 +206,29 @@
 
 	KASSERT(imask[IPL_NONE] == 0);
 	KASSERT(pci_imask[IPL_NONE] == 0);
+	KASSERT(imask[IPL_SOFTCLOCK] == 0);
+	KASSERT(pci_imask[IPL_SOFTCLOCK] == 0);
+	KASSERT(imask[IPL_SOFTBIO] == 0);
+	KASSERT(pci_imask[IPL_SOFTBIO] == 0);
+	KASSERT(imask[IPL_SOFTNET] == 0);
+	KASSERT(pci_imask[IPL_SOFTNET] == 0);
+	KASSERT(imask[IPL_SOFTSERIAL] == 0);
+	KASSERT(pci_imask[IPL_SOFTSERIAL] == 0);
 
 	KASSERT(imask[IPL_VM] != 0);
 	KASSERT(pci_imask[IPL_VM] != 0);
 
 	/*
-	 * splclock() must block anything that uses the scheduler.
+	 * splsched() must block anything that uses the scheduler.
 	 */
-	imask[IPL_CLOCK] |= imask[IPL_VM];
-	pci_imask[IPL_CLOCK] |= pci_imask[IPL_VM];
+	imask[IPL_SCHED] |= imask[IPL_VM];
+	pci_imask[IPL_SCHED] |= pci_imask[IPL_VM];
 
 	/*
 	 * splhigh() must block "everything".
 	 */
-	imask[IPL_HIGH] |= imask[IPL_CLOCK];
-	pci_imask[IPL_HIGH] |= pci_imask[IPL_CLOCK];
+	imask[IPL_HIGH] |= imask[IPL_SCHED];
+	pci_imask[IPL_HIGH] |= pci_imask[IPL_SCHED];
 
 	/*
 	 * Now compute which IRQs must be blocked when servicing any

Index: src/sys/arch/arm/xscale/i80321_icu.c
diff -u src/sys/arch/arm/xscale/i80321_icu.c:1.19 src/sys/arch/arm/xscale/i80321_icu.c:1.20
--- src/sys/arch/arm/xscale/i80321_icu.c:1.19	Mon Jan  5 06:03:39 2009
+++ src/sys/arch/arm/xscale/i80321_icu.c	Sun Jun 13 02:11:23 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: i80321_icu.c,v 1.19 2009/01/05 06:03:39 briggs Exp $	*/
+/*	$NetBSD: i80321_icu.c,v 1.20 2010/06/13 02:11:23 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 2001, 2002, 2006 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: i80321_icu.c,v 1.19 2009/01/05 06:03:39 briggs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: i80321_icu.c,v 1.20 2010/06/13 02:11:23 tsutsui Exp $");
 
 #ifndef EVBARM_SPL_NOINLINE
 #define	EVBARM_SPL_NOINLINE
@@ -187,7 +187,11 @@
 		i80321_imask[ipl] = irqs;
 	}
 
-	i80321_imask[IPL_NONE] = 0;
+	KASSERT(i80321_imask[IPL_NONE] == 0);
+	KASSERT(i80321_imask[IPL_SOFTCLOCK] == 0);
+	KASSERT(i80321_imask[IPL_SOFTBIO] == 0);
+	KASSERT(i80321_imask[IPL_SOFTNET] == 0);
+	KASSERT(i80321_imask[IPL_SOFTSERIAL] == 0);
 
 	/*
 	 * Enforce a hierarchy that gives "slow" device (or devices with

Index: src/sys/arch/arm/xscale/ixp425_intr.c
diff -u src/sys/arch/arm/xscale/ixp425_intr.c:1.20 src/sys/arch/arm/xscale/ixp425_intr.c:1.21
--- src/sys/arch/arm/xscale/ixp425_intr.c:1.20	Wed Oct 21 14:15:50 2009
+++ src/sys/arch/arm/xscale/ixp425_intr.c	Sun Jun 13 02:11:23 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: ixp425_intr.c,v 1.20 2009/10/21 14:15:50 rmind Exp $ */
+/*	$NetBSD: ixp425_intr.c,v 1.21 2010/06/13 02:11:23 tsutsui Exp $ */
 
 /*
  * Copyright (c) 2003
@@ -62,7 +62,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp425_intr.c,v 1.20 2009/10/21 14:15:50 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_intr.c,v 1.21 2010/06/13 02:11:23 tsutsui Exp $");
 
 #ifndef EVBARM_SPL_NOINLINE
 #define	EVBARM_SPL_NOINLINE
@@ -226,6 +226,11 @@
 	ixp425_imask[IPL_SOFTBIO] = SI_TO_IRQBIT(SI_SOFTBIO);
 	ixp425_imask[IPL_SOFTNET] = SI_TO_IRQBIT(SI_SOFTNET);
 	ixp425_imask[IPL_SOFTSERIAL] = SI_TO_IRQBIT(SI_SOFTSERIAL);
+#else
+	KASSERT(ixp425_imask[IPL_SOFTCLOCK] == 0);
+	KASSERT(ixp425_imask[IPL_SOFTBIO] == 0);
+	KASSERT(ixp425_imask[IPL_SOFTNET] == 0);
+	KASSERT(ixp425_imask[IPL_SOFTSERIAL] == 0);
 #endif
 
 	/*
@@ -233,10 +238,6 @@
 	 * limited input buffer space/"real-time" requirements) a better
 	 * chance at not dropping data.
 	 */
-	ixp425_imask[IPL_SOFTBIO] |= ixp425_imask[IPL_SOFTCLOCK];
-	ixp425_imask[IPL_SOFTNET] |= ixp425_imask[IPL_SOFTBIO];
-	ixp425_imask[IPL_SOFTSERIAL] |= ixp425_imask[IPL_SOFTNET];
-	ixp425_imask[IPL_VM] |= ixp425_imask[IPL_SOFTSERIAL];
 	ixp425_imask[IPL_SCHED] |= ixp425_imask[IPL_VM];
 	ixp425_imask[IPL_HIGH] |= ixp425_imask[IPL_SCHED];
 

Index: src/sys/arch/arm/xscale/pxa2x0_intr.c
diff -u src/sys/arch/arm/xscale/pxa2x0_intr.c:1.16 src/sys/arch/arm/xscale/pxa2x0_intr.c:1.17
--- src/sys/arch/arm/xscale/pxa2x0_intr.c:1.16	Sat Sep  5 17:40:35 2009
+++ src/sys/arch/arm/xscale/pxa2x0_intr.c	Sun Jun 13 02:11:23 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: pxa2x0_intr.c,v 1.16 2009/09/05 17:40:35 bsh Exp $	*/
+/*	$NetBSD: pxa2x0_intr.c,v 1.17 2010/06/13 02:11:23 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 2002  Genetec Corporation.  All rights reserved.
@@ -39,7 +39,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pxa2x0_intr.c,v 1.16 2009/09/05 17:40:35 bsh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pxa2x0_intr.c,v 1.17 2010/06/13 02:11:23 tsutsui Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -238,17 +238,13 @@
 		pxa2x0_imask[i] |= mask; /* Enable interrupt at lower level */
 
 	for( ; i < NIPL-1; ++i)
-		pxa2x0_imask[i] &= ~mask; /* Disable itnerrupt at upper level */
+		pxa2x0_imask[i] &= ~mask; /* Disable interrupt at upper level */
 
 	/*
 	 * Enforce a hierarchy that gives "slow" device (or devices with
 	 * limited input buffer space/"real-time" requirements) a better
 	 * chance at not dropping data.
 	 */
-	pxa2x0_imask[IPL_SOFTBIO] &= pxa2x0_imask[IPL_SOFTCLOCK];
-	pxa2x0_imask[IPL_SOFTNET] &= pxa2x0_imask[IPL_SOFTBIO];
-	pxa2x0_imask[IPL_SOFTSERIAL] &= pxa2x0_imask[IPL_SOFTNET];
-	pxa2x0_imask[IPL_VM] &= pxa2x0_imask[IPL_SOFTSERIAL];
 	pxa2x0_imask[IPL_SCHED] &= pxa2x0_imask[IPL_VM];
 	pxa2x0_imask[IPL_HIGH] &= pxa2x0_imask[IPL_SCHED];
 

Index: src/sys/arch/evbarm/include/intr.h
diff -u src/sys/arch/evbarm/include/intr.h:1.20 src/sys/arch/evbarm/include/intr.h:1.21
--- src/sys/arch/evbarm/include/intr.h:1.20	Sun Apr 27 18:58:46 2008
+++ src/sys/arch/evbarm/include/intr.h	Sun Jun 13 02:11:23 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: intr.h,v 1.20 2008/04/27 18:58:46 matt Exp $	*/
+/*	$NetBSD: intr.h,v 1.21 2010/06/13 02:11:23 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
@@ -41,7 +41,6 @@
 #ifdef _KERNEL
 
 /* Interrupt priority "levels". */
-#ifdef __HAVE_FAST_SOFTINTS
 #define	IPL_NONE	0		/* nothing */
 #define	IPL_SOFTCLOCK	1		/* clock */
 #define	IPL_SOFTBIO	2		/* block I/O */
@@ -52,18 +51,6 @@
 #define	IPL_HIGH	7		/* everything */
 
 #define	NIPL		8
-#else
-#define	IPL_NONE	0		/* nothing */
-#define	IPL_SOFTCLOCK	IPL_NONE	/* clock */
-#define	IPL_SOFTBIO	IPL_NONE	/* block I/O */
-#define	IPL_SOFTNET	IPL_NONE	/* software network interrupt */
-#define	IPL_SOFTSERIAL	IPL_NONE	/* software serial interrupt */
-#define	IPL_VM		1		/* memory allocation */
-#define	IPL_SCHED	2		/* clock interrupt */
-#define	IPL_HIGH	3		/* everything */
-
-#define	NIPL		4
-#endif
 
 /* Interrupt sharing types. */
 #define	IST_NONE	0	/* none */

Index: src/sys/arch/hpcarm/include/intr.h
diff -u src/sys/arch/hpcarm/include/intr.h:1.13 src/sys/arch/hpcarm/include/intr.h:1.14
--- src/sys/arch/hpcarm/include/intr.h:1.13	Sat Apr 17 13:36:21 2010
+++ src/sys/arch/hpcarm/include/intr.h	Sun Jun 13 02:11:23 2010
@@ -1,4 +1,4 @@
-/* 	$NetBSD: intr.h,v 1.13 2010/04/17 13:36:21 nonaka Exp $	*/
+/* 	$NetBSD: intr.h,v 1.14 2010/06/13 02:11:23 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 1997 Mark Brinicombe.
@@ -38,7 +38,6 @@
 
 #ifdef _KERNEL
 
-#ifdef __HAVE_FAST_SOFTINTS
 #define IPL_NONE	0
 #define IPL_SOFTCLOCK	1
 #define IPL_SOFTBIO	2
@@ -49,18 +48,6 @@
 #define IPL_HIGH	7
 
 #define NIPL		8
-#else
-#define IPL_NONE	0
-#define IPL_SOFTCLOCK	IPL_NONE
-#define IPL_SOFTBIO	IPL_NONE
-#define IPL_SOFTNET	IPL_NONE
-#define IPL_SOFTSERIAL	IPL_NONE
-#define IPL_VM		1
-#define IPL_SCHED	2
-#define IPL_HIGH	3
-
-#define NIPL		4
-#endif
 
 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
 #define	IST_NONE	0	/* none (dummy) */

Index: src/sys/arch/shark/include/intr.h
diff -u src/sys/arch/shark/include/intr.h:1.9 src/sys/arch/shark/include/intr.h:1.10
--- src/sys/arch/shark/include/intr.h:1.9	Sun Apr 27 18:58:47 2008
+++ src/sys/arch/shark/include/intr.h	Sun Jun 13 02:11:23 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: intr.h,v 1.9 2008/04/27 18:58:47 matt Exp $	*/
+/*	$NetBSD: intr.h,v 1.10 2010/06/13 02:11:23 tsutsui Exp $	*/
 
 /*
  * Copyright (c) 1997 Mark Brinicombe.
@@ -37,7 +37,6 @@
 #define _SHARK_INTR_H_
 
 #define IPL_NONE	0
-#ifdef __HAVE_FAST_SOFTINTS
 #define	IPL_SOFTCLOCK	1
 #define	IPL_SOFTBIO	2
 #define	IPL_SOFTNET	3
@@ -47,17 +46,6 @@
 #define IPL_HIGH	7
 
 #define NIPL		8
-#else
-#define	IPL_SOFTCLOCK	IPL_NONE
-#define	IPL_SOFTBIO	IPL_NONE
-#define	IPL_SOFTNET	IPL_NONE
-#define	IPL_SOFTSERIAL	IPL_NONE
-#define IPL_VM		1
-#define IPL_SCHED	2
-#define IPL_HIGH	3
-
-#define NIPL		4
-#endif
 
 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
 #define	IST_NONE	0	/* none (dummy) */

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