Module Name: src
Committed By: macallan
Date: Tue Aug 17 18:53:16 UTC 2010
Modified Files:
src/sys/dev/pci: radeonfb.c radeonfbvar.h
Log Message:
- fix 8 bit support and run the console in 8 bit for a little extra speed
- fix colour oddities seen occasionally on sparc64
- try to use firmware DAC wiring until we figure out what's wrong
TODO:
- find out why radeonfb gets the DAC wiring ass-backwards on my xvr-100
while Xorg's radeon driver gets it right
- find out why reverse characters aren't drawn in reverse
tested on macppc and sparc64
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/dev/pci/radeonfb.c
cvs rdiff -u -r1.7 -r1.8 src/sys/dev/pci/radeonfbvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/radeonfb.c
diff -u src/sys/dev/pci/radeonfb.c:1.35 src/sys/dev/pci/radeonfb.c:1.36
--- src/sys/dev/pci/radeonfb.c:1.35 Tue May 4 05:00:33 2010
+++ src/sys/dev/pci/radeonfb.c Tue Aug 17 18:53:16 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: radeonfb.c,v 1.35 2010/05/04 05:00:33 macallan Exp $ */
+/* $NetBSD: radeonfb.c,v 1.36 2010/08/17 18:53:16 macallan Exp $ */
/*-
* Copyright (c) 2006 Itronix Inc.
@@ -70,9 +70,9 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeonfb.c,v 1.35 2010/05/04 05:00:33 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeonfb.c,v 1.36 2010/08/17 18:53:16 macallan Exp $");
-#define RADEONFB_DEFAULT_DEPTH 32
+#define RADEONFB_DEFAULT_DEPTH 8
#include <sys/param.h>
#include <sys/systm.h>
@@ -181,7 +181,7 @@
static int radeonfb_drm_print(void *, const char *);
-#ifdef RADEON_DEBUG
+#ifdef RADEONFB_DEBUG
int radeon_debug = 1;
#define DPRINTF(x) \
if (radeon_debug) printf x
@@ -200,6 +200,8 @@
#define RADEON_DEFAULT_MODE "1024x768x60"
#endif
+extern const u_char rasops_cmap[768];
+
const char *radeonfb_default_mode = RADEON_DEFAULT_MODE;
static struct {
@@ -549,6 +551,7 @@
PRINTREG(RADEON_BIOS_4_SCRATCH);
PRINTREG(RADEON_FP_GEN_CNTL);
+ sc->sc_fp_gen_cntl = GET32(sc, RADEON_FP_GEN_CNTL);
PRINTREG(RADEON_FP2_GEN_CNTL);
PRINTREG(RADEON_TMDS_CNTL);
PRINTREG(RADEON_TMDS_TRANSMITTER_CNTL);
@@ -662,7 +665,18 @@
RADEON_FP_TMDS_EN |
RADEON_FP_CRTC_DONT_SHADOW_VPAR |
RADEON_FP_CRTC_DONT_SHADOW_HEND);
- CLR32(sc, RADEON_FP_GEN_CNTL, RADEON_FP_SEL_CRTC2);
+ /*
+ * XXX
+ * no idea why this is necessary - if I do not clear this bit on my
+ * iBook G4 the screen remains black, even though it's already clear.
+ * It needs to be set on my Sun XVR-100 for the DVI port to work
+ */
+
+ if (sc->sc_fp_gen_cntl & RADEON_FP_SEL_CRTC2) {
+ SET32(sc, RADEON_FP_GEN_CNTL, RADEON_FP_SEL_CRTC2);
+ } else
+ CLR32(sc, RADEON_FP_GEN_CNTL, RADEON_FP_SEL_CRTC2);
+
if (HAS_CRTC2(sc))
SET32(sc, RADEON_FP2_GEN_CNTL, RADEON_FP2_SRC_SEL_CRTC2);
@@ -802,7 +816,7 @@
goto error;
}
- printf("init engine\n");
+ DPRINTF("init engine\n");
/* XXX: this seems suspicious - per display engine
initialization? */
radeonfb_engine_init(dp);
@@ -854,11 +868,14 @@
#endif
if (dp->rd_console) {
+ radeonfb_modeswitch(dp);
wsdisplay_cnattach(dp->rd_wsscreens, ri, 0, 0,
defattr);
#ifdef SPLASHSCREEN
splash_render(&dp->rd_splash,
SPLASH_F_CENTER|SPLASH_F_FILL);
+#else
+ vcons_replay_msgbuf(&dp->rd_vscreen);
#endif
#ifdef SPLASHSCREEN_PROGRESS
@@ -897,6 +914,7 @@
aa.accesscookie = &dp->rd_vd;
config_found(&sc->sc_dev, &aa, wsemuldisplaydevprint);
+
radeonfb_blank(dp, 0);
/* Initialise delayed lvds operations for backlight. */
@@ -905,6 +923,15 @@
radeonfb_lvds_callout, dp);
}
+ /*
+ * if we have console output via firmware like on sparc64 it may
+ * interfere with DAC programming so program the palette again
+ * here after we took over
+ */
+ radeonfb_init_palette(sc, 0);
+ if (HAS_CRTC2(sc))
+ radeonfb_init_palette(sc, 1);
+
pmf_event_register(dev, PMFE_DISPLAY_BRIGHTNESS_UP,
radeonfb_brightness_up, TRUE);
pmf_event_register(dev, PMFE_DISPLAY_BRIGHTNESS_DOWN,
@@ -1000,7 +1027,7 @@
if ((dp->rd_wsmode == WSDISPLAYIO_MODE_EMUL) &&
(dp->rd_vd.active)) {
radeonfb_engine_init(dp);
- //radeonfb_modeswitch(dp);
+ radeonfb_modeswitch(dp);
vcons_redraw_screen(dp->rd_vd.active);
}
}
@@ -1423,7 +1450,7 @@
}
#if 0
-#ifdef RADEON_DEBUG
+#ifdef RADEONFB_DEBUG
static void
dump_buffer(const char *pfx, void *buffer, unsigned int size)
{
@@ -1873,7 +1900,7 @@
int i;
/* blank the display while we switch modes */
- //radeonfb_blank(dp, 1);
+ radeonfb_blank(dp, 1);
#if 0
SET32(sc, RADEON_CRTC_EXT_CNTL,
@@ -1898,7 +1925,7 @@
radeonfb_setcrtc(dp, i);
/* activate the display */
- //radeonfb_blank(dp, 0);
+ radeonfb_blank(dp, 0);
}
void
@@ -2311,11 +2338,28 @@
CLR32(sc, RADEON_DAC_CNTL2, RADEON_DAC2_PALETTE_ACC_CTL);
PUT32(sc, RADEON_PALETTE_INDEX, 0);
- for (i = 0; i <= CLUT_WIDTH; ++i) {
- PUT32(sc, RADEON_PALETTE_30_DATA,
- (CLUT_COLOR(i) << 10) |
- (CLUT_COLOR(i) << 20) |
- (CLUT_COLOR(i)));
+ if (sc->sc_displays[crtc].rd_bpp == 0)
+ sc->sc_displays[crtc].rd_bpp = RADEONFB_DEFAULT_DEPTH;
+
+ if (sc->sc_displays[crtc].rd_bpp == 8) {
+ /* ANSI palette */
+ int j = 0;
+
+ for (i = 0; i <= CLUT_WIDTH; ++i) {
+ PUT32(sc, RADEON_PALETTE_30_DATA,
+ (rasops_cmap[j] << 22) |
+ (rasops_cmap[j + 1] << 12) |
+ (rasops_cmap[j + 2] << 2));
+ j += 3;
+ }
+ } else {
+ /* linear ramp */
+ for (i = 0; i <= CLUT_WIDTH; ++i) {
+ PUT32(sc, RADEON_PALETTE_30_DATA,
+ (CLUT_COLOR(i) << 10) |
+ (CLUT_COLOR(i) << 20) |
+ (CLUT_COLOR(i)));
+ }
}
CLR32(sc, RADEON_DAC_CNTL2, RADEON_DAC2_PALETTE_ACC_CTL);
@@ -2724,6 +2768,7 @@
{
struct radeonfb_softc *sc = dp->rd_softc;
uint32_t pitch;
+ volatile uint32_t junk;
/* no 3D */
PUT32(sc, RADEON_RB3D_CNTL, 0);
@@ -2752,6 +2797,7 @@
#else
CLR32(sc, RADEON_DP_DATATYPE, RADEON_HOST_BIG_ENDIAN_EN);
#endif
+ junk = GET32(sc, RADEON_DP_DATATYPE);
/* default scissors -- no clipping */
radeonfb_wait_fifo(sc, 1);
Index: src/sys/dev/pci/radeonfbvar.h
diff -u src/sys/dev/pci/radeonfbvar.h:1.7 src/sys/dev/pci/radeonfbvar.h:1.8
--- src/sys/dev/pci/radeonfbvar.h:1.7 Tue Jul 28 00:10:51 2009
+++ src/sys/dev/pci/radeonfbvar.h Tue Aug 17 18:53:16 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: radeonfbvar.h,v 1.7 2009/07/28 00:10:51 macallan Exp $ */
+/* $NetBSD: radeonfbvar.h,v 1.8 2010/08/17 18:53:16 macallan Exp $ */
/*-
* Copyright (c) 2006 Itronix Inc.
@@ -273,6 +273,7 @@
uint8_t *sc_bios;
bus_size_t sc_biossz;
+ uint32_t sc_fp_gen_cntl;
char sc_modebuf[64];
const char *sc_defaultmode;
