Module Name: src
Committed By: jruoho
Date: Sat Aug 21 06:45:50 UTC 2010
Modified Files:
src/sys/arch/x86/acpi: acpi_cpu_md.c
src/sys/dev/acpi: acpi_cpu.h
Log Message:
Check from CPUID 0x06 %eax (on Intel) whether we might actually have an
invariant APIC timer or an "ARAT" ("always running APIC timer"). This means
that the APIC timer may keep ticking at the same rate also in deep C-states
with some new or forthcoming Intel CPUs.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/x86/acpi/acpi_cpu_md.c
cvs rdiff -u -r1.21 -r1.22 src/sys/dev/acpi/acpi_cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/acpi/acpi_cpu_md.c
diff -u src/sys/arch/x86/acpi/acpi_cpu_md.c:1.24 src/sys/arch/x86/acpi/acpi_cpu_md.c:1.25
--- src/sys/arch/x86/acpi/acpi_cpu_md.c:1.24 Sat Aug 21 05:10:43 2010
+++ src/sys/arch/x86/acpi/acpi_cpu_md.c Sat Aug 21 06:45:50 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_cpu_md.c,v 1.24 2010/08/21 05:10:43 jruoho Exp $ */
+/* $NetBSD: acpi_cpu_md.c,v 1.25 2010/08/21 06:45:50 jruoho Exp $ */
/*-
* Copyright (c) 2010 Jukka Ruohonen <jruoho...@iki.fi>
@@ -27,7 +27,7 @@
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_cpu_md.c,v 1.24 2010/08/21 05:10:43 jruoho Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_cpu_md.c,v 1.25 2010/08/21 06:45:50 jruoho Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -121,7 +121,7 @@
if ((ci->ci_feat_val[1] & CPUID2_MONITOR) != 0)
val |= ACPICPU_FLAG_C_FFH;
- val |= ACPICPU_FLAG_C_TSC;
+ val |= ACPICPU_FLAG_C_APIC | ACPICPU_FLAG_C_TSC;
switch (cpu_vendor) {
@@ -146,18 +146,22 @@
val |= ACPICPU_FLAG_T_FFH;
/*
- * See if MSR_APERF, MSR_MPERF,
- * and Turbo Boost are available.
+ * Check whether MSR_APERF, MSR_MPERF, and Turbo
+ * Boost are available. Also see if we might have
+ * an invariant local APIC timer ("ARAT").
*/
if (cpuid_level >= 0x06) {
x86_cpuid(0x06, regs);
- if ((regs[2] & __BIT(0)) != 0) /* ECX.06[0] */
+ if ((regs[2] & __BIT(0)) != 0) /* ECX.06[0] */
val |= ACPICPU_FLAG_P_HW;
- if ((regs[0] & __BIT(1)) != 0) /* EAX.06[1] */
+ if ((regs[0] & __BIT(1)) != 0) /* EAX.06[1] */
val |= ACPICPU_FLAG_P_TURBO;
+
+ if ((regs[0] & __BIT(2)) != 0) /* EAX.06[2] */
+ val &= ~ACPICPU_FLAG_C_APIC;
}
/*
@@ -419,12 +423,8 @@
* When the state is P0 and Turbo Boost has been
* detected, we need to skip the status check as
* BIOS may not report right comparison values for
- * the IA32_PERF_STATUS MSR. Note that this is a
- * BIOS issue, and that for instance AMD documents
- * clearly state that vendors should never expose
- * "turbo" in the ACPI objects (namely, in _PSS).
- *
- * For discussion, see:
+ * the IA32_PERF_STATUS register. Note that this
+ * issue is specific to Intel. For discussion, see:
*
* Intel Corporation: Intel Turbo Boost Technology
* in Intel Core(tm) Microarchitectures (Nehalem)
Index: src/sys/dev/acpi/acpi_cpu.h
diff -u src/sys/dev/acpi/acpi_cpu.h:1.21 src/sys/dev/acpi/acpi_cpu.h:1.22
--- src/sys/dev/acpi/acpi_cpu.h:1.21 Sat Aug 21 03:55:24 2010
+++ src/sys/dev/acpi/acpi_cpu.h Sat Aug 21 06:45:50 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_cpu.h,v 1.21 2010/08/21 03:55:24 jruoho Exp $ */
+/* $NetBSD: acpi_cpu.h,v 1.22 2010/08/21 06:45:50 jruoho Exp $ */
/*-
* Copyright (c) 2010 Jukka Ruohonen <jruoho...@iki.fi>
@@ -100,16 +100,17 @@
#define ACPICPU_FLAG_C_BM __BIT(6) /* Bus master control */
#define ACPICPU_FLAG_C_BM_STS __BIT(7) /* Bus master check required */
#define ACPICPU_FLAG_C_ARB __BIT(8) /* Bus master arbitration */
-#define ACPICPU_FLAG_C_TSC __BIT(9) /* TSC broken with > C1 */
-#define ACPICPU_FLAG_C_C1E __BIT(10) /* AMD C1E detected */
+#define ACPICPU_FLAG_C_TSC __BIT(9) /* TSC broken, > C1, Px, Tx */
+#define ACPICPU_FLAG_C_APIC __BIT(10) /* APIC timer broken, > C1 */
+#define ACPICPU_FLAG_C_C1E __BIT(11) /* AMD C1E detected */
+
+#define ACPICPU_FLAG_P_FFH __BIT(12) /* Native P-states */
+#define ACPICPU_FLAG_P_HW __BIT(13) /* HW coordination supported */
+#define ACPICPU_FLAG_P_XPSS __BIT(14) /* Microsoft XPSS in use */
+#define ACPICPU_FLAG_P_TURBO __BIT(15) /* Turbo Boost / Turbo Core */
-#define ACPICPU_FLAG_P_FFH __BIT(11) /* Native P-states */
-#define ACPICPU_FLAG_P_HW __BIT(12) /* HW coordination supported */
-#define ACPICPU_FLAG_P_XPSS __BIT(13) /* Microsoft XPSS in use */
-#define ACPICPU_FLAG_P_TURBO __BIT(14) /* Turbo Boost / Turbo Core */
-
-#define ACPICPU_FLAG_T_FFH __BIT(15) /* Native throttling */
-#define ACPICPU_FLAG_T_FADT __BIT(16) /* Throttling with FADT */
+#define ACPICPU_FLAG_T_FFH __BIT(16) /* Native throttling */
+#define ACPICPU_FLAG_T_FADT __BIT(17) /* Throttling with FADT */
/*
* This is AML_RESOURCE_GENERIC_REGISTER,
