CVS commit: src/sys/arch/arm/marvell

[Jonathan A. Kollasch]

Module Name:    src
Committed By:   jakllsch
Date:           Mon Jan 24 21:07:29 UTC 2011

Modified Files:
        src/sys/arch/arm/marvell: mvsocgpp.c

Log Message:
Capture more initial GPIO state.
Also, fix behaviour if the number of GPIOs exceed 32.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/marvell/mvsocgpp.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/arch/arm/marvell/mvsocgpp.c
diff -u src/sys/arch/arm/marvell/mvsocgpp.c:1.1 src/sys/arch/arm/marvell/mvsocgpp.c:1.2
--- src/sys/arch/arm/marvell/mvsocgpp.c:1.1	Sun Oct  3 05:49:24 2010
+++ src/sys/arch/arm/marvell/mvsocgpp.c	Mon Jan 24 21:07:28 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: mvsocgpp.c,v 1.1 2010/10/03 05:49:24 kiyohara Exp $	*/
+/*	$NetBSD: mvsocgpp.c,v 1.2 2011/01/24 21:07:28 jakllsch Exp $	*/
 /*
  * Copyright (c) 2008, 2010 KIYOHARA Takashi
  * All rights reserved.
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsocgpp.c,v 1.1 2010/10/03 05:49:24 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsocgpp.c,v 1.2 2011/01/24 21:07:28 jakllsch Exp $");
 
 #include "gpio.h"
 
@@ -135,11 +135,13 @@
 #if NGPIO > 0
 	struct gpiobus_attach_args gba;
 	gpio_pin_t *pins;
-	uint32_t dir, valin, valout, polarity, mask;
+	uint32_t mask, dir, valin, valout, polarity, blink;
 #endif
 	int i, j;
 	void *ih;
 
+	dir = valin = valout = polarity = blink = 0;
+
 	aprint_normal(": Marvell SoC General Purpose I/O Port Interface\n");
 	aprint_naive("\n");
 
@@ -188,20 +190,22 @@
 #endif
 
 #if NGPIO > 0
-	sc->sc_pins = kmem_alloc(sizeof(gpio_pin_t) * gpp_npins, KM_SLEEP);
+	sc->sc_pins = kmem_zalloc(sizeof(gpio_pin_t) * gpp_npins, KM_SLEEP);
 
-	for (i = 0; i < gpp_npins; i += 32) {
-		dir = MVSOCGPP_READ(sc, MVSOCGPP_GPIODOEC(i));
-		valin = MVSOCGPP_READ(sc, MVSOCGPP_GPIODI(i));
-		valout = MVSOCGPP_READ(sc, MVSOCGPP_GPIODO(i));
-		polarity = MVSOCGPP_READ(sc, MVSOCGPP_GPIODIP(i));
-	}
 	for (i = 0, mask = 1; i < gpp_npins; i++, mask <<= 1) {
+		if ((i & (32 - 1)) == 0) {
+			mask = 1;
+			dir = MVSOCGPP_READ(sc, MVSOCGPP_GPIODOEC(i));
+			valin = MVSOCGPP_READ(sc, MVSOCGPP_GPIODI(i));
+			valout = MVSOCGPP_READ(sc, MVSOCGPP_GPIODO(i));
+			polarity = MVSOCGPP_READ(sc, MVSOCGPP_GPIODIP(i));
+			blink = MVSOCGPP_READ(sc, MVSOCGPP_GPIOBE(i));
+		}
 		pins = &sc->sc_pins[i];
 		pins->pin_num = i;
-		pins->pin_caps =
-		    (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_INVIN);
-		if(dir & mask) {
+		pins->pin_caps = (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
+		    GPIO_PIN_INVIN | GPIO_PIN_PULSATE);
+		if (dir & mask) {
 			pins->pin_flags = GPIO_PIN_INPUT;
 			pins->pin_state =
 			    (valin & mask) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
@@ -210,6 +214,12 @@
 			pins->pin_state =
 			    (valout & mask) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
 		}
+		if (polarity & mask) {
+			pins->pin_flags |= GPIO_PIN_INVIN;
+		}
+		if (blink & mask) {
+			pins->pin_flags |= GPIO_PIN_PULSATE;
+		}
 	}
 	sc->sc_gpio_chipset.gp_cookie = sc;
 	sc->sc_gpio_chipset.gp_pin_read = mvsocgpp_pin_read;