Module Name:    src
Committed By:   matt
Date:           Wed Apr  6 05:53:28 UTC 2011

Modified Files:
        src/sys/arch/mips/include: db_machdep.h
        src/sys/arch/mips/mips: cpu_subr.c db_interface.c

Log Message:
minor cleanups.  foo -> foo_p.  add some whitespace.


To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/mips/include/db_machdep.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/mips/cpu_subr.c
cvs rdiff -u -r1.69 -r1.70 src/sys/arch/mips/mips/db_interface.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/db_machdep.h
diff -u src/sys/arch/mips/include/db_machdep.h:1.24 src/sys/arch/mips/include/db_machdep.h:1.25
--- src/sys/arch/mips/include/db_machdep.h:1.24	Sun Feb 20 07:45:47 2011
+++ src/sys/arch/mips/include/db_machdep.h	Wed Apr  6 05:53:27 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.h,v 1.24 2011/02/20 07:45:47 matt Exp $ */
+/* $NetBSD: db_machdep.h,v 1.25 2011/04/06 05:53:27 matt Exp $ */
 
 /*
  * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@@ -114,8 +114,8 @@
 db_addr_t branch_taken(int inst, db_addr_t pc, db_regs_t *regs);
 db_addr_t next_instr_address(db_addr_t pc, bool bd);
 
-bool ddb_running_on_this_cpu(void);
-bool ddb_running_on_any_cpu(void);
+bool ddb_running_on_this_cpu_p(void);
+bool ddb_running_on_any_cpu_p(void);
 void db_resume_others(void);
 #ifdef MIPS_DDB_WATCH
 void db_mach_watch_set_all(void);

Index: src/sys/arch/mips/mips/cpu_subr.c
diff -u src/sys/arch/mips/mips/cpu_subr.c:1.5 src/sys/arch/mips/mips/cpu_subr.c:1.6
--- src/sys/arch/mips/mips/cpu_subr.c:1.5	Tue Mar 15 07:39:22 2011
+++ src/sys/arch/mips/mips/cpu_subr.c	Wed Apr  6 05:53:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu_subr.c,v 1.5 2011/03/15 07:39:22 matt Exp $	*/
+/*	$NetBSD: cpu_subr.c,v 1.6 2011/04/06 05:53:27 matt Exp $	*/
 
 /*-
  * Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.5 2011/03/15 07:39:22 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.6 2011/04/06 05:53:27 matt Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -105,7 +105,7 @@
 static struct cpu_info *cpu_info_last = &cpu_info_store;
 
 struct cpu_info *
-cpu_info_alloc(struct pmap_tlb_info *ti, cpuid_t cpu_id, cpuid_t cpu_node_id,
+cpu_info_alloc(struct pmap_tlb_info *ti, cpuid_t cpu_id, cpuid_t cpu_package_id,
 	cpuid_t cpu_core_id, cpuid_t cpu_smt_id)
 {
 	vaddr_t cpu_info_offset = (vaddr_t)&cpu_info_store & PAGE_MASK; 
@@ -143,7 +143,7 @@
 	}
 
 	ci->ci_cpuid = cpu_id;
-	ci->ci_data.cpu_package_id = cpu_node_id;
+	ci->ci_data.cpu_package_id = cpu_package_id;
 	ci->ci_data.cpu_core_id = cpu_core_id;
 	ci->ci_data.cpu_smt_id = cpu_smt_id;
 	ci->ci_cpu_freq = cpu_info_store.ci_cpu_freq;
@@ -210,6 +210,8 @@
 void
 cpu_attach_common(device_t self, struct cpu_info *ci)
 {
+	const char * const xname = device_xname(self);
+
 	/*
 	 * Cross link cpu_info and its device together
 	 */
@@ -218,19 +220,19 @@
 	KASSERT(ci->ci_idepth == 0);
 
 	evcnt_attach_dynamic(&ci->ci_ev_count_compare,
-		EVCNT_TYPE_INTR, NULL, device_xname(self),
+		EVCNT_TYPE_INTR, NULL, xname,
 		"int 5 (clock)");
 	evcnt_attach_dynamic(&ci->ci_ev_count_compare_missed,
-		EVCNT_TYPE_INTR, NULL, device_xname(self),
+		EVCNT_TYPE_INTR, NULL, xname,
 		"int 5 (clock) missed");
 	evcnt_attach_dynamic(&ci->ci_ev_fpu_loads,
-		EVCNT_TYPE_MISC, NULL, device_xname(self),
+		EVCNT_TYPE_MISC, NULL, xname,
 		"fpu loads");
 	evcnt_attach_dynamic(&ci->ci_ev_fpu_saves,
-		EVCNT_TYPE_MISC, NULL, device_xname(self),
+		EVCNT_TYPE_MISC, NULL, xname,
 		"fpu saves");
 	evcnt_attach_dynamic(&ci->ci_ev_tlbmisses,
-		EVCNT_TYPE_TRAP, NULL, device_xname(self),
+		EVCNT_TYPE_TRAP, NULL, xname,
 		"tlb misses");
 
 	if (ci == &cpu_info_store)
@@ -247,16 +249,16 @@
 		cpu_info_last = ci;
 	}
 	evcnt_attach_dynamic(&ci->ci_evcnt_synci_activate_rqst,
-	    EVCNT_TYPE_MISC, NULL, device_xname(self),
+	    EVCNT_TYPE_MISC, NULL, xname,
 	    "syncicache activate request");
 	evcnt_attach_dynamic(&ci->ci_evcnt_synci_deferred_rqst,
-	    EVCNT_TYPE_MISC, NULL, device_xname(self),
+	    EVCNT_TYPE_MISC, NULL, xname,
 	    "syncicache deferred request");
 	evcnt_attach_dynamic(&ci->ci_evcnt_synci_ipi_rqst,
-	    EVCNT_TYPE_MISC, NULL, device_xname(self),
+	    EVCNT_TYPE_MISC, NULL, xname,
 	    "syncicache ipi request");
 	evcnt_attach_dynamic(&ci->ci_evcnt_synci_onproc_rqst,
-	    EVCNT_TYPE_MISC, NULL, device_xname(self),
+	    EVCNT_TYPE_MISC, NULL, xname,
 	    "syncicache onproc request");
 
 	/*
@@ -384,15 +386,13 @@
 	gr[_REG_CAUSE] = tf->tf_regs[_R_CAUSE];
 	gr[_REG_EPC]   = tf->tf_regs[_R_PC];
 	gr[_REG_SR]    = tf->tf_regs[_R_SR];
+	mcp->_mc_tlsbase = (intptr_t)l->l_private;
 
 	if ((ras_pc = (intptr_t)ras_lookup(l->l_proc,
 	    (void *) (intptr_t)gr[_REG_EPC])) != -1)
 		gr[_REG_EPC] = ras_pc;
 
-	*flags |= _UC_CPU;
-
-	mcp->_mc_tlsbase = (uintptr_t)l->l_private;
-	*flags |= _UC_TLSBASE;
+	*flags |= _UC_CPU | _UC_TLSBASE;
 
 	/* Save floating point register context, if any. */
 	if (fpu_used_p(l)) {
@@ -453,6 +453,11 @@
 		/* Do not restore SR. */
 	}
 
+	/* Restore the private thread context */
+	if (flags & _UC_TLSBASE) {
+		lwp_setprivate(l, (void *)(intptr_t)mcp->_mc_tlsbase);
+	}
+
 	/* Restore floating point register context, if any. */
 	if (flags & _UC_FPU) {
 		size_t fplen;
@@ -477,9 +482,6 @@
 		memcpy(&pcb->pcb_fpregs, &mcp->__fpregs, fplen);
 	}
 
-	if ((flags & _UC_TLSBASE) != 0)
-		lwp_setprivate(l, (void *)(uintptr_t)mcp->_mc_tlsbase);
-
 	mutex_enter(p->p_lock);
 	if (flags & _UC_SETSTACK)
 		l->l_sigstk.ss_flags |= SS_ONSTACK;
@@ -698,7 +700,7 @@
 			int index = CPUSET_NEXT(expected);
 			CPUSET_DEL(expected, index);
 			printf(" cpu%d", index);
-		} while(!CPUSET_EMPTY_P(expected));
+		} while (!CPUSET_EMPTY_P(expected));
 		printf("\n");
 	}
 }
@@ -772,13 +774,13 @@
 		CPUSET_ADD(cpus_paused, index);
 		do {
 			;
-		} while(CPUSET_HAS_P(cpus_paused, index));
+		} while (CPUSET_HAS_P(cpus_paused, index));
 		CPUSET_ADD(cpus_resumed, index);
 
 #if defined(DDB)
-		if (ddb_running_on_this_cpu())
+		if (ddb_running_on_this_cpu_p())
 			cpu_Debugger();
-		if (ddb_running_on_any_cpu())
+		if (ddb_running_on_any_cpu_p())
 			continue;
 #endif
 		break;

Index: src/sys/arch/mips/mips/db_interface.c
diff -u src/sys/arch/mips/mips/db_interface.c:1.69 src/sys/arch/mips/mips/db_interface.c:1.70
--- src/sys/arch/mips/mips/db_interface.c:1.69	Thu Mar  3 18:44:58 2011
+++ src/sys/arch/mips/mips/db_interface.c	Wed Apr  6 05:53:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: db_interface.c,v 1.69 2011/03/03 18:44:58 matt Exp $	*/
+/*	$NetBSD: db_interface.c,v 1.70 2011/04/06 05:53:27 matt Exp $	*/
 
 /*
  * Mach Operating System
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.69 2011/03/03 18:44:58 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.70 2011/04/06 05:53:27 matt Exp $");
 
 #include "opt_multiprocessor.h"
 #include "opt_cputype.h"	/* which mips CPUs do we support? */
@@ -108,8 +108,6 @@
 void db_mtcr_cmd(db_expr_t, bool, db_expr_t, const char *);
 #endif
 
-bool db_running_on_this_cpu_p(void);
-
 paddr_t kvtophys(vaddr_t);
 
 CTASSERT(sizeof(ddb_regs) == sizeof(struct reg));
@@ -204,7 +202,7 @@
 void
 db_read_bytes(vaddr_t addr, size_t size, char *data)
 {
-	char *src = (char *)addr;
+	const char *src = (char *)addr;
 
 	while (size--)
 		*data++ = *src++;
@@ -295,8 +293,8 @@
 
 #define	FLDWIDTH	10
 
-#define	SHOW32(reg, name)	SHOW32SEL(reg, 0, name)
-#define SHOW64(reg, name)	MIPS64_SHOW64(reg, 0, name)
+#define SHOW32(reg, name)	SHOW32SEL(reg, 0, name)
+#define SHOW64(reg, name)	SHOW64SEL(reg, 0, name)
 
 #define	SHOW32SEL(num, sel, name)					\
 do {									\
@@ -313,7 +311,7 @@
 } while (0)
 
 /* XXX not 64-bit ABI safe! */
-#define	MIPS64_SHOW64(num, sel, name)					\
+#define	SHOW64SEL(num, sel, name)					\
 do {									\
 	uint64_t __val;							\
 									\
@@ -343,10 +341,9 @@
 #define	MIPS64_SET32(num, sel, name, val)				\
 do {									\
 									\
-	KASSERT (CPUIS64BITS);						\
 	__asm volatile(							\
 		".set push			\n\t"			\
-		".set mips64			\n\t"			\
+		".set mips32			\n\t"			\
 		"mtc0 %0,$%1,%2			\n\t"			\
 		".set pop			\n\t"			\
 	    :: "r"(val), "n"(num), "n"(sel));				\
@@ -415,9 +412,9 @@
 	}
 
 	if ((cp0flags & MIPS_CP0FL_EIRR) != 0)
-		MIPS64_SHOW64(9, 6, "eirr");
+		SHOW64SEL(9, 6, "eirr");
 	if ((cp0flags & MIPS_CP0FL_EIMR) != 0)
-		MIPS64_SHOW64(9, 7, "eimr");
+		SHOW64SEL(9, 7, "eimr");
 
 	if (CPUIS64BITS) {
 		SHOW64(MIPS_COP_0_TLB_HI, "entryhi");
@@ -989,13 +986,13 @@
 #ifdef MULTIPROCESSOR
 
 bool 
-ddb_running_on_this_cpu(void)
+ddb_running_on_this_cpu_p(void)
 {               
-	return ddb_cpu == cpu_index(curcpu());
+	return ddb_cpu == cpu_number();
 }
 
 bool 
-ddb_running_on_any_cpu(void)
+ddb_running_on_any_cpu_p(void)
 {               
 	return ddb_cpu != NOCPU;
 }
@@ -1003,9 +1000,9 @@
 void
 db_resume_others(void)
 {
-	int cpu_me = cpu_index(curcpu());
+	u_int cpu_me = cpu_number();
 
-	if (atomic_cas_32(&ddb_cpu, cpu_me, NOCPU) == cpu_me)
+	if (atomic_cas_uint(&ddb_cpu, cpu_me, NOCPU) == cpu_me)
 		cpu_resume_others();
 }
 

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