Module Name:    src
Committed By:   isaki
Date:           Mon Jul 18 14:11:27 UTC 2011

Modified Files:
        src/sys/arch/m68k/fpe: fpu_calcea.c fpu_emulate.c fpu_fmovecr.c
            fpu_fscale.c fpu_fstore.c fpu_int.c fpu_log.c fpu_rem.c

Log Message:
fix indent again.
- "Second level indents are four spaces." pointed out by tsutsui@
- fold long line.


To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/m68k/fpe/fpu_calcea.c
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/m68k/fpe/fpu_emulate.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/m68k/fpe/fpu_fmovecr.c \
    src/sys/arch/m68k/fpe/fpu_log.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/m68k/fpe/fpu_fscale.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/m68k/fpe/fpu_fstore.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/m68k/fpe/fpu_int.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/m68k/fpe/fpu_rem.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/m68k/fpe/fpu_calcea.c
diff -u src/sys/arch/m68k/fpe/fpu_calcea.c:1.25 src/sys/arch/m68k/fpe/fpu_calcea.c:1.26
--- src/sys/arch/m68k/fpe/fpu_calcea.c:1.25	Mon Jul 18 07:44:30 2011
+++ src/sys/arch/m68k/fpe/fpu_calcea.c	Mon Jul 18 14:11:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu_calcea.c,v 1.25 2011/07/18 07:44:30 isaki Exp $	*/
+/*	$NetBSD: fpu_calcea.c,v 1.26 2011/07/18 14:11:27 isaki Exp $	*/
 
 /*
  * Copyright (c) 1995 Gordon W. Ross
@@ -34,7 +34,7 @@
 #include "opt_m68k_arch.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_calcea.c,v 1.25 2011/07/18 07:44:30 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_calcea.c,v 1.26 2011/07/18 14:11:27 isaki Exp $");
 
 #include <sys/param.h>
 #include <sys/signal.h>
@@ -88,13 +88,13 @@
 		ea->ea_regnum = modreg & 0xf;
 		ea->ea_flags = EA_DIRECT;
 		DPRINTF(("%s: register direct reg=%d\n",
-			__func__, ea->ea_regnum));
+		    __func__, ea->ea_regnum));
 	} else if ((modreg & 077) == 074) {
 		/* immediate */
 		ea->ea_flags = EA_IMMED;
 		sig = fetch_immed(frame, insn, &ea->ea_immed[0]);
 		DPRINTF(("%s: immediate size=%d\n",
-			__func__, insn->is_datasize));
+		    __func__, insn->is_datasize));
 	}
 	/*
 	 * rest of the address modes need to be separately
@@ -106,7 +106,7 @@
 		ea->ea_flags = EA_FRAME_EA;
 		ea->ea_fea = frame->f_fmt4.f_fa;
 		DPRINTF(("%s: 68LC040 - in-frame EA (%p) size %d\n",
-			__func__, (void *)ea->ea_fea, insn->is_datasize));
+		    __func__, (void *)ea->ea_fea, insn->is_datasize));
 		if ((modreg & 070) == 030) {
 			/* postincrement mode */
 			ea->ea_flags |= EA_POSTINCR;
@@ -130,26 +130,26 @@
 		case 020:			/* (An) */
 			ea->ea_flags = 0;
 			DPRINTF(("%s: register indirect reg=%d\n",
-				__func__, ea->ea_regnum));
+			    __func__, ea->ea_regnum));
 			break;
 
 		case 030:			/* (An)+ */
 			ea->ea_flags = EA_POSTINCR;
 			DPRINTF(("%s: reg indirect postincrement reg=%d\n",
-				__func__, ea->ea_regnum));
+			    __func__, ea->ea_regnum));
 			break;
 
 		case 040:			/* -(An) */
 			ea->ea_flags = EA_PREDECR;
 			DPRINTF(("%s: reg indirect predecrement reg=%d\n",
-				__func__, ea->ea_regnum));
+			    __func__, ea->ea_regnum));
 			break;
 
 		case 050:			/* (d16,An) */
 			ea->ea_flags = EA_OFFSET;
 			sig = fetch_disp(frame, insn, 1, &ea->ea_offset);
 			DPRINTF(("%s: reg indirect with displacement reg=%d\n",
-				__func__, ea->ea_regnum));
+			    __func__, ea->ea_regnum));
 		break;
 
 		case 060:			/* (d8,An,Xn) */
@@ -164,25 +164,25 @@
 			case 0:			/* (xxxx).W */
 				ea->ea_flags = EA_ABS;
 				sig = fetch_disp(frame, insn, 1,
-					&ea->ea_absaddr);
+				    &ea->ea_absaddr);
 				DPRINTF(("%s: absolute address (word)\n",
-					__func__));
+				    __func__));
 				break;
 
 			case 1:			/* (xxxxxxxx).L */
 				ea->ea_flags = EA_ABS;
 				sig = fetch_disp(frame, insn, 2,
-					&ea->ea_absaddr);
+				    &ea->ea_absaddr);
 				DPRINTF(("%s: absolute address (long)\n",
-					__func__));
+				    __func__));
 				break;
 
 			case 2:			/* (d16,PC) */
 				ea->ea_flags = EA_PC_REL | EA_OFFSET;
 				sig = fetch_disp(frame, insn, 1,
-					&ea->ea_absaddr);
+				    &ea->ea_absaddr);
 				DPRINTF(("%s: pc relative word displacement\n",
-					__func__));
+				    __func__));
 				break;
 
 			case 3:			/* (d8,PC,Xn) */
@@ -194,7 +194,7 @@
 				/* it should have been taken care of earlier */
 			default:
 				DPRINTF(("%s: invalid addr mode (7,%d)\n",
-					__func__, modreg & 7));
+				    __func__, modreg & 7));
 				return SIGILL;
 			}
 			break;
@@ -246,7 +246,7 @@
 		ea->ea_basedisp = idx + basedisp;
 		ea->ea_outerdisp = 0;
 		DPRINTF(("%s: brief ext word idxreg=%d, basedisp=%08x\n",
-			__func__, ea->ea_idxreg, ea->ea_basedisp));
+		    __func__, ea->ea_idxreg, ea->ea_basedisp));
 	} else {
 		/* full extension word */
 		if (extword & 0x80) {
@@ -278,16 +278,16 @@
 			break;
 		default:
 			DPRINTF(("%s: invalid indirect mode: ext word %04x\n",
-				__func__, extword));
+			    __func__, extword));
 			return SIGILL;
 			break;
 		}
 		DPRINTF(("%s: full ext idxreg=%d, basedisp=%x, outerdisp=%x\n",
-			__func__,
-			ea->ea_idxreg, ea->ea_basedisp, ea->ea_outerdisp));
+		    __func__,
+		    ea->ea_idxreg, ea->ea_basedisp, ea->ea_outerdisp));
 	}
 	DPRINTF(("%s: regnum=%d, flags=%x\n",
-		__func__, ea->ea_regnum, ea->ea_flags));
+	    __func__, ea->ea_regnum, ea->ea_flags));
 	return 0;
 }
 
@@ -322,7 +322,7 @@
 #ifdef DEBUG_FPE
 		if (ea->ea_flags & (EA_PREDECR|EA_POSTINCR)) {
 			printf("%s: frame ea %08x w/r%d\n",
-				__func__, ea->ea_fea, ea->ea_regnum);
+			    __func__, ea->ea_fea, ea->ea_regnum);
 		} else {
 			printf("%s: frame ea %08x\n", __func__, ea->ea_fea);
 		}
@@ -346,12 +346,12 @@
 	if (ea->ea_flags & EA_DIRECT) {
 		if (len > 4) {
 			DPRINTF(("%s: operand doesn't fit CPU reg\n",
-				__func__));
+			    __func__));
 			return SIGILL;
 		}
 		if (ea->ea_moffs > 0) {
 			DPRINTF(("%s: more than one move from CPU reg\n",
-				__func__));
+			    __func__));
 			return SIGILL;
 		}
 		src = (char *)&frame->f_regs[ea->ea_regnum];
@@ -359,19 +359,18 @@
 		if (len < 4) {
 			src += (4 - len);
 			DPRINTF(("%s: short/byte opr - addr adjusted\n",
-				__func__));
+			    __func__));
 		}
 		DPRINTF(("%s: src %p\n", __func__, src));
 		memcpy(dst, src, len);
 	} else if (ea->ea_flags & EA_IMMED) {
 		DPRINTF(("%s: immed %08x%08x%08x size %d\n", __func__,
-			ea->ea_immed[0], ea->ea_immed[1], ea->ea_immed[2],
-			len));
+		    ea->ea_immed[0], ea->ea_immed[1], ea->ea_immed[2], len));
 		src = (char *)&ea->ea_immed[0];
 		if (len < 4) {
 			src += (4 - len);
 			DPRINTF(("%s: short/byte immed opr - addr adjusted\n",
-				__func__));
+			    __func__));
 		}
 		memcpy(dst, src, len);
 	} else if (ea->ea_flags & EA_ABS) {
@@ -389,15 +388,16 @@
 			src = (char *)insn->is_pc + 4;
 			DPRINTF(("%s: pc relative pc+4 = %p\n", __func__, src));
 		} else /* not PC relative */ {
-			DPRINTF(("%s: using register %c%d\n", __func__,
-				(ea->ea_regnum >= 8) ? 'a' : 'd',
-				ea->ea_regnum & 7));
+			DPRINTF(("%s: using register %c%d\n",
+			    __func__,
+			    (ea->ea_regnum >= 8) ? 'a' : 'd',
+			    ea->ea_regnum & 7));
 			/* point to the register */
 			reg = &frame->f_regs[ea->ea_regnum];
 
 			if (ea->ea_flags & EA_PREDECR) {
 				DPRINTF(("%s: predecr mode - "
-					"reg decremented\n", __func__));
+				    "reg decremented\n", __func__));
 				*reg -= step;
 				ea->ea_moffs = 0;
 			}
@@ -417,13 +417,13 @@
 		if (ea->ea_flags & EA_POSTINCR) {
 			if (ea->ea_flags & EA_PC_REL) {
 				DPRINTF(("%s: tried to postincrement PC\n",
-					__func__));
+				    __func__));
 				return SIGILL;
 			}
 			*reg += step;
 			ea->ea_moffs = 0;
 			DPRINTF(("%s: postinc mode - reg incremented\n",
-				__func__));
+			    __func__));
 		} else {
 			ea->ea_moffs += len;
 		}
@@ -467,7 +467,7 @@
 #ifdef DEBUG_FPE
 		if (ea->ea_flags & (EA_PREDECR|EA_POSTINCR)) {
 			printf("%s: frame ea %08x w/r%d\n",
-				__func__, ea->ea_fea, ea->ea_regnum);
+			    __func__, ea->ea_fea, ea->ea_regnum);
 		} else {
 			printf("%s: frame ea %08x\n", __func__, ea->ea_fea);
 		}
@@ -494,12 +494,12 @@
 	} else if (ea->ea_flags & EA_DIRECT) {
 		if (len > 4) {
 			DPRINTF(("%s: operand doesn't fit CPU reg\n",
-				__func__));
+			    __func__));
 			return SIGILL;
 		}
 		if (ea->ea_moffs > 0) {
 			DPRINTF(("%s: more than one move to CPU reg\n",
-				__func__));
+			    __func__));
 			return SIGILL;
 		}
 		dst = (char *)&frame->f_regs[ea->ea_regnum];
@@ -507,20 +507,20 @@
 		if (len < 4) {
 			dst += (4 - len);
 			DPRINTF(("%s: short/byte opr - dst addr adjusted\n",
-				__func__));
+			    __func__));
 		}
 		DPRINTF(("%s: dst %p\n", __func__, dst));
 		memcpy(dst, src, len);
 	} else /* One of MANY indirect forms... */ {
 		DPRINTF(("%s: using register %c%d\n", __func__,
-			(ea->ea_regnum >= 8) ? 'a' : 'd', ea->ea_regnum & 7));
+		    (ea->ea_regnum >= 8) ? 'a' : 'd', ea->ea_regnum & 7));
 		/* point to the register */
 		reg = &(frame->f_regs[ea->ea_regnum]);
 
 		/* do pre-decrement */
 		if (ea->ea_flags & EA_PREDECR) {
 			DPRINTF(("%s: predecr mode - reg decremented\n",
-				__func__));
+			    __func__));
 			*reg -= step;
 			ea->ea_moffs = 0;
 		}
@@ -538,7 +538,7 @@
 			*reg += step;
 			ea->ea_moffs = 0;
 			DPRINTF(("%s: postinc mode - reg incremented\n",
-				__func__));
+			    __func__));
 		} else {
 			ea->ea_moffs += len;
 		}
@@ -675,8 +675,8 @@
 
 		if (ea->ea_flags & EA_MEM_INDIR) {
 			DPRINTF(("%s: mem indir mode: basedisp=%08x, "
-				"outerdisp=%08x\n",
-				__func__, ea->ea_basedisp, ea->ea_outerdisp));
+			    "outerdisp=%08x\n",
+			    __func__, ea->ea_basedisp, ea->ea_outerdisp));
 			DPRINTF(("%s: addr fetched from %p\n", __func__, ptr));
 			/* memory indirect modes */
 			word = fusword(ptr);

Index: src/sys/arch/m68k/fpe/fpu_emulate.c
diff -u src/sys/arch/m68k/fpe/fpu_emulate.c:1.34 src/sys/arch/m68k/fpe/fpu_emulate.c:1.35
--- src/sys/arch/m68k/fpe/fpu_emulate.c:1.34	Mon Jul 18 07:44:30 2011
+++ src/sys/arch/m68k/fpe/fpu_emulate.c	Mon Jul 18 14:11:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu_emulate.c,v 1.34 2011/07/18 07:44:30 isaki Exp $	*/
+/*	$NetBSD: fpu_emulate.c,v 1.35 2011/07/18 14:11:27 isaki Exp $	*/
 
 /*
  * Copyright (c) 1995 Gordon W. Ross
@@ -37,7 +37,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_emulate.c,v 1.34 2011/07/18 07:44:30 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_emulate.c,v 1.35 2011/07/18 14:11:27 isaki Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -70,9 +70,9 @@
 #ifdef DEBUG_FPE
 #define DUMP_INSN(insn)							\
 	printf("%s: insn={adv=%d,siz=%d,op=%04x,w1=%04x}\n",		\
-		__func__,						\
-		(insn)->is_advance, (insn)->is_datasize,		\
-		(insn)->is_opcode, (insn)->is_word1)
+	    __func__,							\
+	    (insn)->is_advance, (insn)->is_datasize,			\
+	    (insn)->is_opcode, (insn)->is_word1)
 #define DPRINTF(x)	printf x
 #else
 #define DUMP_INSN(insn)	do {} while (/* CONSTCOND */ 0)
@@ -101,7 +101,7 @@
 	fe.fe_fpcr = fpf->fpf_fpcr;
 
 	DPRINTF(("%s: ENTERING: FPSR=%08x, FPCR=%08x\n",
-		__func__, fe.fe_fpsr, fe.fe_fpcr));
+	    __func__, fe.fe_fpsr, fe.fe_fpcr));
 
 	/* always set this (to avoid a warning) */
 	insn.is_pc = frame->f_pc;
@@ -134,7 +134,7 @@
 
 	if ((word & 0xf000) != 0xf000) {
 		DPRINTF(("%s: not coproc. insn.: opcode=0x%x\n",
-			__func__, word));
+		    __func__, word));
 		fpe_abort(frame, ksi, SIGILL, ILL_ILLOPC);
 	}
 
@@ -194,7 +194,7 @@
 	} else if (optype == 0x0080 || optype == 0x00C0) {
 		/* type=2 or 3: fbcc, short or long disp. */
 		DPRINTF(("%s: fbcc %s\n", __func__,
-			(optype & 0x40) ? "long" : "short"));
+		    (optype & 0x40) ? "long" : "short"));
 		sig = fpu_emul_brcc(&fe, &insn);
 	} else if (optype == 0x0040) {
 		/* type=1: fdbcc, fscc, ftrapcc */
@@ -206,7 +206,7 @@
 		/* type=6: reserved */
 		/* type=7: reserved */
 		DPRINTF(("%s: bad opcode type: opcode=0x%x\n", __func__,
-			insn.is_opcode));
+		    insn.is_opcode));
 		sig = SIGILL;
 	}
 
@@ -222,7 +222,7 @@
 #if defined(DDB) && defined(DEBUG_FPE)
 	else {
 		printf("%s: sig=%d, opcode=%x, word1=%x\n", __func__,
-			sig, insn.is_opcode, insn.is_word1);
+		    sig, insn.is_opcode, insn.is_word1);
 		kdb_trap(-1, (db_regs_t *)&frame);
 	}
 #endif
@@ -235,7 +235,7 @@
 #endif
 
 	DPRINTF(("%s: EXITING: w/FPSR=%08x, FPCR=%08x\n", __func__,
-		fe.fe_fpsr, fe.fe_fpcr));
+	    fe.fe_fpsr, fe.fe_fpcr));
 
 	if (sig)
 		fpe_abort(frame, ksi, sig, 0);
@@ -357,15 +357,15 @@
 		    insn->is_ea.ea_regnum >= 8 /* address reg */) {
 			/* attempted to copy FPCR to An */
 			DPRINTF(("%s: tried to copy FPCR from/to A%d\n",
-				__func__, insn->is_ea.ea_regnum & 7));
+			    __func__, insn->is_ea.ea_regnum & 7));
 			return SIGILL;
 		}
 		if (fpu_to_mem) {
 			sig = fpu_store_ea(frame, insn, &insn->is_ea,
-				(char *)&fpf->fpf_fpcr);
+			    (char *)&fpf->fpf_fpcr);
 		} else {
 			sig = fpu_load_ea(frame, insn, &insn->is_ea,
-				(char *)&fpf->fpf_fpcr);
+			    (char *)&fpf->fpf_fpcr);
 		}
 	}
 	if (sig)
@@ -377,15 +377,15 @@
 		    insn->is_ea.ea_regnum >= 8 /* address reg */) {
 			/* attempted to copy FPSR to An */
 			DPRINTF(("%s: tried to copy FPSR from/to A%d\n",
-				__func__, insn->is_ea.ea_regnum & 7));
+			    __func__, insn->is_ea.ea_regnum & 7));
 			return SIGILL;
 		}
 		if (fpu_to_mem) {
 			sig = fpu_store_ea(frame, insn, &insn->is_ea,
-				(char *)&fpf->fpf_fpsr);
+			    (char *)&fpf->fpf_fpsr);
 		} else {
 			sig = fpu_load_ea(frame, insn, &insn->is_ea,
-				(char *)&fpf->fpf_fpsr);
+			    (char *)&fpf->fpf_fpsr);
 		}
 	}
 	if (sig)
@@ -395,10 +395,10 @@
 		/* fpiar - can be moved to/from An */
 		if (fpu_to_mem) {
 			sig = fpu_store_ea(frame, insn, &insn->is_ea,
-				(char *)&fpf->fpf_fpiar);
+			    (char *)&fpf->fpf_fpiar);
 		} else {
 			sig = fpu_load_ea(frame, insn, &insn->is_ea,
-				(char *)&fpf->fpf_fpiar);
+			    (char *)&fpf->fpf_fpiar);
 		}
 	}
 	return sig;
@@ -469,20 +469,20 @@
 		if (regmask & reglist) {
 			if (fpu_to_mem) {
 				sig = fpu_store_ea(frame, insn, &insn->is_ea,
-					(char *)&fpregs[regnum * 3]);
+				    (char *)&fpregs[regnum * 3]);
 				DPRINTF(("%s: FP%d (%08x,%08x,%08x) saved\n",
-					__func__, regnum,
-					fpregs[regnum * 3],
-					fpregs[regnum * 3 + 1],
-					fpregs[regnum * 3 + 2]));
+				    __func__, regnum,
+				    fpregs[regnum * 3],
+				    fpregs[regnum * 3 + 1],
+				    fpregs[regnum * 3 + 2]));
 			} else {		/* mem to fpu */
 				sig = fpu_load_ea(frame, insn, &insn->is_ea,
-					(char *)&fpregs[regnum * 3]);
+				    (char *)&fpregs[regnum * 3]);
 				DPRINTF(("%s: FP%d (%08x,%08x,%08x) loaded\n",
-					__func__, regnum,
-					fpregs[regnum * 3],
-					fpregs[regnum * 3 + 1],
-					fpregs[regnum * 3 + 2]));
+				    __func__, regnum,
+				    fpregs[regnum * 3],
+				    fpregs[regnum * 3 + 1],
+				    fpregs[regnum * 3 + 2]));
 			}
 			if (sig)
 				break;
@@ -503,7 +503,7 @@
 	if (x->fp_class < 0 || y->fp_class < 0) {
 		/* if either of two is a SNAN, result is SNAN */
 		x->fp_class =
-			(y->fp_class < x->fp_class) ? y->fp_class : x->fp_class;
+		    (y->fp_class < x->fp_class) ? y->fp_class : x->fp_class;
 	} else if (x->fp_class == FPC_INF) {
 		if (y->fp_class == FPC_INF) {
 			/* both infinities */
@@ -573,7 +573,7 @@
 	DUMP_INSN(insn);
 
 	DPRINTF(("%s: FPSR = %08x, FPCR = %08x\n", __func__,
-		fe->fe_fpsr, fe->fe_fpcr));
+	    fe->fe_fpsr, fe->fe_fpcr));
 
 	word1 = insn->is_word1;
 	format = (word1 >> 10) & 7;
@@ -581,8 +581,8 @@
 
 	/* fetch a source operand : may not be used */
 	DPRINTF(("%s: dst/src FP%d=%08x,%08x,%08x\n", __func__,
-		regnum, fpregs[regnum * 3], fpregs[regnum * 3 + 1],
-		fpregs[regnum * 3 + 2]));
+	    regnum, fpregs[regnum * 3], fpregs[regnum * 3 + 1],
+	    fpregs[regnum * 3 + 2]));
 
 	fpu_explode(fe, &fe->fe_f1, FTYPE_EXT, &fpregs[regnum * 3]);
 
@@ -591,10 +591,10 @@
 	/* get the other operand which is always the source */
 	if ((word1 & 0x4000) == 0) {
 		DPRINTF(("%s: FP%d op FP%d => FP%d\n", __func__,
-			format, regnum, regnum));
+		    format, regnum, regnum));
 		DPRINTF(("%s: src opr FP%d=%08x,%08x,%08x\n", __func__,
-			format, fpregs[format * 3], fpregs[format * 3 + 1],
-			fpregs[format * 3 + 2]));
+		    format, fpregs[format * 3], fpregs[format * 3 + 1],
+		    fpregs[format * 3 + 2]));
 		fpu_explode(fe, &fe->fe_f2, FTYPE_EXT, &fpregs[format * 3]);
 	} else {
 		/* the operand is in memory */
@@ -642,18 +642,18 @@
 			printf("%c%d@+\n", regname, insn->is_ea.ea_regnum & 7);
 		} else if (flags & EA_OFFSET) {
 			printf("%c%d@(%d)\n", regname,
-				insn->is_ea.ea_regnum & 7,
-				insn->is_ea.ea_offset);
+			    insn->is_ea.ea_regnum & 7,
+			    insn->is_ea.ea_offset);
 		} else if (flags & EA_INDEXED) {
 			printf("%c%d@(...)\n", regname,
-				insn->is_ea.ea_regnum & 7);
+			    insn->is_ea.ea_regnum & 7);
 		} else if (flags & EA_ABS) {
 			printf("0x%08x\n", insn->is_ea.ea_absaddr);
 		} else if (flags & EA_IMMED) {
 			printf("#0x%08x,%08x,%08x\n",
-				insn->is_ea.ea_immed[0],
-				insn->is_ea.ea_immed[1],
-				insn->is_ea.ea_immed[2]);
+			    insn->is_ea.ea_immed[0],
+			    insn->is_ea.ea_immed[1],
+			    insn->is_ea.ea_immed[2]);
 		} else {
 			printf("%c%d@\n", regname, insn->is_ea.ea_regnum & 7);
 		}
@@ -674,7 +674,7 @@
 			format = FTYPE_LNG;
 		}
 		DPRINTF(("%s: src = %08x %08x %08x, siz = %d\n", __func__,
-			buf[0], buf[1], buf[2], insn->is_datasize));
+		    buf[0], buf[1], buf[2], insn->is_datasize));
 		fpu_explode(fe, &fe->fe_f2, format, buf);
 	}
 
@@ -853,7 +853,7 @@
 
 	default:		/* possibly 040/060 instructions */
 		DPRINTF(("%s: bad opcode=0x%x, word1=0x%x\n", __func__,
-			insn->is_opcode, insn->is_word1));
+		    insn->is_opcode, insn->is_word1));
 		sig = SIGILL;
 	}
 
@@ -870,19 +870,19 @@
 #ifdef DEBUG_FPE
 		if (!discard_result) {
 			printf("%s: %08x,%08x,%08x stored in FP%d\n", __func__,
-				fpregs[regnum * 3],
-				fpregs[regnum * 3 + 1],
-				fpregs[regnum * 3 + 2],
-				regnum);
+			    fpregs[regnum * 3],
+			    fpregs[regnum * 3 + 1],
+			    fpregs[regnum * 3 + 2],
+			    regnum);
 		} else {
 			static const char *class_name[] =
-				{ "SNAN", "QNAN", "ZERO", "NUM", "INF" };
+			    { "SNAN", "QNAN", "ZERO", "NUM", "INF" };
 			printf("%s: result(%s,%c,%d,%08x,%08x,%08x) "
-				"discarded\n", __func__,
-				class_name[res->fp_class + 2],
-				res->fp_sign ? '-' : '+', res->fp_exp,
-				res->fp_mant[0], res->fp_mant[1],
-				res->fp_mant[2]);
+			    "discarded\n", __func__,
+			    class_name[res->fp_class + 2],
+			    res->fp_sign ? '-' : '+', res->fp_exp,
+			    res->fp_mant[0], res->fp_mant[1],
+			    res->fp_mant[2]);
 		}
 #endif
 	} else {
@@ -890,7 +890,7 @@
 	}
 
 	DPRINTF(("%s: FPSR = %08x, FPCR = %08x\n", __func__,
-		fe->fe_fpsr, fe->fe_fpcr));
+	    fe->fe_fpsr, fe->fe_fpcr));
 
 	DUMP_INSN(insn);
 
@@ -951,7 +951,7 @@
 	case 3:			/* Greater or Equal */
 		DPRINTF(("GE"));
 		result = -((fpsr & FPSR_ZERO) ||
-			(fpsr & (FPSR_NAN|FPSR_NEG)) == 0);
+		    (fpsr & (FPSR_NAN|FPSR_NEG)) == 0);
 		break;
 	case 4:			/* Less Than */
 		DPRINTF(("LT"));
@@ -960,7 +960,7 @@
 	case 5:			/* Less or Equal */
 		DPRINTF(("LE"));
 		result = -((fpsr & FPSR_ZERO) ||
-			((fpsr & (FPSR_NAN|FPSR_NEG)) == FPSR_NEG));
+		    ((fpsr & (FPSR_NAN|FPSR_NEG)) == FPSR_NEG));
 		break;
 	case 6:			/* Greater or Less than */
 		DPRINTF(("GLT"));
@@ -1017,10 +1017,10 @@
 
 			if (count-- != 0) {
 				displ = fusword((void *)(insn->is_pc +
-					insn->is_advance));
+				    insn->is_advance));
 				if (displ < 0) {
 					DPRINTF(("%s: fault reading "
-						"displacement\n", __func__));
+					    "displacement\n", __func__));
 					return SIGSEGV;
 				}
 				/* sign-extend the displacement */
@@ -1031,7 +1031,7 @@
 				insn->is_advance += displ;
 #if 0				/* XXX */
 				insn->is_nextpc = insn->is_pc +
-					insn->is_advance;
+				    insn->is_advance;
 #endif
 			} else {
 				insn->is_advance = 6;
@@ -1081,7 +1081,7 @@
 		if (branch == -1 || branch == 0) {
 			/* set result */
 			sig = fpu_store_ea(frame, insn, &insn->is_ea,
-				(char *)&branch);
+			    (char *)&branch);
 		} else {
 			/* got an exception */
 			sig = branch;
@@ -1141,8 +1141,8 @@
 	} else if (sig)
 		return SIGILL;		/* got a signal */
 	DPRINTF(("%s: %s insn @ %x (%x+%x) (disp=%x)\n", __func__,
-		(sig == -1) ? "BRANCH to" : "NEXT",
-		insn->is_pc + insn->is_advance, insn->is_pc, insn->is_advance,
-		displ));
+	    (sig == -1) ? "BRANCH to" : "NEXT",
+	    insn->is_pc + insn->is_advance, insn->is_pc, insn->is_advance,
+	    displ));
 	return 0;
 }

Index: src/sys/arch/m68k/fpe/fpu_fmovecr.c
diff -u src/sys/arch/m68k/fpe/fpu_fmovecr.c:1.13 src/sys/arch/m68k/fpe/fpu_fmovecr.c:1.14
--- src/sys/arch/m68k/fpe/fpu_fmovecr.c:1.13	Mon Jul 18 07:44:30 2011
+++ src/sys/arch/m68k/fpe/fpu_fmovecr.c	Mon Jul 18 14:11:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu_fmovecr.c,v 1.13 2011/07/18 07:44:30 isaki Exp $	*/
+/*	$NetBSD: fpu_fmovecr.c,v 1.14 2011/07/18 14:11:27 isaki Exp $	*/
 
 /*
  * Copyright (c) 1995  Ken Nakata
@@ -32,7 +32,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_fmovecr.c,v 1.13 2011/07/18 07:44:30 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_fmovecr.c,v 1.14 2011/07/18 14:11:27 isaki Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -112,8 +112,8 @@
 	fpu_implode(fe, &fe->fe_f3, FTYPE_EXT, &fpreg[dstreg * 3]);
 #if DEBUG_FPE
 	printf("  fpu_emul_fmovecr: result %08x,%08x,%08x to FP%d\n",
-		fpreg[dstreg * 3], fpreg[dstreg * 3 + 1], fpreg[dstreg * 3 + 2],
-		dstreg);
+	    fpreg[dstreg * 3], fpreg[dstreg * 3 + 1], fpreg[dstreg * 3 + 2],
+	    dstreg);
 #endif
 	return 0;
 }
Index: src/sys/arch/m68k/fpe/fpu_log.c
diff -u src/sys/arch/m68k/fpe/fpu_log.c:1.13 src/sys/arch/m68k/fpe/fpu_log.c:1.14
--- src/sys/arch/m68k/fpe/fpu_log.c:1.13	Mon Jul 18 07:44:30 2011
+++ src/sys/arch/m68k/fpe/fpu_log.c	Mon Jul 18 14:11:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu_log.c,v 1.13 2011/07/18 07:44:30 isaki Exp $	*/
+/*	$NetBSD: fpu_log.c,v 1.14 2011/07/18 14:11:27 isaki Exp $	*/
 
 /*
  * Copyright (c) 1995  Ken Nakata
@@ -32,7 +32,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_log.c,v 1.13 2011/07/18 07:44:30 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_log.c,v 1.14 2011/07/18 14:11:27 isaki Exp $");
 
 #include <sys/types.h>
 #include <sys/systm.h>
@@ -291,7 +291,7 @@
 	} else /* the usual case */ {
 #if FPE_DEBUG
 		printf("__fpu_logn: the usual case. X=(%d,%08x,%08x...)\n",
-			X.fp_exp, X.fp_mant[0], X.fp_mant[1]);
+		    X.fp_exp, X.fp_mant[0], X.fp_mant[1]);
 #endif
 
 		k = X.fp_exp;
@@ -309,10 +309,10 @@
 
 #if FPE_DEBUG
 		printf("__fpu_logn: X=Y*2^k=(%d,%08x,%08x...)*2^%d\n",
-			fe->fe_f2.fp_exp, fe->fe_f2.fp_mant[0],
-			fe->fe_f2.fp_mant[1], k);
+		    fe->fe_f2.fp_exp, fe->fe_f2.fp_mant[0],
+		    fe->fe_f2.fp_mant[1], k);
 		printf("__fpu_logn: F=(%d,%08x,%08x...)\n",
-			F.fp_exp, F.fp_mant[0], F.fp_mant[1]);
+		    F.fp_exp, F.fp_mant[0], F.fp_mant[1]);
 #endif
 
 		/* index to the table */
@@ -331,16 +331,17 @@
 
 		/* fe_f2 = 1/F */
 		fe->fe_f2.fp_class = FPC_NUM;
-		fe->fe_f2.fp_sign = fe->fe_f2.fp_sticky = fe->fe_f2.fp_mant[2] = 0;
+		fe->fe_f2.fp_sign = fe->fe_f2.fp_sticky = fe->fe_f2.fp_mant[2]
+		    = 0;
 		fe->fe_f2.fp_exp = logtbl[i].sp_exp;
 		fe->fe_f2.fp_mant[0] = (logtbl[i].sp_m0 >> (31 - FP_LG));
 		fe->fe_f2.fp_mant[1] = (logtbl[i].sp_m0 << (FP_LG + 1)) |
-			(logtbl[i].sp_m1 >> (31 - FP_LG));
+		    (logtbl[i].sp_m1 >> (31 - FP_LG));
 		fe->fe_f2.fp_mant[2] = (u_int)(logtbl[i].sp_m1 << (FP_LG + 1));
 
 #if FPE_DEBUG
 		printf("__fpu_logn: 1/F=(%d,%08x,%08x...)\n", fe->fe_f2.fp_exp,
-			fe->fe_f2.fp_mant[0], fe->fe_f2.fp_mant[1]);
+		    fe->fe_f2.fp_mant[0], fe->fe_f2.fp_mant[1]);
 #endif
 
 		/* U = (Y-F) * (1/F) */
@@ -352,10 +353,12 @@
 		fpu_explode(fe, &fe->fe_f1, FTYPE_LNG, &k);
 		(void)fpu_const(&fe->fe_f2, 0x30 /* ln(2) */);
 #if FPE_DEBUG
-		printf("__fpu_logn: fp(k)=(%d,%08x,%08x...)\n", fe->fe_f1.fp_exp,
-			fe->fe_f1.fp_mant[0], fe->fe_f1.fp_mant[1]);
-		printf("__fpu_logn: ln(2)=(%d,%08x,%08x...)\n", fe->fe_f2.fp_exp,
-			fe->fe_f2.fp_mant[0], fe->fe_f2.fp_mant[1]);
+		printf("__fpu_logn: fp(k)=(%d,%08x,%08x...)\n",
+		    fe->fe_f1.fp_exp,
+		    fe->fe_f1.fp_mant[0], fe->fe_f1.fp_mant[1]);
+		printf("__fpu_logn: ln(2)=(%d,%08x,%08x...)\n",
+		    fe->fe_f2.fp_exp,
+		    fe->fe_f2.fp_mant[0], fe->fe_f2.fp_mant[1]);
 #endif
 		/* K * LOGOF2 */
 		d = fpu_mul(fe);
@@ -434,16 +437,18 @@
 		i++;
 		/* fe_f2 = logtbl[i+1] (== LOG(F)) */
 		fe->fe_f2.fp_class = FPC_NUM;
-		fe->fe_f2.fp_sign = fe->fe_f2.fp_sticky = fe->fe_f2.fp_mant[2] = 0;
+		fe->fe_f2.fp_sign = fe->fe_f2.fp_sticky = fe->fe_f2.fp_mant[2]
+		    = 0;
 		fe->fe_f2.fp_exp = logtbl[i].sp_exp;
 		fe->fe_f2.fp_mant[0] = (logtbl[i].sp_m0 >> (31 - FP_LG));
 		fe->fe_f2.fp_mant[1] = (logtbl[i].sp_m0 << (FP_LG + 1)) |
-			(logtbl[i].sp_m1 >> (31 - FP_LG));
+		    (logtbl[i].sp_m1 >> (31 - FP_LG));
 		fe->fe_f2.fp_mant[2] = (logtbl[i].sp_m1 << (FP_LG + 1));
 
 #if FPE_DEBUG
-		printf("__fpu_logn: ln(F)=(%d,%08x,%08x,...)\n", fe->fe_f2.fp_exp,
-			fe->fe_f2.fp_mant[0], fe->fe_f2.fp_mant[1]);
+		printf("__fpu_logn: ln(F)=(%d,%08x,%08x,...)\n",
+		    fe->fe_f2.fp_exp,
+		    fe->fe_f2.fp_mant[0], fe->fe_f2.fp_mant[1]);
 #endif
 
 		/* LOG(F)+U*V*(A2+V*(A4+V*A6)) */
@@ -455,8 +460,8 @@
 
 #if FPE_DEBUG
 		printf("__fpu_logn: ln(Y)=(%c,%d,%08x,%08x,%08x)\n",
-			d->fp_sign ? '-' : '+', d->fp_exp,
-			d->fp_mant[0], d->fp_mant[1], d->fp_mant[2]);
+		    d->fp_sign ? '-' : '+', d->fp_exp,
+		    d->fp_mant[0], d->fp_mant[1], d->fp_mant[2]);
 #endif
 
 		CPYFPN(&fe->fe_f1, d);
@@ -520,9 +525,10 @@
 		} else if (fp->fp_class == FPC_NUM) {
 			/* the real work here */
 			if (fp->fp_mant[0] == FP_1 && fp->fp_mant[1] == 0 &&
-				fp->fp_mant[2] == 0) {
+			    fp->fp_mant[2] == 0) {
 				/* fp == 2.0 ^ exp <--> log2(fp) == exp */
-				fpu_explode(fe, &fe->fe_f3, FTYPE_LNG, &fp->fp_exp);
+				fpu_explode(fe, &fe->fe_f3, FTYPE_LNG,
+				    &fp->fp_exp);
 				fp = &fe->fe_f3;
 			} else {
 				fp = __fpu_logn(fe);

Index: src/sys/arch/m68k/fpe/fpu_fscale.c
diff -u src/sys/arch/m68k/fpe/fpu_fscale.c:1.14 src/sys/arch/m68k/fpe/fpu_fscale.c:1.15
--- src/sys/arch/m68k/fpe/fpu_fscale.c:1.14	Mon Jul 18 07:44:30 2011
+++ src/sys/arch/m68k/fpe/fpu_fscale.c	Mon Jul 18 14:11:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu_fscale.c,v 1.14 2011/07/18 07:44:30 isaki Exp $	*/
+/*	$NetBSD: fpu_fscale.c,v 1.15 2011/07/18 14:11:27 isaki Exp $	*/
 
 /*
  * Copyright (c) 1995 Ken Nakata
@@ -38,7 +38,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_fscale.c,v 1.14 2011/07/18 07:44:30 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_fscale.c,v 1.15 2011/07/18 14:11:27 isaki Exp $");
 
 #include <sys/types.h>
 #include <sys/signal.h>
@@ -82,11 +82,11 @@
 	if ((word1 & 0x4000) == 0) {
 #if DEBUG_FPE
 		printf("fpu_emul_fscale: FP%d op FP%d => FP%d\n",
-			format, regnum, regnum);
+		    format, regnum, regnum);
 		/* the operand is an FP reg */
 		printf("fpu_emul_scale: src opr FP%d=%08x%08x%08x\n",
-			format, fpregs[format*3], fpregs[format*3+1],
-			fpregs[format*3+2]);
+		    format, fpregs[format*3], fpregs[format*3+1],
+		    fpregs[format*3+2]);
 #endif
 		fpu_explode(fe, &fe->fe_f2, FTYPE_EXT, &fpregs[format * 3]);
 		fpu_implode(fe, &fe->fe_f2, FTYPE_LNG, buf);
@@ -131,20 +131,20 @@
 			printf("%c%d@+\n", regname, insn->is_ea.ea_regnum & 7);
 		} else if (flags & EA_OFFSET) {
 			printf("%c%d@(%d)\n",
-				regname, insn->is_ea.ea_regnum & 7,
-				insn->is_ea.ea_offset);
+			    regname, insn->is_ea.ea_regnum & 7,
+			    insn->is_ea.ea_offset);
 		} else if (flags & EA_INDEXED) {
 			printf("%c%d@(...)\n",
-				regname, insn->is_ea.ea_regnum & 7);
+			    regname, insn->is_ea.ea_regnum & 7);
 		} else if (flags & EA_ABS) {
 			printf("0x%08x\n", insn->is_ea.ea_absaddr);
 		} else if (flags & EA_PC_REL) {
 			printf("pc@(%d)\n", insn->is_ea.ea_offset);
 		} else if (flags & EA_IMMED) {
 			printf("#0x%08x%08x%08x\n",
-				insn->is_ea.ea_immed[0],
-				insn->is_ea.ea_immed[1],
-				insn->is_ea.ea_immed[2]);
+			    insn->is_ea.ea_immed[0],
+			    insn->is_ea.ea_immed[1],
+			    insn->is_ea.ea_immed[2]);
 		} else {
 			printf("%c%d@\n", regname, insn->is_ea.ea_regnum & 7);
 		}
@@ -153,7 +153,7 @@
 
 #if DEBUG_FPE
 		printf("fpu_emul_fscale: src = %08x%08x%08x, siz = %d\n",
-			buf[0], buf[1], buf[2], insn->is_datasize);
+		    buf[0], buf[1], buf[2], insn->is_datasize);
 #endif
 		if (format == FTYPE_LNG) {
 			/* nothing */
@@ -335,7 +335,7 @@
 
 #if DEBUG_FPE
 	printf("fpu_emul_fscale: FPSR = %08x, FPCR = %08x\n",
-		fe->fe_fpsr, fe->fe_fpcr);
+	    fe->fe_fpsr, fe->fe_fpcr);
 #endif
 
 	return (fpsr & fe->fe_fpcr & FPSR_EXCP) ? SIGFPE : sig;

Index: src/sys/arch/m68k/fpe/fpu_fstore.c
diff -u src/sys/arch/m68k/fpe/fpu_fstore.c:1.12 src/sys/arch/m68k/fpe/fpu_fstore.c:1.13
--- src/sys/arch/m68k/fpe/fpu_fstore.c:1.12	Mon Jul 18 07:44:30 2011
+++ src/sys/arch/m68k/fpe/fpu_fstore.c	Mon Jul 18 14:11:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu_fstore.c,v 1.12 2011/07/18 07:44:30 isaki Exp $	*/
+/*	$NetBSD: fpu_fstore.c,v 1.13 2011/07/18 14:11:27 isaki Exp $	*/
 
 /*
  * Copyright (c) 1995 Ken Nakata
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_fstore.c,v 1.12 2011/07/18 07:44:30 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_fstore.c,v 1.13 2011/07/18 14:11:27 isaki Exp $");
 
 #include <sys/types.h>
 #include <sys/signal.h>
@@ -53,7 +53,7 @@
 
 #if DEBUG_FPE
 	printf("  fpu_emul_fstore: frame at %p fpframe at %p\n",
-		frame, fe->fe_fpframe);
+	    frame, fe->fe_fpframe);
 #endif
 
 	word1 = insn->is_word1;
@@ -83,7 +83,7 @@
 	}
 #if DEBUG_FPE
 	printf("  fpu_emul_fstore: format %d, size %d\n",
-		format, insn->is_datasize);
+	    format, insn->is_datasize);
 #endif
 
 	fe->fe_fpsr &= ~FPSR_EXCP;
@@ -107,19 +107,19 @@
 
 #if DEBUG_FPE
 	printf("  fpu_emul_fstore: saving FP%d (%08x,%08x,%08x)\n",
-		regnum, fpregs[regnum * 3], fpregs[regnum * 3 + 1],
-		fpregs[regnum * 3 + 2]);
+	    regnum, fpregs[regnum * 3], fpregs[regnum * 3 + 1],
+	    fpregs[regnum * 3 + 2]);
 #endif
 	fpu_explode(fe, &fe->fe_f3, FTYPE_EXT, &fpregs[regnum * 3]);
 #if DEBUG_FPE
 	{
 	static const char *class_name[] =
-		{ "SNAN", "QNAN", "ZERO", "NUM", "INF" };
+	    { "SNAN", "QNAN", "ZERO", "NUM", "INF" };
 	printf("  fpu_emul_fstore: fpn (%s,%c,%d,%08x,%08x,%08x)\n",
-		class_name[fe->fe_f3.fp_class + 2],
-		fe->fe_f3.fp_sign ? '-' : '+', fe->fe_f3.fp_exp,
-		fe->fe_f3.fp_mant[0], fe->fe_f3.fp_mant[1],
-		fe->fe_f3.fp_mant[2]);
+	    class_name[fe->fe_f3.fp_class + 2],
+	    fe->fe_f3.fp_sign ? '-' : '+', fe->fe_f3.fp_exp,
+	    fe->fe_f3.fp_mant[0], fe->fe_f3.fp_mant[1],
+	    fe->fe_f3.fp_mant[2]);
 	}
 #endif
 	fpu_implode(fe, &fe->fe_f3, format, buf);
@@ -127,7 +127,7 @@
 	fpu_store_ea(frame, insn, &insn->is_ea, (char *)buf);
 #if DEBUG_FPE
 	printf("  fpu_emul_fstore: %08x,%08x,%08x size %d\n",
-		buf[0], buf[1], buf[2], insn->is_datasize);
+	    buf[0], buf[1], buf[2], insn->is_datasize);
 #endif
 
 	return 0;

Index: src/sys/arch/m68k/fpe/fpu_int.c
diff -u src/sys/arch/m68k/fpe/fpu_int.c:1.9 src/sys/arch/m68k/fpe/fpu_int.c:1.10
--- src/sys/arch/m68k/fpe/fpu_int.c:1.9	Mon Jul 18 07:44:30 2011
+++ src/sys/arch/m68k/fpe/fpu_int.c	Mon Jul 18 14:11:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu_int.c,v 1.9 2011/07/18 07:44:30 isaki Exp $	*/
+/*	$NetBSD: fpu_int.c,v 1.10 2011/07/18 14:11:27 isaki Exp $	*/
 
 /*
  * Copyright (c) 1995 Ken Nakata
@@ -29,7 +29,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_int.c,v 1.9 2011/07/18 07:44:30 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_int.c,v 1.10 2011/07/18 14:11:27 isaki Exp $");
 
 #include <sys/types.h>
 
@@ -115,7 +115,7 @@
 	rsh = 32 - lsh;
 	for (i = 0; i + wsh < 2; i++) {
 		x->fp_mant[i] = (x->fp_mant[i+wsh] << lsh) |
-			(x->fp_mant[i+wsh+1] >> rsh);
+		    (x->fp_mant[i+wsh+1] >> rsh);
 	}
 	x->fp_mant[i] = (x->fp_mant[i+wsh] << lsh);
 	i++;

Index: src/sys/arch/m68k/fpe/fpu_rem.c
diff -u src/sys/arch/m68k/fpe/fpu_rem.c:1.10 src/sys/arch/m68k/fpe/fpu_rem.c:1.11
--- src/sys/arch/m68k/fpe/fpu_rem.c:1.10	Mon Jul 18 07:44:30 2011
+++ src/sys/arch/m68k/fpe/fpu_rem.c	Mon Jul 18 14:11:27 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu_rem.c,v 1.10 2011/07/18 07:44:30 isaki Exp $	*/
+/*	$NetBSD: fpu_rem.c,v 1.11 2011/07/18 14:11:27 isaki Exp $	*/
 
 /*
  * Copyright (c) 1995  Ken Nakata
@@ -32,7 +32,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_rem.c,v 1.10 2011/07/18 07:44:30 isaki Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_rem.c,v 1.11 2011/07/18 14:11:27 isaki Exp $");
 
 #include <sys/types.h>
 #include <sys/signal.h>
@@ -124,12 +124,14 @@
 		/*
 		 * Step 3
 		 */
-		while (y->fp_exp != r->fp_exp || y->fp_mant[0] != r->fp_mant[0] ||
+		while (y->fp_exp != r->fp_exp ||
+		       y->fp_mant[0] != r->fp_mant[0] ||
 		       y->fp_mant[1] != r->fp_mant[1] ||
 		       y->fp_mant[2] != r->fp_mant[2]) {
 
 			/* Step 3.2 */
-			if (y->fp_exp < r->fp_exp || y->fp_mant[0] < r->fp_mant[0] ||
+			if (y->fp_exp < r->fp_exp ||
+			    y->fp_mant[0] < r->fp_mant[0] ||
 			    y->fp_mant[1] < r->fp_mant[1] ||
 			    y->fp_mant[2] < r->fp_mant[2]) {
 				CPYFPN(&fe->fe_f1, r);
@@ -163,14 +165,16 @@
 	/* Step 5.1 */
 	if (r->fp_exp + 1 < y->fp_exp ||
 	    (r->fp_exp + 1 == y->fp_exp &&
-	     (r->fp_mant[0] < y->fp_mant[0] || r->fp_mant[1] < y->fp_mant[1] ||
+	     (r->fp_mant[0] < y->fp_mant[0] ||
+	      r->fp_mant[1] < y->fp_mant[1] ||
 	      r->fp_mant[2] < y->fp_mant[2]))) {
 		/* if r < y/2 */
 		goto Step6;
 	}
 	/* Step 5.2 */
 	if (r->fp_exp + 1 != y->fp_exp ||
-	    r->fp_mant[0] != y->fp_mant[0] || r->fp_mant[1] != y->fp_mant[1] ||
+	    r->fp_mant[0] != y->fp_mant[0] ||
+	    r->fp_mant[1] != y->fp_mant[1] ||
 	    r->fp_mant[2] != y->fp_mant[2]) {
 		/* if (!(r < y/2) && !(r == y/2)) */
 		Last_Subtract = 1;
@@ -204,7 +208,7 @@
 	q |= (signQ << 7);
 	fe->fe_fpframe->fpf_fpsr =
 	fe->fe_fpsr =
-		(fe->fe_fpsr & ~FPSR_QTT) | (q << 16);
+	    (fe->fe_fpsr & ~FPSR_QTT) | (q << 16);
 	return r;
 
  Step9:
@@ -214,7 +218,7 @@
 	q |= (signQ << 7);
 	fe->fe_fpframe->fpf_fpsr =
 	fe->fe_fpsr =
-		(fe->fe_fpsr & ~FPSR_QTT) | (q << 16);
+	    (fe->fe_fpsr & ~FPSR_QTT) | (q << 16);
 	return &fe->fe_f1;
 }
 

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