Module Name: src Committed By: phx Date: Sun Oct 30 21:08:33 UTC 2011
Modified Files: src/sys/arch/sandpoint/stand/altboot: brdsetup.c dsk.c entry.S fxp.c globals.h nvt.c rge.c skg.c stg.c vge.c Log Message: Added in8() and out8() to access a byte with reorder-protection. Use it in all drivers instead of (volatile uint8_t *). To generate a diff of this commit: cvs rdiff -u -r1.18 -r1.19 src/sys/arch/sandpoint/stand/altboot/brdsetup.c cvs rdiff -u -r1.8 -r1.9 src/sys/arch/sandpoint/stand/altboot/dsk.c cvs rdiff -u -r1.4 -r1.5 src/sys/arch/sandpoint/stand/altboot/entry.S cvs rdiff -u -r1.2 -r1.3 src/sys/arch/sandpoint/stand/altboot/fxp.c \ src/sys/arch/sandpoint/stand/altboot/nvt.c \ src/sys/arch/sandpoint/stand/altboot/vge.c cvs rdiff -u -r1.12 -r1.13 src/sys/arch/sandpoint/stand/altboot/globals.h cvs rdiff -u -r1.5 -r1.6 src/sys/arch/sandpoint/stand/altboot/rge.c \ src/sys/arch/sandpoint/stand/altboot/stg.c cvs rdiff -u -r1.3 -r1.4 src/sys/arch/sandpoint/stand/altboot/skg.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/sandpoint/stand/altboot/brdsetup.c diff -u src/sys/arch/sandpoint/stand/altboot/brdsetup.c:1.18 src/sys/arch/sandpoint/stand/altboot/brdsetup.c:1.19 --- src/sys/arch/sandpoint/stand/altboot/brdsetup.c:1.18 Sun May 29 18:06:45 2011 +++ src/sys/arch/sandpoint/stand/altboot/brdsetup.c Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: brdsetup.c,v 1.18 2011/05/29 18:06:45 phx Exp $ */ +/* $NetBSD: brdsetup.c,v 1.19 2011/10/30 21:08:33 phx Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. @@ -172,8 +172,8 @@ unsigned uart2base; /* optional satellit #define LSR_THRE 0x20 #define LSR_DRDY 0x01 #define DCR 0x11 -#define UART_READ(base, r) *(volatile char *)(base + (r)) -#define UART_WRITE(base, r, v) *(volatile char *)(base + (r)) = (v) +#define UART_READ(base, r) in8(base + (r)) +#define UART_WRITE(base, r, v) out8(base + (r), (v)) void brdsetup(void); /* called by entry.S */ Index: src/sys/arch/sandpoint/stand/altboot/dsk.c diff -u src/sys/arch/sandpoint/stand/altboot/dsk.c:1.8 src/sys/arch/sandpoint/stand/altboot/dsk.c:1.9 --- src/sys/arch/sandpoint/stand/altboot/dsk.c:1.8 Sun Jul 17 20:54:46 2011 +++ src/sys/arch/sandpoint/stand/altboot/dsk.c Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: dsk.c,v 1.8 2011/07/17 20:54:46 joerg Exp $ */ +/* $NetBSD: dsk.c,v 1.9 2011/10/30 21:08:33 phx Exp $ */ /*- * Copyright (c) 2010 The NetBSD Foundation, Inc. @@ -56,8 +56,8 @@ */ #define CSR_READ_4(r) in32rb(r) #define CSR_WRITE_4(r,v) out32rb(r,v) -#define CSR_READ_1(r) *(volatile uint8_t *)(r) -#define CSR_WRITE_1(r,v) *(volatile uint8_t *)(r)=(v) +#define CSR_READ_1(r) in8(r) +#define CSR_WRITE_1(r,v) out8(r,v) struct dskdv { char *name; Index: src/sys/arch/sandpoint/stand/altboot/entry.S diff -u src/sys/arch/sandpoint/stand/altboot/entry.S:1.4 src/sys/arch/sandpoint/stand/altboot/entry.S:1.5 --- src/sys/arch/sandpoint/stand/altboot/entry.S:1.4 Sun Oct 30 20:42:09 2011 +++ src/sys/arch/sandpoint/stand/altboot/entry.S Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: entry.S,v 1.4 2011/10/30 20:42:09 phx Exp $ */ +/* $NetBSD: entry.S,v 1.5 2011/10/30 21:08:33 phx Exp $ */ #include <powerpc/psl.h> #include <powerpc/spr.h> @@ -207,6 +207,20 @@ syncicache: .globl newaltboot_end newaltboot_end: + +/* 8-bit i/o access */ + .globl out8 +out8: + stb 4,0(3) + eieio + blr + + .globl in8 +in8: + lbz 3,0(3) + eieio + blr + /* * reverse endian access to mimic outw/outl/inw/inl */ Index: src/sys/arch/sandpoint/stand/altboot/fxp.c diff -u src/sys/arch/sandpoint/stand/altboot/fxp.c:1.2 src/sys/arch/sandpoint/stand/altboot/fxp.c:1.3 --- src/sys/arch/sandpoint/stand/altboot/fxp.c:1.2 Thu Jan 27 17:38:04 2011 +++ src/sys/arch/sandpoint/stand/altboot/fxp.c Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: fxp.c,v 1.2 2011/01/27 17:38:04 phx Exp $ */ +/* $NetBSD: fxp.c,v 1.3 2011/10/30 21:08:33 phx Exp $ */ /* * most of the following code was imported from dev/ic/i82557.c; the @@ -86,8 +86,8 @@ * - no vtophys() translation, vaddr_t == paddr_t. * - PIPT writeback cache aware. */ -#define CSR_WRITE_1(l, r, v) *(volatile uint8_t *)((l)->iobase+(r)) = (v) -#define CSR_READ_1(l, r) *(volatile uint8_t *)((l)->iobase+(r)) +#define CSR_WRITE_1(l, r, v) out8((l)->iobase+(r), (v)) +#define CSR_READ_1(l, r) in8((l)->iobase+(r)) #define CSR_WRITE_2(l, r, v) out16rb((l)->iobase+(r), (v)) #define CSR_READ_2(l, r) in16rb((l)->iobase+(r)) #define CSR_WRITE_4(l, r, v) out32rb((l)->iobase+(r), (v)) Index: src/sys/arch/sandpoint/stand/altboot/nvt.c diff -u src/sys/arch/sandpoint/stand/altboot/nvt.c:1.2 src/sys/arch/sandpoint/stand/altboot/nvt.c:1.3 --- src/sys/arch/sandpoint/stand/altboot/nvt.c:1.2 Thu Jan 27 17:38:04 2011 +++ src/sys/arch/sandpoint/stand/altboot/nvt.c Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: nvt.c,v 1.2 2011/01/27 17:38:04 phx Exp $ */ +/* $NetBSD: nvt.c,v 1.3 2011/10/30 21:08:33 phx Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. @@ -44,8 +44,8 @@ * - no vtophys() translation, vaddr_t == paddr_t. * - PIPT writeback cache aware. */ -#define CSR_WRITE_1(l, r, v) *(volatile uint8_t *)((l)->csr+(r)) = (v) -#define CSR_READ_1(l, r) *(volatile uint8_t *)((l)->csr+(r)) +#define CSR_WRITE_1(l, r, v) out8((l)->csr+(r), (v)) +#define CSR_READ_1(l, r) in8((l)->csr+(r)) #define CSR_WRITE_2(l, r, v) out16rb((l)->csr+(r), (v)) #define CSR_READ_2(l, r) in16rb((l)->csr+(r)) #define CSR_WRITE_4(l, r, v) out32rb((l)->csr+(r), (v)) Index: src/sys/arch/sandpoint/stand/altboot/vge.c diff -u src/sys/arch/sandpoint/stand/altboot/vge.c:1.2 src/sys/arch/sandpoint/stand/altboot/vge.c:1.3 --- src/sys/arch/sandpoint/stand/altboot/vge.c:1.2 Thu Jan 27 17:38:04 2011 +++ src/sys/arch/sandpoint/stand/altboot/vge.c Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: vge.c,v 1.2 2011/01/27 17:38:04 phx Exp $ */ +/* $NetBSD: vge.c,v 1.3 2011/10/30 21:08:33 phx Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. @@ -44,8 +44,8 @@ * - no vtophys() translation, vaddr_t == paddr_t. * - PIPT writeback cache aware. */ -#define CSR_WRITE_1(l, r, v) *(volatile uint8_t *)((l)->csr+(r)) = (v) -#define CSR_READ_1(l, r) *(volatile uint8_t *)((l)->csr+(r)) +#define CSR_WRITE_1(l, r, v) out8((l)->csr+(r), (v)) +#define CSR_READ_1(l, r) in8((l)->csr+(r)) #define CSR_WRITE_2(l, r, v) out16rb((l)->csr+(r), (v)) #define CSR_READ_2(l, r) in16rb((l)->csr+(r)) #define CSR_WRITE_4(l, r, v) out32rb((l)->csr+(r), (v)) Index: src/sys/arch/sandpoint/stand/altboot/globals.h diff -u src/sys/arch/sandpoint/stand/altboot/globals.h:1.12 src/sys/arch/sandpoint/stand/altboot/globals.h:1.13 --- src/sys/arch/sandpoint/stand/altboot/globals.h:1.12 Sat Mar 26 17:55:05 2011 +++ src/sys/arch/sandpoint/stand/altboot/globals.h Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: globals.h,v 1.12 2011/03/26 17:55:05 phx Exp $ */ +/* $NetBSD: globals.h,v 1.13 2011/10/30 21:08:33 phx Exp $ */ #ifdef DEBUG #define DPRINTF(x) printf x @@ -49,7 +49,9 @@ void read_mac_from_flash(uint8_t *); /* PPC processor ctl */ void __syncicache(void *, size_t); -/* byte swap access */ +/* i/o access */ +void out8(unsigned, unsigned); +unsigned in8(unsigned); void out16rb(unsigned, unsigned); void out32rb(unsigned, unsigned); unsigned in16rb(unsigned); Index: src/sys/arch/sandpoint/stand/altboot/rge.c diff -u src/sys/arch/sandpoint/stand/altboot/rge.c:1.5 src/sys/arch/sandpoint/stand/altboot/rge.c:1.6 --- src/sys/arch/sandpoint/stand/altboot/rge.c:1.5 Fri Apr 29 22:21:36 2011 +++ src/sys/arch/sandpoint/stand/altboot/rge.c Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: rge.c,v 1.5 2011/04/29 22:21:36 phx Exp $ */ +/* $NetBSD: rge.c,v 1.6 2011/10/30 21:08:33 phx Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. @@ -44,8 +44,8 @@ * - no vtophys() translation, vaddr_t == paddr_t. * - PIPT writeback cache aware. */ -#define CSR_WRITE_1(l, r, v) *(volatile uint8_t *)((l)->csr+(r)) = (v) -#define CSR_READ_1(l, r) *(volatile uint8_t *)((l)->csr+(r)) +#define CSR_WRITE_1(l, r, v) out8((l)->csr+(r), (v)) +#define CSR_READ_1(l, r) in8((l)->csr+(r)) #define CSR_WRITE_2(l, r, v) out16rb((l)->csr+(r), (v)) #define CSR_READ_2(l, r) in16rb((l)->csr+(r)) #define CSR_WRITE_4(l, r, v) out32rb((l)->csr+(r), (v)) Index: src/sys/arch/sandpoint/stand/altboot/stg.c diff -u src/sys/arch/sandpoint/stand/altboot/stg.c:1.5 src/sys/arch/sandpoint/stand/altboot/stg.c:1.6 --- src/sys/arch/sandpoint/stand/altboot/stg.c:1.5 Sat Mar 12 16:41:23 2011 +++ src/sys/arch/sandpoint/stand/altboot/stg.c Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: stg.c,v 1.5 2011/03/12 16:41:23 phx Exp $ */ +/* $NetBSD: stg.c,v 1.6 2011/10/30 21:08:33 phx Exp $ */ /*- * Copyright (c) 2011 Frank Wille. @@ -38,8 +38,8 @@ #include "globals.h" -#define CSR_WRITE_1(l, r, v) *(volatile uint8_t *)((l)->csr+(r)) = (v) -#define CSR_READ_1(l, r) *(volatile uint8_t *)((l)->csr+(r)) +#define CSR_WRITE_1(l, r, v) out8((l)->csr+(r), (v)) +#define CSR_READ_1(l, r) in8((l)->csr+(r)) #define CSR_WRITE_2(l, r, v) out16rb((l)->csr+(r), (v)) #define CSR_READ_2(l, r) in16rb((l)->csr+(r)) #define CSR_WRITE_4(l, r, v) out32rb((l)->csr+(r), (v)) Index: src/sys/arch/sandpoint/stand/altboot/skg.c diff -u src/sys/arch/sandpoint/stand/altboot/skg.c:1.3 src/sys/arch/sandpoint/stand/altboot/skg.c:1.4 --- src/sys/arch/sandpoint/stand/altboot/skg.c:1.3 Sun May 29 18:06:45 2011 +++ src/sys/arch/sandpoint/stand/altboot/skg.c Sun Oct 30 21:08:33 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: skg.c,v 1.3 2011/05/29 18:06:45 phx Exp $ */ +/* $NetBSD: skg.c,v 1.4 2011/10/30 21:08:33 phx Exp $ */ /*- * Copyright (c) 2010 Frank Wille. @@ -43,8 +43,8 @@ * - no vtophys() translation, vaddr_t == paddr_t. * - PIPT writeback cache aware. */ -#define CSR_WRITE_1(l, r, v) *(volatile uint8_t *)((l)->csr+(r)) = (v) -#define CSR_READ_1(l, r) *(volatile uint8_t *)((l)->csr+(r)) +#define CSR_WRITE_1(l, r, v) out8((l)->csr+(r), (v)) +#define CSR_READ_1(l, r) in8((l)->csr+(r)) #define CSR_WRITE_2(l, r, v) out16rb((l)->csr+(r), (v)) #define CSR_READ_2(l, r) in16rb((l)->csr+(r)) #define CSR_WRITE_4(l, r, v) out32rb((l)->csr+(r), (v))