Module Name: src
Committed By: aymeric
Date: Fri Nov 4 17:20:54 UTC 2011
Modified Files:
src/sys/arch/arm/at91: at91bus.c at91pmcreg.h files.at91
Added Files:
src/sys/arch/arm/at91: at91sam9260bus.c at91sam9260busvar.h
at91sam9260reg.h
Log Message:
add preliminary support for AT91SAM9260
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/at91/at91bus.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/at91/at91pmcreg.h \
src/sys/arch/arm/at91/files.at91
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/at91/at91sam9260bus.c \
src/sys/arch/arm/at91/at91sam9260busvar.h \
src/sys/arch/arm/at91/at91sam9260reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/at91/at91bus.c
diff -u src/sys/arch/arm/at91/at91bus.c:1.11 src/sys/arch/arm/at91/at91bus.c:1.12
--- src/sys/arch/arm/at91/at91bus.c:1.11 Fri Jul 1 19:31:16 2011
+++ src/sys/arch/arm/at91/at91bus.c Fri Nov 4 17:20:54 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: at91bus.c,v 1.11 2011/07/01 19:31:16 dyoung Exp $ */
+/* $NetBSD: at91bus.c,v 1.12 2011/11/04 17:20:54 aymeric Exp $ */
/*
* Copyright (c) 2007 Embedtronics Oy
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: at91bus.c,v 1.11 2011/07/01 19:31:16 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: at91bus.c,v 1.12 2011/11/04 17:20:54 aymeric Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -149,7 +149,8 @@ static int at91bus_submatch(device_t, cf
const int *, void *);
-CFATTACH_DECL(at91bus, sizeof(struct at91bus_softc), at91bus_match, at91bus_attach, NULL, NULL);
+CFATTACH_DECL_NEW(at91bus, sizeof(struct at91bus_softc),
+ at91bus_match, at91bus_attach, NULL, NULL);
struct at91bus_clocks at91bus_clocks = {0};
struct at91bus_softc *at91bus_sc = NULL;
@@ -160,6 +161,10 @@ struct at91bus_softc *at91bus_sc = NULL;
#include <arm/at91/at91rm9200busvar.h>
#endif
+#ifdef AT91SAM9260
+#include <arm/at91/at91sam9260busvar.h>
+#endif
+
#ifdef AT91SAM9261
#include <arm/at91/at91sam9261busvar.h>
#endif
@@ -179,6 +184,9 @@ static const struct {
{
DBGU_CIDR_AT91SAM9260,
"AT91SAM9260"
+#ifdef AT91SAM9260
+ , &at91sam9260bus
+#endif
},
{
DBGU_CIDR_AT91SAM9260,
@@ -188,7 +196,7 @@ static const struct {
#endif
},
{
- DBGU_CIDR_AT91SAM9260,
+ DBGU_CIDR_AT91SAM9263,
"AT91SAM9263"
},
{
@@ -592,7 +600,7 @@ at91bus_found(device_t self, bus_addr_t
locs[AT91BUSCF_ADDR] = addr;
locs[AT91BUSCF_PID] = pid;
- sc = (struct at91bus_softc*) self;
+ sc = device_private(self);
sa.sa_iot = sc->sc_iot;
sa.sa_dmat = sc->sc_dmat;
sa.sa_addr = addr;
@@ -611,7 +619,7 @@ at91bus_attach(device_t parent, device_t
if (at91_chip_ndx < 0)
panic("%s: at91bus_init() has not been called!", __FUNCTION__);
- sc = (struct at91bus_softc*) self;
+ sc = device_private(self);
/* initialize bus space and bus dma things... */
sc->sc_iot = &at91_bs_tag;
Index: src/sys/arch/arm/at91/at91pmcreg.h
diff -u src/sys/arch/arm/at91/at91pmcreg.h:1.2 src/sys/arch/arm/at91/at91pmcreg.h:1.3
--- src/sys/arch/arm/at91/at91pmcreg.h:1.2 Thu Jul 3 01:15:38 2008
+++ src/sys/arch/arm/at91/at91pmcreg.h Fri Nov 4 17:20:54 2011
@@ -1,4 +1,4 @@
-/* $Id: at91pmcreg.h,v 1.2 2008/07/03 01:15:38 matt Exp $ */
+/* $Id: at91pmcreg.h,v 1.3 2011/11/04 17:20:54 aymeric Exp $ */
#ifndef _AT91PMCREG_H_
#define _AT91PMCREG_H_ 1
@@ -24,12 +24,15 @@
#define PMC_IDR 0x64U /* 64: Interrupt Disable Reg */
#define PMC_SR 0x68U /* 68: Status Register */
#define PMC_IMR 0x6CU /* 6C: Interrupt Mask Reg */
+#define PMC_PLLICPR 0x80U /* 80: PLL Charge Pump Current Reg */
/* System Clock Enable Register bits: */
#define PMC_SCSR_PCK3 0x0800U
#define PMC_SCSR_PCK2 0x0400U
#define PMC_SCSR_PCK1 0x0200U
#define PMC_SCSR_PCK0 0x0100U
+#define PMC_SCSR_SAM_UDP 0x0080U
+#define PMC_SCSR_SAM_UHP 0x0040U
#define PMC_SCSR_UHP 0x0010U /* 1 = Enable USB Host Port clks */
#define PMC_SCSR_MCKUDP 0x0004U /* 1 = enable Master Clock dis */
#define PMC_SCSR_UDP 0x0002U /* 1 = enable USB Device Port clk */
@@ -113,6 +116,10 @@
#define PMC_SR_LOCKA 0x0002U
#define PMC_SR_MOSCS 0x0001U
+/* PLL Charge Pump Current Reg bits: */
+#define PMC_PLLICPR_ICPPLLA 0x00000001U
+#define PMC_PLLICPR_ICPPLLB 0x00010000U
+
#define PMCREG(offset) *((volatile uint32_t*)(0xfffffc00UL + (offset)))
#endif /* !_AT91PMCREG_H_ */
Index: src/sys/arch/arm/at91/files.at91
diff -u src/sys/arch/arm/at91/files.at91:1.2 src/sys/arch/arm/at91/files.at91:1.3
--- src/sys/arch/arm/at91/files.at91:1.2 Thu Jul 3 01:15:39 2008
+++ src/sys/arch/arm/at91/files.at91 Fri Nov 4 17:20:54 2011
@@ -1,9 +1,10 @@
-# $Id: files.at91,v 1.2 2008/07/03 01:15:39 matt Exp $
+# $Id: files.at91,v 1.3 2011/11/04 17:20:54 aymeric Exp $
#
# Configuration info for AT91 based CPUs
#
defflag opt_at91types.h AT91RM9200
+defflag opt_at91types.h AT91SAM9260
defflag opt_at91types.h AT91SAM9261
file arch/arm/arm32/irq_dispatch.S
@@ -22,6 +23,7 @@ file arch/arm/at91/at91bus.c at91bus ne
# chips:
file arch/arm/at91/at91rm9200bus.c at91rm9200
+file arch/arm/at91/at91sam9260bus.c at91sam9260
file arch/arm/at91/at91sam9261bus.c at91sam9261
# AT91 Advanced Interrupt controller:
@@ -45,7 +47,7 @@ attach at91tctmr at at91bus
file arch/arm/at91/at91tctmr.c at91tctmr needs-flag
# AT91 Power Management Controller
-file arch/arm/at91/at91pmc.c at91rm9200 | at91sam9261
+file arch/arm/at91/at91pmc.c at91rm9200 | at91sam9260 | at91sam9261
# AT91 serial port
device at91usart: tty
Added files:
Index: src/sys/arch/arm/at91/at91sam9260bus.c
diff -u /dev/null src/sys/arch/arm/at91/at91sam9260bus.c:1.1
--- /dev/null Fri Nov 4 17:20:54 2011
+++ src/sys/arch/arm/at91/at91sam9260bus.c Fri Nov 4 17:20:54 2011
@@ -0,0 +1,161 @@
+/* $NetBSD: at91sam9260bus.c,v 1.1 2011/11/04 17:20:54 aymeric Exp $ */
+/*
+ * Copied from at91sam9261bus.c
+ * Adaptation to AT91SAM9260 by Aymeric Vincent is in the public domain.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: at91sam9260bus.c,v 1.1 2011/11/04 17:20:54 aymeric Exp $");
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/time.h>
+#include <sys/device.h>
+#include <uvm/uvm_extern.h>
+
+#include <arm/at91/at91sam9260busvar.h>
+
+const struct at91bus_machdep at91sam9260bus = {
+ at91sam9260bus_init,
+ at91sam9260bus_attach_cn,
+ at91sam9260bus_devmap,
+
+ /* clocking support: */
+ at91sam9260bus_peripheral_clock,
+
+ /* PIO support: */
+ at91sam9260bus_pio_port,
+ at91sam9260bus_gpio_mask,
+
+ /* interrupt handling support: */
+ at91sam9260bus_intr_init,
+ at91sam9260bus_intr_establish,
+ at91sam9260bus_intr_disestablish,
+ at91sam9260bus_intr_poll,
+ at91sam9260bus_intr_dispatch,
+
+ /* configuration */
+ at91sam9260bus_peripheral_name,
+ at91sam9260bus_search_peripherals
+};
+
+void at91sam9260bus_init(struct at91bus_clocks *clocks) {
+ pmap_devmap_register(at91_devmap());
+ at91pmc_get_clocks(clocks);
+}
+
+const struct pmap_devmap *at91sam9260bus_devmap(void) {
+ static const struct pmap_devmap devmap[] = {
+ {
+ AT91SAM9260_APB_VBASE,
+ AT91SAM9260_APB_HWBASE,
+ AT91SAM9260_APB_SIZE,
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE
+ },
+
+ {
+ 0, 0, 0, 0, 0
+ }
+ };
+
+ return devmap;
+}
+
+void at91sam9260bus_peripheral_clock(int pid, int enable) {
+ switch (pid) {
+ case PID_UHP:
+ if (enable)
+ PMCREG(PMC_SCER) = PMC_SCSR_SAM_UHP;
+ else
+ PMCREG(PMC_SCDR) = PMC_SCSR_SAM_UHP;
+ break;
+ }
+ at91pmc_peripheral_clock(pid, enable);
+}
+
+at91pio_port at91sam9260bus_pio_port(int pid) {
+ switch (pid) {
+ case PID_PIOA: return AT91_PIOA;
+ case PID_PIOB: return AT91_PIOB;
+ case PID_PIOC: return AT91_PIOC;
+ default: panic("%s: pid %d not valid", __FUNCTION__, pid);
+ }
+
+}
+
+uint32_t at91sam9260bus_gpio_mask(int pid) {
+ return 0xFFFFFFFFUL;
+}
+
+const char *at91sam9260bus_peripheral_name(int pid) {
+ switch (pid) {
+ case PID_FIQ: return "FIQ";
+ case PID_SYSIRQ:return "SYS";
+ case PID_PIOA: return "PIOA";
+ case PID_PIOB: return "PIOB";
+ case PID_PIOC: return "PIOC";
+ case PID_US0: return "USART0";
+ case PID_US1: return "USART1";
+ case PID_US2: return "USART2";
+ case PID_MCI: return "MCI";
+ case PID_UDP: return "UDP";
+ case PID_TWI: return "TWI";
+ case PID_SPI0: return "SPI0";
+ case PID_SPI1: return "SPI1";
+ case PID_SSC: return "SSC";
+ case PID_TC0: return "TC0";
+ case PID_TC1: return "TC1";
+ case PID_TC2: return "TC2";
+ case PID_UHP: return "UHP";
+ case PID_EMAC: return "EMAC";
+ case PID_US3: return "USART3";
+ case PID_US4: return "USART4";
+ case PID_US5: return "USART5";
+ case PID_TC3: return "TC3";
+ case PID_TC4: return "TC4";
+ case PID_TC5: return "TC5";
+ case PID_IRQ0: return "IRQ0";
+ case PID_IRQ1: return "IRQ1";
+ case PID_IRQ2: return "IRQ2";
+ default: panic("%s: invalid pid %d", __FUNCTION__, pid);
+ }
+}
+
+void at91sam9260bus_search_peripherals(device_t self,
+ device_t found_func(device_t, bus_addr_t, int)) {
+ static const struct {
+ bus_addr_t addr;
+ int pid;
+ } table[] = {
+ {AT91SAM9260_PMC_BASE, -1},
+ {AT91SAM9260_AIC_BASE, -1},
+ {AT91SAM9260_PIT_BASE, PID_SYSIRQ},
+ {AT91SAM9260_TC0_BASE, PID_TC0},
+ {AT91SAM9260_TC1_BASE, PID_TC1},
+ {AT91SAM9260_TC2_BASE, PID_TC2},
+ {AT91SAM9260_DBGU_BASE, PID_SYSIRQ},
+ {AT91SAM9260_PIOA_BASE, PID_PIOA},
+ {AT91SAM9260_PIOB_BASE, PID_PIOB},
+ {AT91SAM9260_PIOC_BASE, PID_PIOC},
+ {AT91SAM9260_USART0_BASE, PID_US0},
+ {AT91SAM9260_USART1_BASE, PID_US1},
+ {AT91SAM9260_USART2_BASE, PID_US2},
+ {AT91SAM9260_SSC_BASE, PID_SSC},
+// {AT91SAM9260_EMAC_BASE, PID_EMAC},
+ {AT91SAM9260_TWI_BASE, PID_TWI},
+ {AT91SAM9260_SPI0_BASE, PID_SPI0},
+ {AT91SAM9260_SPI1_BASE, PID_SPI1},
+ {AT91SAM9260_UHP_BASE, PID_UHP},
+ {AT91SAM9260_UDP_BASE, PID_UDP},
+ {AT91SAM9260_MCI_BASE, PID_MCI},
+ {0, 0}
+ };
+ int i;
+
+ for (i = 0; table[i].addr; i++)
+ found_func(self, table[i].addr, table[i].pid);
+}
+
Index: src/sys/arch/arm/at91/at91sam9260busvar.h
diff -u /dev/null src/sys/arch/arm/at91/at91sam9260busvar.h:1.1
--- /dev/null Fri Nov 4 17:20:54 2011
+++ src/sys/arch/arm/at91/at91sam9260busvar.h Fri Nov 4 17:20:54 2011
@@ -0,0 +1,62 @@
+/* $NetBSD: at91sam9260busvar.h,v 1.1 2011/11/04 17:20:54 aymeric Exp $ */
+
+/*
+ * Copyright (c) 2007 Embedtronics Oy
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* Adaptation to AT91SAM9260 by Aymeric Vincent is in the public domain */
+
+#ifndef _AT91SAM9260BUSVAR_H_
+#define _AT91SAM9260BUSVAR_H_
+
+#include <arm/at91/at91busvar.h>
+#include <arm/at91/at91pmcvar.h>
+#include <arm/at91/at91aicvar.h>
+#include <arm/at91/at91dbguvar.h>
+#include <arm/at91/at91sam9260reg.h>
+
+#include "at91dbgu.h"
+
+void at91sam9260bus_init(struct at91bus_clocks *);
+#if NAT91DBGU > 0
+#define at91sam9260bus_attach_cn at91dbgu_attach_cn
+#else
+void at91sam9260bus_attach_cn(bus_space_tag_t iot, int ospeed, int cflag);
+#endif
+const struct pmap_devmap *at91sam9260bus_devmap(void);
+void at91sam9260bus_peripheral_clock(int pid, int enable);
+at91pio_port at91sam9260bus_pio_port(int pid);
+uint32_t at91sam9260bus_gpio_mask(int pid);
+#define at91sam9260bus_intr_init at91aic_init
+#define at91sam9260bus_intr_establish at91aic_intr_establish
+#define at91sam9260bus_intr_disestablish at91aic_intr_disestablish
+#define at91sam9260bus_intr_poll at91aic_intr_poll
+#define at91sam9260bus_intr_dispatch at91aic_intr_dispatch
+const char *at91sam9260bus_peripheral_name(int pid);
+void at91sam9260bus_search_peripherals(device_t self,
+ device_t (*found_func)(device_t, bus_addr_t, int));
+
+extern const struct at91bus_machdep at91sam9260bus;
+
+#endif // _AT91SAM9260BUSVAR_H_
Index: src/sys/arch/arm/at91/at91sam9260reg.h
diff -u /dev/null src/sys/arch/arm/at91/at91sam9260reg.h:1.1
--- /dev/null Fri Nov 4 17:20:54 2011
+++ src/sys/arch/arm/at91/at91sam9260reg.h Fri Nov 4 17:20:54 2011
@@ -0,0 +1,280 @@
+/* $NetBSD: at91sam9260reg.h,v 1.1 2011/11/04 17:20:54 aymeric Exp $ */
+
+/*
+ * Copyright (c) 2007 Embedtronics Oy
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* Adaptation to AT91SAM9260 by Aymeric Vincent is in the public domain */
+
+#ifndef _AT91SAM9260REG_H_
+#define _AT91SAM9260REG_H_
+
+#include <arm/at91/at91reg.h>
+
+/*
+ * Physical memory map for the AT91SAM9260
+ */
+
+/*
+ * ffff ffff ---------------------------
+ * System Controller
+ * ffff c000 ---------------------------
+ * Peripherals
+ * fffa 0000 ---------------------------
+ * (not used)
+ * 9000 0000 ---------------------------
+ * EBI Chip Select 7
+ * 8000 0000 ---------------------------
+ * EBI Chip Select 6 / CF logic
+ * 7000 0000 ---------------------------
+ * EBI Chip Select 5 / CF logic
+ * 6000 0000 ---------------------------
+ * EBI Chip Select 4 / CF logic
+ * 5000 0000 ---------------------------
+ * EBI Chip Select 3 / NANDFlash
+ * 4000 0000 ---------------------------
+ * EBI Chip Select 2
+ * 3000 0000 ---------------------------
+ * EBI Chip Select 1 / SDRAM
+ * 2000 0000 ---------------------------
+ * EBI Chip Select 0 / BFC
+ * 1000 0000 ---------------------------
+ * Reserved
+ * 0070 0000 ---------------------------
+ * LCD User Interface
+ * 0060 0000 ---------------------------
+ * UHP User Interface
+ * 0050 0000 ---------------------------
+ * Reserved
+ * 0040 0000 ---------------------------
+ * SRAM
+ * 0030 0000 ---------------------------
+ * DTCM
+ * 0020 0000 ---------------------------
+ * ITCM
+ * 0010 0000 ---------------------------
+ * Boot memory
+ * 0000 0000 ---------------------------
+ */
+
+
+/*
+ * Virtual memory map for the AT91SAM9260 integrated devices
+ *
+ * Some device registers are statically mapped on upper address region.
+ * because we have to access them before bus_space is initialized.
+ * Most devices are dynamicaly mapped by bus_space_map(). In this case,
+ * the actual mapped (virtual) address are not cared by device drivers.
+ */
+
+/*
+ * FFFF FFFF ---------------------------
+ * APB bus (1 MB)
+ * FFF0 0000 ---------------------------
+ * (not used)
+ * E000 0000 ---------------------------
+ * Kernel text and data
+ * C000 0000 ---------------------------
+ * (not used)
+ * 0000 0000 ---------------------------
+ *
+ */
+
+#define AT91SAM9260_BOOTMEM_BASE 0x00000000U
+#define AT91SAM9260_BOOTMEM_SIZE 0x00100000U
+
+#define AT91SAM9260_ROM_BASE 0x00100000U
+#define AT91SAM9260_ROM_SIZE 0x00008000U
+
+#define AT91SAM9260_SRAM0_BASE 0x00200000U
+#define AT91SAM9260_SRAM0_SIZE 0x00001000U
+
+#define AT91SAM9260_SRAM1_BASE 0x00300000U
+#define AT91SAM9260_SRAM1_SIZE 0x00001000U
+
+#define AT91SAM9260_UHP_BASE 0x00500000U
+#define AT91SAM9260_UHP_SIZE 0x00004000U
+
+#define AT91SAM9260_CS0_BASE 0x10000000U
+#define AT91SAM9260_CS0_SIZE 0x10000000U
+
+#define AT91SAM9260_CS1_BASE 0x20000000U
+#define AT91SAM9260_CS1_SIZE 0x10000000U
+
+#define AT91SAM9260_SDRAM_BASE AT91SAM9260_CS1_BASE
+
+#define AT91SAM9260_CS2_BASE 0x30000000U
+#define AT91SAM9260_CS2_SIZE 0x10000000U
+
+#define AT91SAM9260_CS3_BASE 0x40000000U
+#define AT91SAM9260_CS3_SIZE 0x10000000U
+
+#define AT91SAM9260_CS4_BASE 0x50000000U
+#define AT91SAM9260_CS4_SIZE 0x10000000U
+
+#define AT91SAM9260_CS5_BASE 0x60000000U
+#define AT91SAM9260_CS5_SIZE 0x10000000U
+
+#define AT91SAM9260_CS6_BASE 0x70000000U
+#define AT91SAM9260_CS6_SIZE 0x10000000U
+
+#define AT91SAM9260_CS7_BASE 0x80000000U
+#define AT91SAM9260_CS7_SIZE 0x10000000U
+
+/* Virtual address for I/O space */
+#define AT91SAM9260_APB_VBASE 0xfff00000U
+#define AT91SAM9260_APB_HWBASE 0xfff00000U
+#define AT91SAM9260_APB_SIZE 0x00100000U
+
+/* Peripherals: */
+#include <arm/at91/at91pdcreg.h>
+
+#define AT91SAM9260_TC0_BASE 0xFFFA0000U
+#define AT91SAM9260_TC1_BASE 0xFFFA0040U
+#define AT91SAM9260_TC2_BASE 0xFFFA0080U
+#define AT91SAM9260_TCB012_BASE 0xFFFA00C0U
+#define AT91SAM9260_TC_SIZE 0x4000U
+//#include <arm/at91/at91tcreg.h>
+
+#define AT91SAM9260_UDP_BASE 0xFFFA4000U
+#define AT91SAM9260_UDP_SIZE 0x4000U
+//#include <arm/at91/at91udpreg.h>
+
+#define AT91SAM9260_MCI_BASE 0xFFFA8000U
+
+#define AT91SAM9260_TWI_BASE 0xFFFAC000U
+#include <arm/at91/at91twireg.h>
+
+#define AT91SAM9260_USART0_BASE 0xFFFB0000U
+#define AT91SAM9260_USART1_BASE 0xFFFB4000U
+#define AT91SAM9260_USART2_BASE 0xFFFB8000U
+#define AT91SAM9260_USART_SIZE 0x4000U
+#include <arm/at91/at91usartreg.h>
+
+#define AT91SAM9260_SSC_BASE 0xFFFBC000U
+#define AT91SAM9260_SSC_SIZE 0x4000U
+//#include <arm/at91/at91sscreg.h>
+
+#define AT91SAM9260_EMAC_BASE 0xFFFC4000U
+#define AT91SAM9260_EMAC_SIZE 0x4000U
+#include <arm/at91/at91emacreg.h>
+
+#define AT91SAM9260_SPI0_BASE 0xFFFC8000U
+#define AT91SAM9260_SPI1_BASE 0xFFFCC000U
+#define AT91SAM9260_SPI_SIZE 0x4000U
+#include <arm/at91/at91spireg.h>
+
+/* system controller: */
+#define AT91SAM9260_SDRAMC_BASE 0xFFFFEA00U
+#define AT91SAM9260_SDRAMC_SIZE 0x200U
+
+#define AT91SAM9260_SMC_BASE 0xFFFFEC00U
+#define AT91SAM9260_SMC_SIZE 0x200U
+
+#define AT91SAM9260_MATRIX_BASE 0xFFFFEE00U
+#define AT91SAM9216_MATRIX_SIZE 0x200U
+
+#define AT91SAM9260_AIC_BASE 0xFFFFF000U
+#define AT91SAM9260_AIC_SIZE 0x200U
+#include <arm/at91/at91aicreg.h>
+
+#define AT91SAM9260_DBGU_BASE 0xFFFFF200U
+#define AT91SAM9260_DBGU_SIZE 0x200U
+#include <arm/at91/at91dbgureg.h>
+
+#define AT91SAM9260_PIOA_BASE 0xFFFFF400U
+#define AT91SAM9260_PIOB_BASE 0xFFFFF600U
+#define AT91SAM9260_PIOC_BASE 0xFFFFF800U
+#define AT91SAM9260_PIO_SIZE 0x200U
+#define AT91_PIO_SIZE AT91SAM9260_PIO_SIZE // for generic AT91 code
+#include <arm/at91/at91pioreg.h>
+
+#define PIOA_READ(_reg) *((volatile uint32_t *)(AT91SAM9260_PIOA_BASE + (_reg)))
+#define PIOA_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9260_PIOA_BASE + (_reg))) = (_val);} while (0)
+#define PIOB_READ(_reg) *((volatile uint32_t *)(AT91SAM9260_PIOB_BASE + (_reg)))
+#define PIOB_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9260_PIOB_BASE + (_reg))) = (_val);} while (0)
+#define PIOC_READ(_reg) *((volatile uint32_t *)(AT91SAM9260_PIOC_BASE + (_reg)))
+#define PIOC_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9260_PIOC_BASE + (_reg))) = (_val);} while (0)
+
+#define AT91SAM9260_PMC_BASE 0xFFFFFC00U
+#define AT91SAM9260_PMC_SIZE 0x100U
+#include <arm/at91/at91pmcreg.h>
+
+#define AT91SAM9260_RSTC_BASE 0xFFFFFD00U
+#define AT91SAM9260_RSTC_SIZE 0x10U
+
+#define AT91SAM9260_SHDWC_BASE 0xFFFFFD10U
+#define AT91SAM9260_SHDWC_SIZE 0x10U
+
+#define AT91SAM9260_RTT_BASE 0xFFFFFD20U
+#define AT91SAM9260_RTT_SIZE 0x10U
+
+#define AT91SAM9260_PIT_BASE 0xFFFFFD30U
+#define AT91SAM9260_PIT_SIZE 0x10U
+
+#define AT91SAM9260_WDT_BASE 0xFFFFFD40U
+#define AT91SAM9260_WDT_SIZE 0x10U
+
+#define AT91SAM9260_GPBR_BASE 0xFFFFFD50U
+#define AT91SAM9260_GPBR_SIZE 0x10U
+
+
+// peripheral identifiers:
+/* peripheral identifiers: */
+enum {
+ PID_FIQ = 0, /* 0 */
+ PID_SYSIRQ, /* 1 */
+ PID_PIOA, /* 2 */
+ PID_PIOB, /* 3 */
+ PID_PIOC, /* 4 */
+ PID_ADC, /* 5 */
+ PID_US0, /* 6 */
+ PID_US1, /* 7 */
+ PID_US2, /* 8 */
+ PID_MCI, /* 9 */
+ PID_UDP, /* 10 */
+ PID_TWI, /* 11 */
+ PID_SPI0, /* 12 */
+ PID_SPI1, /* 13 */
+ PID_SSC, /* 14 */
+
+
+ PID_TC0 = 17, /* 17 */
+ PID_TC1, /* 18 */
+ PID_TC2, /* 19 */
+ PID_UHP, /* 20 */
+ PID_EMAC, /* 21 */
+ PID_ISI, /* 22 */
+ PID_US3, /* 23 */
+ PID_US4, /* 24 */
+ PID_US5, /* 25 */
+ PID_TC3, /* 26 */
+ PID_TC4, /* 27 */
+ PID_TC5, /* 28 */
+ PID_IRQ0, /* 29 */
+ PID_IRQ1, /* 30 */
+ PID_IRQ2, /* 31 */
+};
+
+#endif /* _AT91SAM9260REG_H_ */
